Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
Patrick Delaunay | 23aee61 | 2020-01-13 11:35:13 +0100 | [diff] [blame] | 3 | #include <dt-bindings/gpio/gpio.h> |
| 4 | #include <dt-bindings/gpio/sandbox-gpio.h> |
Marek Szyprowski | ad39859 | 2021-02-18 11:33:18 +0100 | [diff] [blame] | 5 | #include <dt-bindings/input/input.h> |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 6 | #include <dt-bindings/pinctrl/sandbox-pinmux.h> |
Jean-Jacques Hiblot | a94b697 | 2020-10-16 16:16:34 +0530 | [diff] [blame] | 7 | #include <dt-bindings/mux/mux.h> |
Patrick Delaunay | 23aee61 | 2020-01-13 11:35:13 +0100 | [diff] [blame] | 8 | |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 9 | / { |
| 10 | model = "sandbox"; |
| 11 | compatible = "sandbox"; |
| 12 | #address-cells = <1>; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 13 | #size-cells = <1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 14 | |
Simon Glass | fef72b7 | 2014-07-23 06:55:03 -0600 | [diff] [blame] | 15 | aliases { |
| 16 | console = &uart0; |
Michael Walle | 7efcdfd | 2021-02-25 16:51:11 +0100 | [diff] [blame] | 17 | ethernet0 = "/eth@10002000"; |
| 18 | ethernet2 = &swp_0; |
| 19 | ethernet3 = ð_3; |
| 20 | ethernet4 = &dsa_eth0; |
| 21 | ethernet5 = ð_5; |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 22 | gpio1 = &gpio_a; |
| 23 | gpio2 = &gpio_b; |
Patrick Delaunay | 28bdaa5 | 2020-01-13 11:35:14 +0100 | [diff] [blame] | 24 | gpio3 = &gpio_c; |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 25 | i2c0 = "/i2c@0"; |
Simon Glass | e4fef74 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 26 | mmc0 = "/mmc0"; |
| 27 | mmc1 = "/mmc1"; |
Bin Meng | 408e590 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 28 | pci0 = &pci0; |
| 29 | pci1 = &pci1; |
Bin Meng | 510dddb | 2018-08-03 01:14:50 -0700 | [diff] [blame] | 30 | pci2 = &pci2; |
Michael Walle | 7c41a22 | 2020-06-02 01:47:09 +0200 | [diff] [blame] | 31 | remoteproc0 = &rproc_1; |
| 32 | remoteproc1 = &rproc_2; |
Simon Glass | 336b295 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 33 | rtc0 = &rtc_0; |
| 34 | rtc1 = &rtc_1; |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 35 | spi0 = "/spi@0"; |
Przemyslaw Marczak | 3dbb55e | 2015-05-13 13:38:34 +0200 | [diff] [blame] | 36 | testfdt6 = "/e-test"; |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 37 | testbus3 = "/some-bus"; |
| 38 | testfdt0 = "/some-bus/c-test@0"; |
Simon Glass | 7d5e411 | 2020-12-16 21:20:26 -0700 | [diff] [blame] | 39 | testfdt12 = "/some-bus/c-test@1"; |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 40 | testfdt3 = "/b-test"; |
| 41 | testfdt5 = "/some-bus/c-test@5"; |
| 42 | testfdt8 = "/a-test"; |
Simon Glass | 791a17f | 2020-12-16 21:20:27 -0700 | [diff] [blame] | 43 | testfdtm1 = &testfdtm1; |
Eugeniu Rosca | 5ba71e5 | 2018-05-19 14:13:55 +0200 | [diff] [blame] | 44 | fdt-dummy0 = "/translation-test@8000/dev@0,0"; |
| 45 | fdt-dummy1 = "/translation-test@8000/dev@1,100"; |
| 46 | fdt-dummy2 = "/translation-test@8000/dev@2,200"; |
| 47 | fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 48 | usb0 = &usb_0; |
| 49 | usb1 = &usb_1; |
| 50 | usb2 = &usb_2; |
Mario Six | 9592215 | 2018-08-09 14:51:19 +0200 | [diff] [blame] | 51 | axi0 = &axi; |
Mario Six | 02ad6fb | 2018-09-27 09:19:31 +0200 | [diff] [blame] | 52 | osd0 = "/osd"; |
Simon Glass | fef72b7 | 2014-07-23 06:55:03 -0600 | [diff] [blame] | 53 | }; |
| 54 | |
Rasmus Villemoes | 30d4d2b | 2021-04-21 11:06:55 +0200 | [diff] [blame] | 55 | config { |
| 56 | environment { |
| 57 | from_fdt = "yes"; |
| 58 | fdt_env_path = ""; |
| 59 | }; |
| 60 | }; |
| 61 | |
Simon Glass | ed96cde | 2018-12-10 10:37:33 -0700 | [diff] [blame] | 62 | audio: audio-codec { |
| 63 | compatible = "sandbox,audio-codec"; |
| 64 | #sound-dai-cells = <1>; |
| 65 | }; |
| 66 | |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 67 | buttons { |
| 68 | compatible = "gpio-keys"; |
| 69 | |
Heinrich Schuchardt | 57c2fc6 | 2020-09-14 12:50:54 +0200 | [diff] [blame] | 70 | btn1 { |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 71 | gpios = <&gpio_a 3 0>; |
Heinrich Schuchardt | 57c2fc6 | 2020-09-14 12:50:54 +0200 | [diff] [blame] | 72 | label = "button1"; |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 73 | }; |
| 74 | |
Heinrich Schuchardt | 57c2fc6 | 2020-09-14 12:50:54 +0200 | [diff] [blame] | 75 | btn2 { |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 76 | gpios = <&gpio_a 4 0>; |
Heinrich Schuchardt | 57c2fc6 | 2020-09-14 12:50:54 +0200 | [diff] [blame] | 77 | label = "button2"; |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 78 | }; |
| 79 | }; |
| 80 | |
Marek Szyprowski | ad39859 | 2021-02-18 11:33:18 +0100 | [diff] [blame] | 81 | buttons2 { |
| 82 | compatible = "adc-keys"; |
| 83 | io-channels = <&adc 3>; |
| 84 | keyup-threshold-microvolt = <3000000>; |
| 85 | |
| 86 | button-up { |
| 87 | label = "button3"; |
| 88 | linux,code = <KEY_F3>; |
| 89 | press-threshold-microvolt = <1500000>; |
| 90 | }; |
| 91 | |
| 92 | button-down { |
| 93 | label = "button4"; |
| 94 | linux,code = <KEY_F4>; |
| 95 | press-threshold-microvolt = <1000000>; |
| 96 | }; |
| 97 | |
| 98 | button-enter { |
| 99 | label = "button5"; |
| 100 | linux,code = <KEY_F5>; |
| 101 | press-threshold-microvolt = <500000>; |
| 102 | }; |
| 103 | }; |
| 104 | |
Simon Glass | c953aaf | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 105 | cros_ec: cros-ec { |
Simon Glass | 699c9ca | 2018-10-01 12:22:08 -0600 | [diff] [blame] | 106 | reg = <0 0>; |
| 107 | compatible = "google,cros-ec-sandbox"; |
| 108 | |
| 109 | /* |
| 110 | * This describes the flash memory within the EC. Note |
| 111 | * that the STM32L flash erases to 0, not 0xff. |
| 112 | */ |
| 113 | flash { |
| 114 | image-pos = <0x08000000>; |
| 115 | size = <0x20000>; |
| 116 | erase-value = <0>; |
| 117 | |
| 118 | /* Information for sandbox */ |
| 119 | ro { |
| 120 | image-pos = <0>; |
| 121 | size = <0xf000>; |
| 122 | }; |
| 123 | wp-ro { |
| 124 | image-pos = <0xf000>; |
| 125 | size = <0x1000>; |
Simon Glass | bf0a692 | 2021-01-21 13:57:14 -0700 | [diff] [blame] | 126 | used = <0x884>; |
| 127 | compress = "lz4"; |
| 128 | uncomp-size = <0xcf8>; |
| 129 | hash { |
| 130 | algo = "sha256"; |
| 131 | value = [00 01 02 03 04 05 06 07 |
| 132 | 08 09 0a 0b 0c 0d 0e 0f |
| 133 | 10 11 12 13 14 15 16 17 |
| 134 | 18 19 1a 1b 1c 1d 1e 1f]; |
| 135 | }; |
Simon Glass | 699c9ca | 2018-10-01 12:22:08 -0600 | [diff] [blame] | 136 | }; |
| 137 | rw { |
| 138 | image-pos = <0x10000>; |
| 139 | size = <0x10000>; |
| 140 | }; |
| 141 | }; |
Alper Nebi Yasak | 8a8cd4f | 2021-05-19 19:33:31 +0300 | [diff] [blame^] | 142 | |
| 143 | cros_ec_pwm: cros-ec-pwm { |
| 144 | compatible = "google,cros-ec-pwm"; |
| 145 | #pwm-cells = <1>; |
| 146 | }; |
| 147 | |
Simon Glass | 699c9ca | 2018-10-01 12:22:08 -0600 | [diff] [blame] | 148 | }; |
| 149 | |
Yannick Fertré | 9712c82 | 2019-10-07 15:29:05 +0200 | [diff] [blame] | 150 | dsi_host: dsi_host { |
| 151 | compatible = "sandbox,dsi-host"; |
| 152 | }; |
| 153 | |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 154 | a-test { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 155 | reg = <0 1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 156 | compatible = "denx,u-boot-fdt-test"; |
Simon Glass | a7bb08a | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 157 | ping-expect = <0>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 158 | ping-add = <0>; |
Simon Glass | fef72b7 | 2014-07-23 06:55:03 -0600 | [diff] [blame] | 159 | u-boot,dm-pre-reloc; |
Patrick Delaunay | 23aee61 | 2020-01-13 11:35:13 +0100 | [diff] [blame] | 160 | test-gpios = <&gpio_a 1>, <&gpio_a 4>, |
| 161 | <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>, |
Simon Glass | 16e1040 | 2015-01-05 20:05:29 -0700 | [diff] [blame] | 162 | <0>, <&gpio_a 12>; |
Patrick Delaunay | 23aee61 | 2020-01-13 11:35:13 +0100 | [diff] [blame] | 163 | test2-gpios = <&gpio_a 1>, <&gpio_a 4>, |
| 164 | <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>, |
| 165 | <&gpio_b 7 GPIO_IN 3 2 1>, |
| 166 | <&gpio_b 8 GPIO_OUT 3 2 1>, |
| 167 | <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>; |
Patrick Delaunay | 28bdaa5 | 2020-01-13 11:35:14 +0100 | [diff] [blame] | 168 | test3-gpios = |
| 169 | <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>, |
| 170 | <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>, |
| 171 | <&gpio_c 2 GPIO_OUT>, |
| 172 | <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>, |
| 173 | <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>, |
Neil Armstrong | 643778b | 2020-05-05 10:43:18 +0200 | [diff] [blame] | 174 | <&gpio_c 5 GPIO_IN>, |
| 175 | <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>, |
| 176 | <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>; |
Jean-Jacques Hiblot | 7387340 | 2020-09-11 13:43:35 +0530 | [diff] [blame] | 177 | test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; |
| 178 | test5-gpios = <&gpio_a 19>; |
| 179 | |
Simon Glass | 6df01f9 | 2018-12-10 10:37:37 -0700 | [diff] [blame] | 180 | int-value = <1234>; |
| 181 | uint-value = <(-1234)>; |
Dario Binacchi | 421e81e | 2020-03-29 18:04:40 +0200 | [diff] [blame] | 182 | int64-value = /bits/ 64 <0x1111222233334444>; |
Dario Binacchi | 81d80b5 | 2020-03-29 18:04:41 +0200 | [diff] [blame] | 183 | int-array = <5678 9123 4567>; |
Simon Glass | dd0ed90 | 2020-07-07 13:11:58 -0600 | [diff] [blame] | 184 | str-value = "test string"; |
Simon Glass | 515dcff | 2020-02-06 09:55:00 -0700 | [diff] [blame] | 185 | interrupts-extended = <&irq 3 0>; |
Simon Glass | 0964239 | 2020-07-07 13:12:11 -0600 | [diff] [blame] | 186 | acpi,name = "GHIJ"; |
Patrick Delaunay | 8cd2801 | 2020-09-25 09:41:16 +0200 | [diff] [blame] | 187 | phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>; |
Jean-Jacques Hiblot | a94b697 | 2020-10-16 16:16:34 +0530 | [diff] [blame] | 188 | |
| 189 | mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>, |
| 190 | <&muxcontroller0 2>, <&muxcontroller0 3>, |
| 191 | <&muxcontroller1>; |
| 192 | mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4"; |
| 193 | mux-syscon = <&syscon3>; |
Dario Binacchi | 836cc9d | 2020-12-30 00:16:26 +0100 | [diff] [blame] | 194 | display-timings { |
| 195 | timing0: 240x320 { |
| 196 | clock-frequency = <6500000>; |
| 197 | hactive = <240>; |
| 198 | vactive = <320>; |
| 199 | hfront-porch = <6>; |
| 200 | hback-porch = <7>; |
| 201 | hsync-len = <1>; |
| 202 | vback-porch = <5>; |
| 203 | vfront-porch = <8>; |
| 204 | vsync-len = <2>; |
| 205 | hsync-active = <1>; |
| 206 | vsync-active = <0>; |
| 207 | de-active = <1>; |
| 208 | pixelclk-active = <1>; |
| 209 | interlaced; |
| 210 | doublescan; |
| 211 | doubleclk; |
| 212 | }; |
| 213 | timing1: 480x800 { |
| 214 | clock-frequency = <9000000>; |
| 215 | hactive = <480>; |
| 216 | vactive = <800>; |
| 217 | hfront-porch = <10>; |
| 218 | hback-porch = <59>; |
| 219 | hsync-len = <12>; |
| 220 | vback-porch = <15>; |
| 221 | vfront-porch = <17>; |
| 222 | vsync-len = <16>; |
| 223 | hsync-active = <0>; |
| 224 | vsync-active = <1>; |
| 225 | de-active = <0>; |
| 226 | pixelclk-active = <0>; |
| 227 | }; |
| 228 | timing2: 800x480 { |
| 229 | clock-frequency = <33500000>; |
| 230 | hactive = <800>; |
| 231 | vactive = <480>; |
| 232 | hback-porch = <89>; |
| 233 | hfront-porch = <164>; |
| 234 | vback-porch = <23>; |
| 235 | vfront-porch = <10>; |
| 236 | hsync-len = <11>; |
| 237 | vsync-len = <13>; |
| 238 | }; |
| 239 | }; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 240 | }; |
| 241 | |
| 242 | junk { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 243 | reg = <1 1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 244 | compatible = "not,compatible"; |
| 245 | }; |
| 246 | |
| 247 | no-compatible { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 248 | reg = <2 1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 249 | }; |
| 250 | |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 251 | backlight: backlight { |
| 252 | compatible = "pwm-backlight"; |
| 253 | enable-gpios = <&gpio_a 1>; |
| 254 | power-supply = <&ldo_1>; |
| 255 | pwms = <&pwm 0 1000>; |
| 256 | default-brightness-level = <5>; |
| 257 | brightness-levels = <0 16 32 64 128 170 202 234 255>; |
| 258 | }; |
| 259 | |
Jean-Jacques Hiblot | e83a31b | 2018-08-09 16:17:46 +0200 | [diff] [blame] | 260 | bind-test { |
Patrice Chotard | 7b7f939 | 2020-07-28 09:13:33 +0200 | [diff] [blame] | 261 | compatible = "simple-bus"; |
Jean-Jacques Hiblot | e83a31b | 2018-08-09 16:17:46 +0200 | [diff] [blame] | 262 | bind-test-child1 { |
| 263 | compatible = "sandbox,phy"; |
| 264 | #phy-cells = <1>; |
| 265 | }; |
| 266 | |
| 267 | bind-test-child2 { |
| 268 | compatible = "simple-bus"; |
| 269 | }; |
| 270 | }; |
| 271 | |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 272 | b-test { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 273 | reg = <3 1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 274 | compatible = "denx,u-boot-fdt-test"; |
Simon Glass | a7bb08a | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 275 | ping-expect = <3>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 276 | ping-add = <3>; |
Jean-Jacques Hiblot | a94b697 | 2020-10-16 16:16:34 +0530 | [diff] [blame] | 277 | |
| 278 | mux-controls = <&muxcontroller0 0>; |
| 279 | mux-control-names = "mux0"; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 280 | }; |
| 281 | |
Jean-Jacques Hiblot | 7e9db02 | 2017-04-24 11:51:28 +0200 | [diff] [blame] | 282 | phy_provider0: gen_phy@0 { |
| 283 | compatible = "sandbox,phy"; |
| 284 | #phy-cells = <1>; |
| 285 | }; |
| 286 | |
| 287 | phy_provider1: gen_phy@1 { |
| 288 | compatible = "sandbox,phy"; |
| 289 | #phy-cells = <0>; |
| 290 | broken; |
| 291 | }; |
| 292 | |
developer | 7109297 | 2020-05-02 11:35:12 +0200 | [diff] [blame] | 293 | phy_provider2: gen_phy@2 { |
| 294 | compatible = "sandbox,phy"; |
| 295 | #phy-cells = <0>; |
| 296 | }; |
| 297 | |
Jean-Jacques Hiblot | 7e9db02 | 2017-04-24 11:51:28 +0200 | [diff] [blame] | 298 | gen_phy_user: gen_phy_user { |
| 299 | compatible = "simple-bus"; |
| 300 | phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; |
| 301 | phy-names = "phy1", "phy2", "phy3"; |
| 302 | }; |
| 303 | |
developer | 7109297 | 2020-05-02 11:35:12 +0200 | [diff] [blame] | 304 | gen_phy_user1: gen_phy_user1 { |
| 305 | compatible = "simple-bus"; |
| 306 | phys = <&phy_provider0 0>, <&phy_provider2>; |
| 307 | phy-names = "phy1", "phy2"; |
| 308 | }; |
| 309 | |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 310 | some-bus { |
| 311 | #address-cells = <1>; |
| 312 | #size-cells = <0>; |
Simon Glass | 4071742 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 313 | compatible = "denx,u-boot-test-bus"; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 314 | reg = <3 1>; |
Simon Glass | a7bb08a | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 315 | ping-expect = <4>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 316 | ping-add = <4>; |
Simon Glass | 4071742 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 317 | c-test@5 { |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 318 | compatible = "denx,u-boot-fdt-test"; |
| 319 | reg = <5>; |
Simon Glass | 4071742 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 320 | ping-expect = <5>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 321 | ping-add = <5>; |
| 322 | }; |
Simon Glass | 4071742 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 323 | c-test@0 { |
| 324 | compatible = "denx,u-boot-fdt-test"; |
| 325 | reg = <0>; |
| 326 | ping-expect = <6>; |
| 327 | ping-add = <6>; |
| 328 | }; |
| 329 | c-test@1 { |
| 330 | compatible = "denx,u-boot-fdt-test"; |
| 331 | reg = <1>; |
| 332 | ping-expect = <7>; |
| 333 | ping-add = <7>; |
| 334 | }; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 335 | }; |
| 336 | |
| 337 | d-test { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 338 | reg = <3 1>; |
Simon Glass | db6f020 | 2014-07-23 06:55:12 -0600 | [diff] [blame] | 339 | ping-expect = <6>; |
| 340 | ping-add = <6>; |
| 341 | compatible = "google,another-fdt-test"; |
| 342 | }; |
| 343 | |
| 344 | e-test { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 345 | reg = <3 1>; |
Simon Glass | a7bb08a | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 346 | ping-expect = <6>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 347 | ping-add = <6>; |
| 348 | compatible = "google,another-fdt-test"; |
| 349 | }; |
| 350 | |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 351 | f-test { |
| 352 | compatible = "denx,u-boot-fdt-test"; |
| 353 | }; |
| 354 | |
| 355 | g-test { |
| 356 | compatible = "denx,u-boot-fdt-test"; |
| 357 | }; |
| 358 | |
Bin Meng | d9d2478 | 2018-10-10 22:07:01 -0700 | [diff] [blame] | 359 | h-test { |
| 360 | compatible = "denx,u-boot-fdt-test1"; |
| 361 | }; |
| 362 | |
developer | cf8bc13 | 2020-05-02 11:35:10 +0200 | [diff] [blame] | 363 | i-test { |
| 364 | compatible = "mediatek,u-boot-fdt-test"; |
| 365 | #address-cells = <1>; |
| 366 | #size-cells = <0>; |
| 367 | |
| 368 | subnode@0 { |
| 369 | reg = <0>; |
| 370 | }; |
| 371 | |
| 372 | subnode@1 { |
| 373 | reg = <1>; |
| 374 | }; |
| 375 | |
| 376 | subnode@2 { |
| 377 | reg = <2>; |
| 378 | }; |
| 379 | }; |
| 380 | |
Simon Glass | 204675c | 2019-12-29 21:19:25 -0700 | [diff] [blame] | 381 | devres-test { |
| 382 | compatible = "denx,u-boot-devres-test"; |
| 383 | }; |
| 384 | |
Jean-Jacques Hiblot | 7387340 | 2020-09-11 13:43:35 +0530 | [diff] [blame] | 385 | another-test { |
| 386 | reg = <0 2>; |
| 387 | compatible = "denx,u-boot-fdt-test"; |
| 388 | test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; |
| 389 | test5-gpios = <&gpio_a 19>; |
| 390 | }; |
| 391 | |
Nicolas Saenz Julienne | 22b7f7e | 2021-01-12 13:55:23 +0100 | [diff] [blame] | 392 | mmio-bus@0 { |
| 393 | #address-cells = <1>; |
| 394 | #size-cells = <1>; |
| 395 | compatible = "denx,u-boot-test-bus"; |
| 396 | dma-ranges = <0x10000000 0x00000000 0x00040000>; |
| 397 | |
| 398 | subnode@0 { |
| 399 | compatible = "denx,u-boot-fdt-test"; |
| 400 | }; |
| 401 | }; |
| 402 | |
| 403 | mmio-bus@1 { |
| 404 | #address-cells = <1>; |
| 405 | #size-cells = <1>; |
| 406 | compatible = "denx,u-boot-test-bus"; |
Nicolas Saenz Julienne | 892e9b4 | 2021-01-12 13:55:25 +0100 | [diff] [blame] | 407 | |
| 408 | subnode@0 { |
| 409 | compatible = "denx,u-boot-fdt-test"; |
| 410 | }; |
Nicolas Saenz Julienne | 22b7f7e | 2021-01-12 13:55:23 +0100 | [diff] [blame] | 411 | }; |
| 412 | |
Simon Glass | 3c601b1 | 2020-07-07 13:12:06 -0600 | [diff] [blame] | 413 | acpi_test1: acpi-test { |
Simon Glass | 2d67fdf | 2020-04-08 16:57:34 -0600 | [diff] [blame] | 414 | compatible = "denx,u-boot-acpi-test"; |
Simon Glass | d43e0ba | 2020-07-07 13:12:03 -0600 | [diff] [blame] | 415 | acpi-ssdt-test-data = "ab"; |
Simon Glass | 990cd5b | 2020-07-07 13:12:08 -0600 | [diff] [blame] | 416 | acpi-dsdt-test-data = "hi"; |
Simon Glass | ebb2e83 | 2020-07-07 13:11:39 -0600 | [diff] [blame] | 417 | child { |
| 418 | compatible = "denx,u-boot-acpi-test"; |
| 419 | }; |
Simon Glass | 2d67fdf | 2020-04-08 16:57:34 -0600 | [diff] [blame] | 420 | }; |
| 421 | |
Simon Glass | 3c601b1 | 2020-07-07 13:12:06 -0600 | [diff] [blame] | 422 | acpi_test2: acpi-test2 { |
Simon Glass | 17968c3 | 2020-04-26 09:19:46 -0600 | [diff] [blame] | 423 | compatible = "denx,u-boot-acpi-test"; |
Simon Glass | d43e0ba | 2020-07-07 13:12:03 -0600 | [diff] [blame] | 424 | acpi-ssdt-test-data = "cd"; |
Simon Glass | 990cd5b | 2020-07-07 13:12:08 -0600 | [diff] [blame] | 425 | acpi-dsdt-test-data = "jk"; |
Simon Glass | 17968c3 | 2020-04-26 09:19:46 -0600 | [diff] [blame] | 426 | }; |
| 427 | |
Patrice Chotard | 9cc2d14 | 2017-09-04 14:55:57 +0200 | [diff] [blame] | 428 | clocks { |
| 429 | clk_fixed: clk-fixed { |
| 430 | compatible = "fixed-clock"; |
| 431 | #clock-cells = <0>; |
| 432 | clock-frequency = <1234>; |
| 433 | }; |
Anup Patel | 8d28c3c | 2019-02-25 08:14:55 +0000 | [diff] [blame] | 434 | |
| 435 | clk_fixed_factor: clk-fixed-factor { |
| 436 | compatible = "fixed-factor-clock"; |
| 437 | #clock-cells = <0>; |
| 438 | clock-div = <3>; |
| 439 | clock-mult = <2>; |
| 440 | clocks = <&clk_fixed>; |
| 441 | }; |
Lukasz Majewski | ccafcdd | 2019-06-24 15:50:47 +0200 | [diff] [blame] | 442 | |
| 443 | osc { |
| 444 | compatible = "fixed-clock"; |
| 445 | #clock-cells = <0>; |
| 446 | clock-frequency = <20000000>; |
| 447 | }; |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 448 | }; |
| 449 | |
| 450 | clk_sandbox: clk-sbox { |
Simon Glass | 8cc4d82 | 2015-07-06 12:54:24 -0600 | [diff] [blame] | 451 | compatible = "sandbox,clk"; |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 452 | #clock-cells = <1>; |
Jean-Jacques Hiblot | c1e9c94 | 2019-10-22 14:00:07 +0200 | [diff] [blame] | 453 | assigned-clocks = <&clk_sandbox 3>; |
| 454 | assigned-clock-rates = <321>; |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 455 | }; |
| 456 | |
| 457 | clk-test { |
| 458 | compatible = "sandbox,clk-test"; |
| 459 | clocks = <&clk_fixed>, |
| 460 | <&clk_sandbox 1>, |
Jean-Jacques Hiblot | 98e8418 | 2019-10-22 14:00:05 +0200 | [diff] [blame] | 461 | <&clk_sandbox 0>, |
| 462 | <&clk_sandbox 3>, |
| 463 | <&clk_sandbox 2>; |
| 464 | clock-names = "fixed", "i2c", "spi", "uart2", "uart1"; |
Simon Glass | 8cc4d82 | 2015-07-06 12:54:24 -0600 | [diff] [blame] | 465 | }; |
| 466 | |
Lukasz Majewski | 8c0709b | 2019-06-24 15:50:50 +0200 | [diff] [blame] | 467 | ccf: clk-ccf { |
| 468 | compatible = "sandbox,clk-ccf"; |
| 469 | }; |
| 470 | |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 471 | eth@10002000 { |
| 472 | compatible = "sandbox,eth"; |
| 473 | reg = <0x10002000 0x1000>; |
Joe Hershberger | 76f3c10 | 2018-07-02 14:47:45 -0500 | [diff] [blame] | 474 | fake-host-hwaddr = [00 00 66 44 22 00]; |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 475 | }; |
| 476 | |
| 477 | eth_5: eth@10003000 { |
| 478 | compatible = "sandbox,eth"; |
| 479 | reg = <0x10003000 0x1000>; |
Joe Hershberger | 76f3c10 | 2018-07-02 14:47:45 -0500 | [diff] [blame] | 480 | fake-host-hwaddr = [00 00 66 44 22 11]; |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 481 | }; |
| 482 | |
Bin Meng | 04a11cb | 2015-08-27 22:25:53 -0700 | [diff] [blame] | 483 | eth_3: sbe5 { |
| 484 | compatible = "sandbox,eth"; |
| 485 | reg = <0x10005000 0x1000>; |
Joe Hershberger | 76f3c10 | 2018-07-02 14:47:45 -0500 | [diff] [blame] | 486 | fake-host-hwaddr = [00 00 66 44 22 33]; |
Bin Meng | 04a11cb | 2015-08-27 22:25:53 -0700 | [diff] [blame] | 487 | }; |
| 488 | |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 489 | eth@10004000 { |
| 490 | compatible = "sandbox,eth"; |
| 491 | reg = <0x10004000 0x1000>; |
Joe Hershberger | 76f3c10 | 2018-07-02 14:47:45 -0500 | [diff] [blame] | 492 | fake-host-hwaddr = [00 00 66 44 22 22]; |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 493 | }; |
| 494 | |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 495 | dsa_eth0: dsa-test-eth { |
| 496 | compatible = "sandbox,eth"; |
| 497 | reg = <0x10006000 0x1000>; |
| 498 | fake-host-hwaddr = [00 00 66 44 22 66]; |
| 499 | }; |
| 500 | |
| 501 | dsa-test { |
| 502 | compatible = "sandbox,dsa"; |
| 503 | |
| 504 | ports { |
| 505 | #address-cells = <1>; |
| 506 | #size-cells = <0>; |
| 507 | swp_0: port@0 { |
| 508 | reg = <0>; |
| 509 | label = "lan0"; |
| 510 | phy-mode = "rgmii-rxid"; |
| 511 | |
| 512 | fixed-link { |
| 513 | speed = <100>; |
| 514 | full-duplex; |
| 515 | }; |
| 516 | }; |
| 517 | |
| 518 | swp_1: port@1 { |
| 519 | reg = <1>; |
| 520 | label = "lan1"; |
| 521 | phy-mode = "rgmii-txid"; |
Bin Meng | 381ed97 | 2021-03-14 20:14:58 +0800 | [diff] [blame] | 522 | fixed-link = <0 1 100 0 0>; |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 523 | }; |
| 524 | |
| 525 | port@2 { |
| 526 | reg = <2>; |
| 527 | ethernet = <&dsa_eth0>; |
| 528 | |
| 529 | fixed-link { |
| 530 | speed = <1000>; |
| 531 | full-duplex; |
| 532 | }; |
| 533 | }; |
| 534 | }; |
| 535 | }; |
| 536 | |
Rajan Vaja | b3b2ddb | 2018-09-19 03:43:46 -0700 | [diff] [blame] | 537 | firmware { |
| 538 | sandbox_firmware: sandbox-firmware { |
| 539 | compatible = "sandbox,firmware"; |
| 540 | }; |
Etienne Carriere | 02fd126 | 2020-09-09 18:44:00 +0200 | [diff] [blame] | 541 | |
| 542 | sandbox-scmi-agent@0 { |
| 543 | compatible = "sandbox,scmi-agent"; |
| 544 | #address-cells = <1>; |
| 545 | #size-cells = <0>; |
Etienne Carriere | 2d94c08fa | 2020-09-09 18:44:05 +0200 | [diff] [blame] | 546 | |
| 547 | clk_scmi0: protocol@14 { |
| 548 | reg = <0x14>; |
| 549 | #clock-cells = <1>; |
| 550 | }; |
Etienne Carriere | 8b9b689 | 2020-09-09 18:44:07 +0200 | [diff] [blame] | 551 | |
| 552 | reset_scmi0: protocol@16 { |
| 553 | reg = <0x16>; |
| 554 | #reset-cells = <1>; |
| 555 | }; |
Etienne Carriere | b8f15cd | 2021-03-08 22:38:07 +0100 | [diff] [blame] | 556 | |
| 557 | protocol@17 { |
| 558 | reg = <0x17>; |
| 559 | |
| 560 | regulators { |
| 561 | #address-cells = <1>; |
| 562 | #size-cells = <0>; |
| 563 | |
| 564 | regul0_scmi0: reg@0 { |
| 565 | reg = <0>; |
| 566 | regulator-name = "sandbox-voltd0"; |
| 567 | regulator-min-microvolt = <1100000>; |
| 568 | regulator-max-microvolt = <3300000>; |
| 569 | }; |
| 570 | regul1_scmi0: reg@1 { |
| 571 | reg = <0x1>; |
| 572 | regulator-name = "sandbox-voltd1"; |
| 573 | regulator-min-microvolt = <1800000>; |
| 574 | }; |
| 575 | }; |
| 576 | }; |
Etienne Carriere | 02fd126 | 2020-09-09 18:44:00 +0200 | [diff] [blame] | 577 | }; |
| 578 | |
| 579 | sandbox-scmi-agent@1 { |
| 580 | compatible = "sandbox,scmi-agent"; |
| 581 | #address-cells = <1>; |
| 582 | #size-cells = <0>; |
| 583 | |
Etienne Carriere | 2d94c08fa | 2020-09-09 18:44:05 +0200 | [diff] [blame] | 584 | clk_scmi1: protocol@14 { |
| 585 | reg = <0x14>; |
| 586 | #clock-cells = <1>; |
| 587 | }; |
| 588 | |
Etienne Carriere | 02fd126 | 2020-09-09 18:44:00 +0200 | [diff] [blame] | 589 | protocol@10 { |
| 590 | reg = <0x10>; |
| 591 | }; |
| 592 | }; |
Rajan Vaja | b3b2ddb | 2018-09-19 03:43:46 -0700 | [diff] [blame] | 593 | }; |
| 594 | |
Patrick Delaunay | 1b4a22f | 2020-01-13 11:35:15 +0100 | [diff] [blame] | 595 | pinctrl-gpio { |
| 596 | compatible = "sandbox,pinctrl-gpio"; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 597 | |
Patrick Delaunay | 1b4a22f | 2020-01-13 11:35:15 +0100 | [diff] [blame] | 598 | gpio_a: base-gpios { |
| 599 | compatible = "sandbox,gpio"; |
| 600 | gpio-controller; |
| 601 | #gpio-cells = <1>; |
| 602 | gpio-bank-name = "a"; |
| 603 | sandbox,gpio-count = <20>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 604 | hog_input_active_low { |
| 605 | gpio-hog; |
| 606 | input; |
Philippe Reynes | b25a5b3 | 2020-07-24 15:51:53 +0200 | [diff] [blame] | 607 | gpios = <10 GPIO_ACTIVE_LOW>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 608 | }; |
| 609 | hog_input_active_high { |
| 610 | gpio-hog; |
| 611 | input; |
Philippe Reynes | b25a5b3 | 2020-07-24 15:51:53 +0200 | [diff] [blame] | 612 | gpios = <11 GPIO_ACTIVE_HIGH>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 613 | }; |
| 614 | hog_output_low { |
| 615 | gpio-hog; |
| 616 | output-low; |
Philippe Reynes | b25a5b3 | 2020-07-24 15:51:53 +0200 | [diff] [blame] | 617 | gpios = <12 GPIO_ACTIVE_HIGH>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 618 | }; |
| 619 | hog_output_high { |
| 620 | gpio-hog; |
| 621 | output-high; |
Philippe Reynes | b25a5b3 | 2020-07-24 15:51:53 +0200 | [diff] [blame] | 622 | gpios = <13 GPIO_ACTIVE_HIGH>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 623 | }; |
Patrick Delaunay | 1b4a22f | 2020-01-13 11:35:15 +0100 | [diff] [blame] | 624 | }; |
| 625 | |
| 626 | gpio_b: extra-gpios { |
| 627 | compatible = "sandbox,gpio"; |
| 628 | gpio-controller; |
| 629 | #gpio-cells = <5>; |
| 630 | gpio-bank-name = "b"; |
| 631 | sandbox,gpio-count = <10>; |
| 632 | }; |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 633 | |
Patrick Delaunay | 1b4a22f | 2020-01-13 11:35:15 +0100 | [diff] [blame] | 634 | gpio_c: pinmux-gpios { |
| 635 | compatible = "sandbox,gpio"; |
| 636 | gpio-controller; |
| 637 | #gpio-cells = <2>; |
| 638 | gpio-bank-name = "c"; |
| 639 | sandbox,gpio-count = <10>; |
| 640 | }; |
Patrick Delaunay | 28bdaa5 | 2020-01-13 11:35:14 +0100 | [diff] [blame] | 641 | }; |
| 642 | |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 643 | i2c@0 { |
| 644 | #address-cells = <1>; |
| 645 | #size-cells = <0>; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 646 | reg = <0 1>; |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 647 | compatible = "sandbox,i2c"; |
| 648 | clock-frequency = <100000>; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 649 | pinctrl-names = "default"; |
| 650 | pinctrl-0 = <&pinmux_i2c0_pins>; |
| 651 | |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 652 | eeprom@2c { |
| 653 | reg = <0x2c>; |
| 654 | compatible = "i2c-eeprom"; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 655 | sandbox,emul = <&emul_eeprom>; |
Michal Simek | 4f18f92 | 2020-05-28 11:48:55 +0200 | [diff] [blame] | 656 | partitions { |
| 657 | compatible = "fixed-partitions"; |
| 658 | #address-cells = <1>; |
| 659 | #size-cells = <1>; |
| 660 | bootcount_i2c: bootcount@10 { |
| 661 | reg = <10 2>; |
| 662 | }; |
| 663 | }; |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 664 | }; |
Przemyslaw Marczak | 77bee05 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 665 | |
Simon Glass | 336b295 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 666 | rtc_0: rtc@43 { |
| 667 | reg = <0x43>; |
| 668 | compatible = "sandbox-rtc"; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 669 | sandbox,emul = <&emul0>; |
Simon Glass | 336b295 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 670 | }; |
| 671 | |
| 672 | rtc_1: rtc@61 { |
| 673 | reg = <0x61>; |
| 674 | compatible = "sandbox-rtc"; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 675 | sandbox,emul = <&emul1>; |
| 676 | }; |
| 677 | |
| 678 | i2c_emul: emul { |
| 679 | reg = <0xff>; |
| 680 | compatible = "sandbox,i2c-emul-parent"; |
| 681 | emul_eeprom: emul-eeprom { |
| 682 | compatible = "sandbox,i2c-eeprom"; |
| 683 | sandbox,filename = "i2c.bin"; |
| 684 | sandbox,size = <256>; |
| 685 | }; |
| 686 | emul0: emul0 { |
Simon Glass | 98af374 | 2021-02-03 06:01:17 -0700 | [diff] [blame] | 687 | compatible = "sandbox,i2c-rtc-emul"; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 688 | }; |
| 689 | emul1: emull { |
Simon Glass | 98af374 | 2021-02-03 06:01:17 -0700 | [diff] [blame] | 690 | compatible = "sandbox,i2c-rtc-emul"; |
Simon Glass | 336b295 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 691 | }; |
| 692 | }; |
| 693 | |
Przemyslaw Marczak | 77bee05 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 694 | sandbox_pmic: sandbox_pmic { |
| 695 | reg = <0x40>; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 696 | sandbox,emul = <&emul_pmic0>; |
Przemyslaw Marczak | 77bee05 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 697 | }; |
Lukasz Majewski | a4d8297 | 2018-05-15 16:26:40 +0200 | [diff] [blame] | 698 | |
| 699 | mc34708: pmic@41 { |
| 700 | reg = <0x41>; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 701 | sandbox,emul = <&emul_pmic1>; |
Lukasz Majewski | a4d8297 | 2018-05-15 16:26:40 +0200 | [diff] [blame] | 702 | }; |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 703 | }; |
| 704 | |
Philipp Tomsich | 1fc5330 | 2018-12-14 21:14:29 +0100 | [diff] [blame] | 705 | bootcount@0 { |
| 706 | compatible = "u-boot,bootcount-rtc"; |
| 707 | rtc = <&rtc_1>; |
| 708 | offset = <0x13>; |
| 709 | }; |
| 710 | |
Michal Simek | 4f18f92 | 2020-05-28 11:48:55 +0200 | [diff] [blame] | 711 | bootcount { |
| 712 | compatible = "u-boot,bootcount-i2c-eeprom"; |
| 713 | i2c-eeprom = <&bootcount_i2c>; |
| 714 | }; |
| 715 | |
Marek Szyprowski | ad39859 | 2021-02-18 11:33:18 +0100 | [diff] [blame] | 716 | adc: adc@0 { |
Przemyslaw Marczak | 1bc7f23 | 2015-10-27 13:08:06 +0100 | [diff] [blame] | 717 | compatible = "sandbox,adc"; |
Marek Szyprowski | ad39859 | 2021-02-18 11:33:18 +0100 | [diff] [blame] | 718 | #io-channel-cells = <1>; |
Przemyslaw Marczak | 1bc7f23 | 2015-10-27 13:08:06 +0100 | [diff] [blame] | 719 | vdd-supply = <&buck2>; |
| 720 | vss-microvolts = <0>; |
| 721 | }; |
| 722 | |
Simon Glass | 515dcff | 2020-02-06 09:55:00 -0700 | [diff] [blame] | 723 | irq: irq { |
Simon Glass | 54028bc | 2019-12-06 21:41:59 -0700 | [diff] [blame] | 724 | compatible = "sandbox,irq"; |
Simon Glass | 515dcff | 2020-02-06 09:55:00 -0700 | [diff] [blame] | 725 | interrupt-controller; |
| 726 | #interrupt-cells = <2>; |
Simon Glass | 54028bc | 2019-12-06 21:41:59 -0700 | [diff] [blame] | 727 | }; |
| 728 | |
Simon Glass | 90b6fef | 2016-01-18 19:52:26 -0700 | [diff] [blame] | 729 | lcd { |
| 730 | u-boot,dm-pre-reloc; |
| 731 | compatible = "sandbox,lcd-sdl"; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 732 | pinctrl-names = "default"; |
| 733 | pinctrl-0 = <&pinmux_lcd_pins>; |
Simon Glass | 90b6fef | 2016-01-18 19:52:26 -0700 | [diff] [blame] | 734 | xres = <1366>; |
| 735 | yres = <768>; |
| 736 | }; |
| 737 | |
Simon Glass | d783eb3 | 2015-07-06 12:54:34 -0600 | [diff] [blame] | 738 | leds { |
| 739 | compatible = "gpio-leds"; |
| 740 | |
| 741 | iracibble { |
| 742 | gpios = <&gpio_a 1 0>; |
| 743 | label = "sandbox:red"; |
| 744 | }; |
| 745 | |
| 746 | martinet { |
| 747 | gpios = <&gpio_a 2 0>; |
| 748 | label = "sandbox:green"; |
| 749 | }; |
Patrick Bruenn | b58adfe | 2018-04-11 11:16:29 +0200 | [diff] [blame] | 750 | |
| 751 | default_on { |
| 752 | gpios = <&gpio_a 5 0>; |
| 753 | label = "sandbox:default_on"; |
| 754 | default-state = "on"; |
| 755 | }; |
| 756 | |
| 757 | default_off { |
| 758 | gpios = <&gpio_a 6 0>; |
Sean Anderson | fbf8d65 | 2020-09-14 11:02:03 -0400 | [diff] [blame] | 759 | /* label intentionally omitted */ |
Patrick Bruenn | b58adfe | 2018-04-11 11:16:29 +0200 | [diff] [blame] | 760 | default-state = "off"; |
| 761 | }; |
Simon Glass | d783eb3 | 2015-07-06 12:54:34 -0600 | [diff] [blame] | 762 | }; |
| 763 | |
Stephen Warren | 62f2c90 | 2016-05-16 17:41:37 -0600 | [diff] [blame] | 764 | mbox: mbox { |
| 765 | compatible = "sandbox,mbox"; |
| 766 | #mbox-cells = <1>; |
| 767 | }; |
| 768 | |
| 769 | mbox-test { |
| 770 | compatible = "sandbox,mbox-test"; |
| 771 | mboxes = <&mbox 100>, <&mbox 1>; |
| 772 | mbox-names = "other", "test"; |
| 773 | }; |
| 774 | |
AKASHI Takahiro | 8fb963a | 2019-08-27 17:17:03 +0900 | [diff] [blame] | 775 | cpus { |
Sean Anderson | 79d3bba | 2020-09-28 10:52:23 -0400 | [diff] [blame] | 776 | timebase-frequency = <2000000>; |
AKASHI Takahiro | 8fb963a | 2019-08-27 17:17:03 +0900 | [diff] [blame] | 777 | cpu-test1 { |
Sean Anderson | 79d3bba | 2020-09-28 10:52:23 -0400 | [diff] [blame] | 778 | timebase-frequency = <3000000>; |
AKASHI Takahiro | 8fb963a | 2019-08-27 17:17:03 +0900 | [diff] [blame] | 779 | compatible = "sandbox,cpu_sandbox"; |
| 780 | u-boot,dm-pre-reloc; |
| 781 | }; |
Mario Six | dea5df7 | 2018-08-06 10:23:44 +0200 | [diff] [blame] | 782 | |
AKASHI Takahiro | 8fb963a | 2019-08-27 17:17:03 +0900 | [diff] [blame] | 783 | cpu-test2 { |
| 784 | compatible = "sandbox,cpu_sandbox"; |
| 785 | u-boot,dm-pre-reloc; |
| 786 | }; |
Mario Six | dea5df7 | 2018-08-06 10:23:44 +0200 | [diff] [blame] | 787 | |
AKASHI Takahiro | 8fb963a | 2019-08-27 17:17:03 +0900 | [diff] [blame] | 788 | cpu-test3 { |
| 789 | compatible = "sandbox,cpu_sandbox"; |
| 790 | u-boot,dm-pre-reloc; |
| 791 | }; |
Mario Six | dea5df7 | 2018-08-06 10:23:44 +0200 | [diff] [blame] | 792 | }; |
| 793 | |
Dave Gerlach | 75dbdfc | 2020-07-15 23:39:58 -0500 | [diff] [blame] | 794 | chipid: chipid { |
| 795 | compatible = "sandbox,soc"; |
| 796 | }; |
| 797 | |
Simon Glass | c953aaf | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 798 | i2s: i2s { |
| 799 | compatible = "sandbox,i2s"; |
| 800 | #sound-dai-cells = <1>; |
Simon Glass | 4d5814c | 2019-02-16 20:24:56 -0700 | [diff] [blame] | 801 | sandbox,silent; /* Don't emit sounds while testing */ |
Simon Glass | c953aaf | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 802 | }; |
| 803 | |
Jean-Jacques Hiblot | db97c7f | 2019-07-05 09:33:57 +0200 | [diff] [blame] | 804 | nop-test_0 { |
| 805 | compatible = "sandbox,nop_sandbox1"; |
| 806 | nop-test_1 { |
| 807 | compatible = "sandbox,nop_sandbox2"; |
| 808 | bind = "True"; |
| 809 | }; |
| 810 | nop-test_2 { |
| 811 | compatible = "sandbox,nop_sandbox2"; |
| 812 | bind = "False"; |
| 813 | }; |
| 814 | }; |
| 815 | |
Mario Six | a8ce0ee | 2018-07-31 14:24:14 +0200 | [diff] [blame] | 816 | misc-test { |
| 817 | compatible = "sandbox,misc_sandbox"; |
| 818 | }; |
| 819 | |
Simon Glass | e4fef74 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 820 | mmc2 { |
| 821 | compatible = "sandbox,mmc"; |
| 822 | }; |
| 823 | |
| 824 | mmc1 { |
| 825 | compatible = "sandbox,mmc"; |
| 826 | }; |
| 827 | |
| 828 | mmc0 { |
Simon Glass | d3e58e4 | 2015-07-06 12:54:32 -0600 | [diff] [blame] | 829 | compatible = "sandbox,mmc"; |
| 830 | }; |
| 831 | |
Simon Glass | 53a68b3 | 2019-02-16 20:24:50 -0700 | [diff] [blame] | 832 | pch { |
| 833 | compatible = "sandbox,pch"; |
| 834 | }; |
| 835 | |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 836 | pci0: pci@0 { |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 837 | compatible = "sandbox,pci"; |
| 838 | device_type = "pci"; |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 839 | bus-range = <0x00 0xff>; |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 840 | #address-cells = <3>; |
| 841 | #size-cells = <2>; |
Simon Glass | 35464f7 | 2019-09-25 08:56:08 -0600 | [diff] [blame] | 842 | ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000 |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 843 | 0x01000000 0 0x20000000 0x20000000 0 0x2000>; |
Bin Meng | cbf071b | 2018-08-03 01:14:39 -0700 | [diff] [blame] | 844 | pci@0,0 { |
| 845 | compatible = "pci-generic"; |
| 846 | reg = <0x0000 0 0 0 0>; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 847 | sandbox,emul = <&swap_case_emul0_0>; |
Bin Meng | cbf071b | 2018-08-03 01:14:39 -0700 | [diff] [blame] | 848 | }; |
Alex Marginean | f127443 | 2019-06-07 11:24:24 +0300 | [diff] [blame] | 849 | pci@1,0 { |
| 850 | compatible = "pci-generic"; |
Simon Glass | 23b2759 | 2019-09-15 12:08:58 -0600 | [diff] [blame] | 851 | /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */ |
| 852 | reg = <0x02000814 0 0 0 0 |
| 853 | 0x01000810 0 0 0 0>; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 854 | sandbox,emul = <&swap_case_emul0_1>; |
Alex Marginean | f127443 | 2019-06-07 11:24:24 +0300 | [diff] [blame] | 855 | }; |
Simon Glass | 937bb47 | 2019-12-06 21:41:57 -0700 | [diff] [blame] | 856 | p2sb-pci@2,0 { |
| 857 | compatible = "sandbox,p2sb"; |
| 858 | reg = <0x02001010 0 0 0 0>; |
| 859 | sandbox,emul = <&p2sb_emul>; |
| 860 | |
| 861 | adder { |
| 862 | intel,p2sb-port-id = <3>; |
| 863 | compatible = "sandbox,adder"; |
| 864 | }; |
| 865 | }; |
Simon Glass | 8c50102 | 2019-12-06 21:41:54 -0700 | [diff] [blame] | 866 | pci@1e,0 { |
| 867 | compatible = "sandbox,pmc"; |
| 868 | reg = <0xf000 0 0 0 0>; |
| 869 | sandbox,emul = <&pmc_emul1e>; |
| 870 | acpi-base = <0x400>; |
| 871 | gpe0-dwx-mask = <0xf>; |
| 872 | gpe0-dwx-shift-base = <4>; |
| 873 | gpe0-dw = <6 7 9>; |
| 874 | gpe0-sts = <0x20>; |
| 875 | gpe0-en = <0x30>; |
| 876 | }; |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 877 | pci@1f,0 { |
| 878 | compatible = "pci-generic"; |
Simon Glass | 23b2759 | 2019-09-15 12:08:58 -0600 | [diff] [blame] | 879 | /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */ |
| 880 | reg = <0x0100f810 0 0 0 0>; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 881 | sandbox,emul = <&swap_case_emul0_1f>; |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 882 | }; |
| 883 | }; |
| 884 | |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 885 | pci-emul0 { |
| 886 | compatible = "sandbox,pci-emul-parent"; |
| 887 | swap_case_emul0_0: emul0@0,0 { |
| 888 | compatible = "sandbox,swap-case"; |
| 889 | }; |
| 890 | swap_case_emul0_1: emul0@1,0 { |
| 891 | compatible = "sandbox,swap-case"; |
| 892 | use-ea; |
| 893 | }; |
| 894 | swap_case_emul0_1f: emul0@1f,0 { |
| 895 | compatible = "sandbox,swap-case"; |
| 896 | }; |
Simon Glass | 937bb47 | 2019-12-06 21:41:57 -0700 | [diff] [blame] | 897 | p2sb_emul: emul@2,0 { |
| 898 | compatible = "sandbox,p2sb-emul"; |
| 899 | }; |
Simon Glass | 8c50102 | 2019-12-06 21:41:54 -0700 | [diff] [blame] | 900 | pmc_emul1e: emul@1e,0 { |
| 901 | compatible = "sandbox,pmc-emul"; |
| 902 | }; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 903 | }; |
| 904 | |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 905 | pci1: pci@1 { |
Bin Meng | 408e590 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 906 | compatible = "sandbox,pci"; |
| 907 | device_type = "pci"; |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 908 | bus-range = <0x00 0xff>; |
Bin Meng | 408e590 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 909 | #address-cells = <3>; |
| 910 | #size-cells = <2>; |
Suneel Garapati | 3ac3aec | 2019-10-19 17:10:20 -0700 | [diff] [blame] | 911 | ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0 |
| 912 | 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1 |
| 913 | 0x01000000 0 0x40000000 0x40000000 0 0x2000>; |
Bin Meng | 5fed536 | 2018-08-03 01:14:47 -0700 | [diff] [blame] | 914 | sandbox,dev-info = <0x08 0x00 0x1234 0x5678 |
Marek Vasut | e573322 | 2018-10-10 21:27:08 +0200 | [diff] [blame] | 915 | 0x0c 0x00 0x1234 0x5678 |
| 916 | 0x10 0x00 0x1234 0x5678>; |
| 917 | pci@10,0 { |
| 918 | reg = <0x8000 0 0 0 0>; |
| 919 | }; |
Bin Meng | 408e590 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 920 | }; |
| 921 | |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 922 | pci2: pci@2 { |
Bin Meng | 510dddb | 2018-08-03 01:14:50 -0700 | [diff] [blame] | 923 | compatible = "sandbox,pci"; |
| 924 | device_type = "pci"; |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 925 | bus-range = <0x00 0xff>; |
Bin Meng | 510dddb | 2018-08-03 01:14:50 -0700 | [diff] [blame] | 926 | #address-cells = <3>; |
| 927 | #size-cells = <2>; |
| 928 | ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000 |
| 929 | 0x01000000 0 0x60000000 0x60000000 0 0x2000>; |
| 930 | sandbox,dev-info = <0x08 0x00 0x1234 0x5678>; |
| 931 | pci@1f,0 { |
| 932 | compatible = "pci-generic"; |
| 933 | reg = <0xf800 0 0 0 0>; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 934 | sandbox,emul = <&swap_case_emul2_1f>; |
| 935 | }; |
| 936 | }; |
| 937 | |
| 938 | pci-emul2 { |
| 939 | compatible = "sandbox,pci-emul-parent"; |
| 940 | swap_case_emul2_1f: emul2@1f,0 { |
| 941 | compatible = "sandbox,swap-case"; |
Bin Meng | 510dddb | 2018-08-03 01:14:50 -0700 | [diff] [blame] | 942 | }; |
| 943 | }; |
| 944 | |
Ramon Fried | c64f19b | 2019-04-27 11:15:23 +0300 | [diff] [blame] | 945 | pci_ep: pci_ep { |
| 946 | compatible = "sandbox,pci_ep"; |
| 947 | }; |
| 948 | |
Simon Glass | 9c433fe | 2017-04-23 20:10:44 -0600 | [diff] [blame] | 949 | probing { |
| 950 | compatible = "simple-bus"; |
| 951 | test1 { |
| 952 | compatible = "denx,u-boot-probe-test"; |
| 953 | }; |
| 954 | |
| 955 | test2 { |
| 956 | compatible = "denx,u-boot-probe-test"; |
| 957 | }; |
| 958 | |
| 959 | test3 { |
| 960 | compatible = "denx,u-boot-probe-test"; |
| 961 | }; |
| 962 | |
| 963 | test4 { |
| 964 | compatible = "denx,u-boot-probe-test"; |
Jean-Jacques Hiblot | dc44ea4 | 2018-11-29 10:57:37 +0100 | [diff] [blame] | 965 | first-syscon = <&syscon0>; |
| 966 | second-sys-ctrl = <&another_system_controller>; |
Patrick Delaunay | ee01043 | 2019-03-07 09:57:13 +0100 | [diff] [blame] | 967 | third-syscon = <&syscon2>; |
Simon Glass | 9c433fe | 2017-04-23 20:10:44 -0600 | [diff] [blame] | 968 | }; |
| 969 | }; |
| 970 | |
Stephen Warren | 92c67fa | 2016-07-13 13:45:31 -0600 | [diff] [blame] | 971 | pwrdom: power-domain { |
| 972 | compatible = "sandbox,power-domain"; |
| 973 | #power-domain-cells = <1>; |
| 974 | }; |
| 975 | |
| 976 | power-domain-test { |
| 977 | compatible = "sandbox,power-domain-test"; |
| 978 | power-domains = <&pwrdom 2>; |
| 979 | }; |
| 980 | |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 981 | pwm: pwm { |
Simon Glass | e62f4be | 2017-04-16 21:01:11 -0600 | [diff] [blame] | 982 | compatible = "sandbox,pwm"; |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 983 | #pwm-cells = <2>; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 984 | pinctrl-names = "default"; |
| 985 | pinctrl-0 = <&pinmux_pwm_pins>; |
Simon Glass | e62f4be | 2017-04-16 21:01:11 -0600 | [diff] [blame] | 986 | }; |
| 987 | |
| 988 | pwm2 { |
| 989 | compatible = "sandbox,pwm"; |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 990 | #pwm-cells = <2>; |
Simon Glass | e62f4be | 2017-04-16 21:01:11 -0600 | [diff] [blame] | 991 | }; |
| 992 | |
Simon Glass | 3d355e6 | 2015-07-06 12:54:31 -0600 | [diff] [blame] | 993 | ram { |
| 994 | compatible = "sandbox,ram"; |
| 995 | }; |
| 996 | |
Simon Glass | d860f22 | 2015-07-06 12:54:29 -0600 | [diff] [blame] | 997 | reset@0 { |
| 998 | compatible = "sandbox,warm-reset"; |
| 999 | }; |
| 1000 | |
| 1001 | reset@1 { |
| 1002 | compatible = "sandbox,reset"; |
| 1003 | }; |
| 1004 | |
Stephen Warren | 6488e64 | 2016-06-17 09:43:59 -0600 | [diff] [blame] | 1005 | resetc: reset-ctl { |
| 1006 | compatible = "sandbox,reset-ctl"; |
| 1007 | #reset-cells = <1>; |
| 1008 | }; |
| 1009 | |
| 1010 | reset-ctl-test { |
| 1011 | compatible = "sandbox,reset-ctl-test"; |
Neil Armstrong | 9b4cdef | 2021-04-20 10:42:25 +0200 | [diff] [blame] | 1012 | resets = <&resetc 100>, <&resetc 2>, <&resetc 20>, <&resetc 40>; |
| 1013 | reset-names = "other", "test", "test2", "test3"; |
Stephen Warren | 6488e64 | 2016-06-17 09:43:59 -0600 | [diff] [blame] | 1014 | }; |
| 1015 | |
Sughosh Ganu | 23e3751 | 2019-12-28 23:58:31 +0530 | [diff] [blame] | 1016 | rng { |
| 1017 | compatible = "sandbox,sandbox-rng"; |
| 1018 | }; |
| 1019 | |
Nishanth Menon | edf8581 | 2015-09-17 15:42:41 -0500 | [diff] [blame] | 1020 | rproc_1: rproc@1 { |
| 1021 | compatible = "sandbox,test-processor"; |
| 1022 | remoteproc-name = "remoteproc-test-dev1"; |
| 1023 | }; |
| 1024 | |
| 1025 | rproc_2: rproc@2 { |
| 1026 | compatible = "sandbox,test-processor"; |
| 1027 | internal-memory-mapped; |
| 1028 | remoteproc-name = "remoteproc-test-dev2"; |
| 1029 | }; |
| 1030 | |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 1031 | panel { |
| 1032 | compatible = "simple-panel"; |
| 1033 | backlight = <&backlight 0 100>; |
| 1034 | }; |
| 1035 | |
Ramon Fried | 26ed32e | 2018-07-02 02:57:59 +0300 | [diff] [blame] | 1036 | smem@0 { |
| 1037 | compatible = "sandbox,smem"; |
| 1038 | }; |
| 1039 | |
Simon Glass | 76072ac | 2018-12-10 10:37:36 -0700 | [diff] [blame] | 1040 | sound { |
| 1041 | compatible = "sandbox,sound"; |
| 1042 | cpu { |
| 1043 | sound-dai = <&i2s 0>; |
| 1044 | }; |
| 1045 | |
| 1046 | codec { |
| 1047 | sound-dai = <&audio 0>; |
| 1048 | }; |
| 1049 | }; |
| 1050 | |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1051 | spi@0 { |
| 1052 | #address-cells = <1>; |
| 1053 | #size-cells = <0>; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 1054 | reg = <0 1>; |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1055 | compatible = "sandbox,spi"; |
Ovidiu Panait | ae73473 | 2020-12-14 19:06:47 +0200 | [diff] [blame] | 1056 | cs-gpios = <0>, <0>, <&gpio_a 0>; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 1057 | pinctrl-names = "default"; |
| 1058 | pinctrl-0 = <&pinmux_spi0_pins>; |
| 1059 | |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1060 | spi.bin@0 { |
| 1061 | reg = <0>; |
Neil Armstrong | a009fa7 | 2019-02-10 10:16:20 +0000 | [diff] [blame] | 1062 | compatible = "spansion,m25p16", "jedec,spi-nor"; |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1063 | spi-max-frequency = <40000000>; |
| 1064 | sandbox,filename = "spi.bin"; |
| 1065 | }; |
Ovidiu Panait | ae73473 | 2020-12-14 19:06:47 +0200 | [diff] [blame] | 1066 | spi.bin@1 { |
| 1067 | reg = <1>; |
| 1068 | compatible = "spansion,m25p16", "jedec,spi-nor"; |
| 1069 | spi-max-frequency = <50000000>; |
| 1070 | sandbox,filename = "spi.bin"; |
| 1071 | spi-cpol; |
| 1072 | spi-cpha; |
| 1073 | }; |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1074 | }; |
| 1075 | |
Jean-Jacques Hiblot | dc44ea4 | 2018-11-29 10:57:37 +0100 | [diff] [blame] | 1076 | syscon0: syscon@0 { |
Simon Glass | cd55652 | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 1077 | compatible = "sandbox,syscon0"; |
Mario Six | e3f59f4 | 2018-10-04 09:00:40 +0200 | [diff] [blame] | 1078 | reg = <0x10 16>; |
Simon Glass | cd55652 | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 1079 | }; |
| 1080 | |
Jean-Jacques Hiblot | dc44ea4 | 2018-11-29 10:57:37 +0100 | [diff] [blame] | 1081 | another_system_controller: syscon@1 { |
Simon Glass | cd55652 | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 1082 | compatible = "sandbox,syscon1"; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 1083 | reg = <0x20 5 |
| 1084 | 0x28 6 |
| 1085 | 0x30 7 |
| 1086 | 0x38 8>; |
Simon Glass | cd55652 | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 1087 | }; |
| 1088 | |
Patrick Delaunay | ee01043 | 2019-03-07 09:57:13 +0100 | [diff] [blame] | 1089 | syscon2: syscon@2 { |
Masahiro Yamada | 42ab107 | 2018-04-23 13:26:53 +0900 | [diff] [blame] | 1090 | compatible = "simple-mfd", "syscon"; |
| 1091 | reg = <0x40 5 |
| 1092 | 0x48 6 |
| 1093 | 0x50 7 |
| 1094 | 0x58 8>; |
| 1095 | }; |
| 1096 | |
Jean-Jacques Hiblot | a94b697 | 2020-10-16 16:16:34 +0530 | [diff] [blame] | 1097 | syscon3: syscon@3 { |
| 1098 | compatible = "simple-mfd", "syscon"; |
| 1099 | reg = <0x000100 0x10>; |
| 1100 | |
| 1101 | muxcontroller0: a-mux-controller { |
| 1102 | compatible = "mmio-mux"; |
| 1103 | #mux-control-cells = <1>; |
| 1104 | |
| 1105 | mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */ |
| 1106 | <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */ |
| 1107 | <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */ |
| 1108 | idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>; |
| 1109 | u-boot,mux-autoprobe; |
| 1110 | }; |
| 1111 | }; |
| 1112 | |
| 1113 | muxcontroller1: emul-mux-controller { |
| 1114 | compatible = "mux-emul"; |
| 1115 | #mux-control-cells = <0>; |
| 1116 | u-boot,mux-autoprobe; |
| 1117 | idle-state = <0xabcd>; |
| 1118 | }; |
| 1119 | |
Simon Glass | 791a17f | 2020-12-16 21:20:27 -0700 | [diff] [blame] | 1120 | testfdtm0 { |
| 1121 | compatible = "denx,u-boot-fdtm-test"; |
| 1122 | }; |
| 1123 | |
| 1124 | testfdtm1: testfdtm1 { |
| 1125 | compatible = "denx,u-boot-fdtm-test"; |
| 1126 | }; |
| 1127 | |
| 1128 | testfdtm2 { |
| 1129 | compatible = "denx,u-boot-fdtm-test"; |
| 1130 | }; |
| 1131 | |
Sean Anderson | 79d3bba | 2020-09-28 10:52:23 -0400 | [diff] [blame] | 1132 | timer@0 { |
Thomas Chou | 6f2cfbf | 2015-12-11 16:27:34 +0800 | [diff] [blame] | 1133 | compatible = "sandbox,timer"; |
| 1134 | clock-frequency = <1000000>; |
| 1135 | }; |
| 1136 | |
Sean Anderson | 79d3bba | 2020-09-28 10:52:23 -0400 | [diff] [blame] | 1137 | timer@1 { |
| 1138 | compatible = "sandbox,timer"; |
| 1139 | sandbox,timebase-frequency-fallback; |
| 1140 | }; |
| 1141 | |
Miquel Raynal | 80938c1 | 2018-05-15 11:57:27 +0200 | [diff] [blame] | 1142 | tpm2 { |
| 1143 | compatible = "sandbox,tpm2"; |
| 1144 | }; |
| 1145 | |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 1146 | uart0: serial { |
| 1147 | compatible = "sandbox,serial"; |
| 1148 | u-boot,dm-pre-reloc; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 1149 | pinctrl-names = "default"; |
| 1150 | pinctrl-0 = <&pinmux_uart0_pins>; |
Joe Hershberger | 4c19724 | 2015-03-22 17:09:15 -0500 | [diff] [blame] | 1151 | }; |
| 1152 | |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1153 | usb_0: usb@0 { |
| 1154 | compatible = "sandbox,usb"; |
| 1155 | status = "disabled"; |
| 1156 | hub { |
| 1157 | compatible = "sandbox,usb-hub"; |
| 1158 | #address-cells = <1>; |
| 1159 | #size-cells = <0>; |
| 1160 | flash-stick { |
| 1161 | reg = <0>; |
| 1162 | compatible = "sandbox,usb-flash"; |
| 1163 | }; |
| 1164 | }; |
| 1165 | }; |
| 1166 | |
| 1167 | usb_1: usb@1 { |
| 1168 | compatible = "sandbox,usb"; |
| 1169 | hub { |
| 1170 | compatible = "usb-hub"; |
| 1171 | usb,device-class = <9>; |
Michael Walle | 7c96132 | 2020-06-02 01:47:07 +0200 | [diff] [blame] | 1172 | #address-cells = <1>; |
| 1173 | #size-cells = <0>; |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1174 | hub-emul { |
| 1175 | compatible = "sandbox,usb-hub"; |
| 1176 | #address-cells = <1>; |
| 1177 | #size-cells = <0>; |
Simon Glass | 4700fe5 | 2015-11-08 23:48:01 -0700 | [diff] [blame] | 1178 | flash-stick@0 { |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1179 | reg = <0>; |
| 1180 | compatible = "sandbox,usb-flash"; |
| 1181 | sandbox,filepath = "testflash.bin"; |
| 1182 | }; |
| 1183 | |
Simon Glass | 4700fe5 | 2015-11-08 23:48:01 -0700 | [diff] [blame] | 1184 | flash-stick@1 { |
| 1185 | reg = <1>; |
| 1186 | compatible = "sandbox,usb-flash"; |
| 1187 | sandbox,filepath = "testflash1.bin"; |
| 1188 | }; |
| 1189 | |
| 1190 | flash-stick@2 { |
| 1191 | reg = <2>; |
| 1192 | compatible = "sandbox,usb-flash"; |
| 1193 | sandbox,filepath = "testflash2.bin"; |
| 1194 | }; |
| 1195 | |
Simon Glass | c0ccc72 | 2015-11-08 23:48:08 -0700 | [diff] [blame] | 1196 | keyb@3 { |
| 1197 | reg = <3>; |
| 1198 | compatible = "sandbox,usb-keyb"; |
| 1199 | }; |
| 1200 | |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1201 | }; |
Michael Walle | 7c96132 | 2020-06-02 01:47:07 +0200 | [diff] [blame] | 1202 | |
| 1203 | usbstor@1 { |
| 1204 | reg = <1>; |
| 1205 | }; |
| 1206 | usbstor@3 { |
| 1207 | reg = <3>; |
| 1208 | }; |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1209 | }; |
| 1210 | }; |
| 1211 | |
| 1212 | usb_2: usb@2 { |
| 1213 | compatible = "sandbox,usb"; |
| 1214 | status = "disabled"; |
| 1215 | }; |
| 1216 | |
Mateusz Kulikowski | c7e4fbb | 2016-03-31 23:12:28 +0200 | [diff] [blame] | 1217 | spmi: spmi@0 { |
| 1218 | compatible = "sandbox,spmi"; |
| 1219 | #address-cells = <0x1>; |
| 1220 | #size-cells = <0x1>; |
Simon Glass | 9513997 | 2019-09-25 08:55:59 -0600 | [diff] [blame] | 1221 | ranges; |
Mateusz Kulikowski | c7e4fbb | 2016-03-31 23:12:28 +0200 | [diff] [blame] | 1222 | pm8916@0 { |
| 1223 | compatible = "qcom,spmi-pmic"; |
| 1224 | reg = <0x0 0x1>; |
| 1225 | #address-cells = <0x1>; |
| 1226 | #size-cells = <0x1>; |
Simon Glass | 9513997 | 2019-09-25 08:55:59 -0600 | [diff] [blame] | 1227 | ranges; |
Mateusz Kulikowski | c7e4fbb | 2016-03-31 23:12:28 +0200 | [diff] [blame] | 1228 | |
| 1229 | spmi_gpios: gpios@c000 { |
| 1230 | compatible = "qcom,pm8916-gpio"; |
| 1231 | reg = <0xc000 0x400>; |
| 1232 | gpio-controller; |
| 1233 | gpio-count = <4>; |
| 1234 | #gpio-cells = <2>; |
| 1235 | gpio-bank-name="spmi"; |
| 1236 | }; |
| 1237 | }; |
| 1238 | }; |
maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 1239 | |
| 1240 | wdt0: wdt@0 { |
| 1241 | compatible = "sandbox,wdt"; |
| 1242 | }; |
Rob Clark | a471b67 | 2018-01-10 11:33:30 +0100 | [diff] [blame] | 1243 | |
Mario Six | 9592215 | 2018-08-09 14:51:19 +0200 | [diff] [blame] | 1244 | axi: axi@0 { |
| 1245 | compatible = "sandbox,axi"; |
| 1246 | #address-cells = <0x1>; |
| 1247 | #size-cells = <0x1>; |
| 1248 | store@0 { |
| 1249 | compatible = "sandbox,sandbox_store"; |
| 1250 | reg = <0x0 0x400>; |
| 1251 | }; |
| 1252 | }; |
| 1253 | |
Rob Clark | a471b67 | 2018-01-10 11:33:30 +0100 | [diff] [blame] | 1254 | chosen { |
Simon Glass | 305ac9a | 2018-02-03 10:36:58 -0700 | [diff] [blame] | 1255 | #address-cells = <1>; |
| 1256 | #size-cells = <1>; |
Simon Glass | f345596 | 2020-01-27 08:49:43 -0700 | [diff] [blame] | 1257 | setting = "sunrise ohoka"; |
| 1258 | other-node = "/some-bus/c-test@5"; |
Simon Glass | e09223c | 2020-01-27 08:49:46 -0700 | [diff] [blame] | 1259 | int-values = <0x1937 72993>; |
Simon Glass | 3c601b1 | 2020-07-07 13:12:06 -0600 | [diff] [blame] | 1260 | u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>; |
Rob Clark | a471b67 | 2018-01-10 11:33:30 +0100 | [diff] [blame] | 1261 | chosen-test { |
| 1262 | compatible = "denx,u-boot-fdt-test"; |
| 1263 | reg = <9 1>; |
| 1264 | }; |
| 1265 | }; |
Mario Six | 35616ef | 2018-03-12 14:53:33 +0100 | [diff] [blame] | 1266 | |
| 1267 | translation-test@8000 { |
| 1268 | compatible = "simple-bus"; |
| 1269 | reg = <0x8000 0x4000>; |
| 1270 | |
| 1271 | #address-cells = <0x2>; |
| 1272 | #size-cells = <0x1>; |
| 1273 | |
| 1274 | ranges = <0 0x0 0x8000 0x1000 |
| 1275 | 1 0x100 0x9000 0x1000 |
| 1276 | 2 0x200 0xA000 0x1000 |
| 1277 | 3 0x300 0xB000 0x1000 |
| 1278 | >; |
| 1279 | |
Fabien Dessenne | 22236e0 | 2019-05-31 15:11:30 +0200 | [diff] [blame] | 1280 | dma-ranges = <0 0x000 0x10000000 0x1000 |
| 1281 | 1 0x100 0x20000000 0x1000 |
| 1282 | >; |
| 1283 | |
Mario Six | 35616ef | 2018-03-12 14:53:33 +0100 | [diff] [blame] | 1284 | dev@0,0 { |
| 1285 | compatible = "denx,u-boot-fdt-dummy"; |
| 1286 | reg = <0 0x0 0x1000>; |
Álvaro Fernández Rojas | a318115 | 2018-12-03 19:37:09 +0100 | [diff] [blame] | 1287 | reg-names = "sandbox-dummy-0"; |
Mario Six | 35616ef | 2018-03-12 14:53:33 +0100 | [diff] [blame] | 1288 | }; |
| 1289 | |
| 1290 | dev@1,100 { |
| 1291 | compatible = "denx,u-boot-fdt-dummy"; |
| 1292 | reg = <1 0x100 0x1000>; |
| 1293 | |
| 1294 | }; |
| 1295 | |
| 1296 | dev@2,200 { |
| 1297 | compatible = "denx,u-boot-fdt-dummy"; |
| 1298 | reg = <2 0x200 0x1000>; |
| 1299 | }; |
| 1300 | |
| 1301 | |
| 1302 | noxlatebus@3,300 { |
| 1303 | compatible = "simple-bus"; |
| 1304 | reg = <3 0x300 0x1000>; |
| 1305 | |
| 1306 | #address-cells = <0x1>; |
| 1307 | #size-cells = <0x0>; |
| 1308 | |
| 1309 | dev@42 { |
| 1310 | compatible = "denx,u-boot-fdt-dummy"; |
| 1311 | reg = <0x42>; |
| 1312 | }; |
| 1313 | }; |
| 1314 | }; |
Mario Six | 02ad6fb | 2018-09-27 09:19:31 +0200 | [diff] [blame] | 1315 | |
| 1316 | osd { |
| 1317 | compatible = "sandbox,sandbox_osd"; |
| 1318 | }; |
Tom Rini | b93eea7 | 2018-09-30 18:16:51 -0400 | [diff] [blame] | 1319 | |
Jens Wiklander | 86afaa6 | 2018-09-25 16:40:16 +0200 | [diff] [blame] | 1320 | sandbox_tee { |
| 1321 | compatible = "sandbox,tee"; |
| 1322 | }; |
Bin Meng | 1bb290d | 2018-10-15 02:21:26 -0700 | [diff] [blame] | 1323 | |
| 1324 | sandbox_virtio1 { |
| 1325 | compatible = "sandbox,virtio1"; |
| 1326 | }; |
| 1327 | |
| 1328 | sandbox_virtio2 { |
| 1329 | compatible = "sandbox,virtio2"; |
| 1330 | }; |
Patrice Chotard | 0fc8afc | 2018-10-24 14:10:23 +0200 | [diff] [blame] | 1331 | |
Etienne Carriere | 2d94c08fa | 2020-09-09 18:44:05 +0200 | [diff] [blame] | 1332 | sandbox_scmi { |
| 1333 | compatible = "sandbox,scmi-devices"; |
| 1334 | clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>; |
Etienne Carriere | 8b9b689 | 2020-09-09 18:44:07 +0200 | [diff] [blame] | 1335 | resets = <&reset_scmi0 3>; |
Etienne Carriere | b8f15cd | 2021-03-08 22:38:07 +0100 | [diff] [blame] | 1336 | regul0-supply = <®ul0_scmi0>; |
| 1337 | regul1-supply = <®ul1_scmi0>; |
Etienne Carriere | 2d94c08fa | 2020-09-09 18:44:05 +0200 | [diff] [blame] | 1338 | }; |
| 1339 | |
Patrice Chotard | 0fc8afc | 2018-10-24 14:10:23 +0200 | [diff] [blame] | 1340 | pinctrl { |
| 1341 | compatible = "sandbox,pinctrl"; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1342 | |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1343 | pinctrl-names = "default", "alternate"; |
| 1344 | pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>; |
| 1345 | pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1346 | |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1347 | pinctrl_gpios: gpios { |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1348 | gpio0 { |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1349 | pins = "P5"; |
| 1350 | function = "GPIO"; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1351 | bias-pull-up; |
| 1352 | input-disable; |
| 1353 | }; |
| 1354 | gpio1 { |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1355 | pins = "P6"; |
| 1356 | function = "GPIO"; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1357 | output-high; |
| 1358 | drive-open-drain; |
| 1359 | }; |
| 1360 | gpio2 { |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1361 | pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1362 | bias-pull-down; |
| 1363 | input-enable; |
| 1364 | }; |
| 1365 | gpio3 { |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1366 | pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1367 | bias-disable; |
| 1368 | }; |
| 1369 | }; |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1370 | |
| 1371 | pinctrl_i2c: i2c { |
| 1372 | groups { |
| 1373 | groups = "I2C_UART"; |
| 1374 | function = "I2C"; |
| 1375 | }; |
| 1376 | |
| 1377 | pins { |
| 1378 | pins = "P0", "P1"; |
| 1379 | drive-open-drain; |
| 1380 | }; |
| 1381 | }; |
| 1382 | |
| 1383 | pinctrl_i2s: i2s { |
| 1384 | groups = "SPI_I2S"; |
| 1385 | function = "I2S"; |
| 1386 | }; |
| 1387 | |
| 1388 | pinctrl_spi: spi { |
| 1389 | groups = "SPI_I2S"; |
| 1390 | function = "SPI"; |
| 1391 | |
| 1392 | cs { |
| 1393 | pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>, |
| 1394 | <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>; |
| 1395 | }; |
| 1396 | }; |
Patrice Chotard | 0fc8afc | 2018-10-24 14:10:23 +0200 | [diff] [blame] | 1397 | }; |
Benjamin Gaignard | a550b54 | 2018-11-27 13:49:50 +0100 | [diff] [blame] | 1398 | |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 1399 | pinctrl-single-no-width { |
| 1400 | compatible = "pinctrl-single"; |
| 1401 | reg = <0x0000 0x238>; |
| 1402 | #pinctrl-cells = <1>; |
| 1403 | pinctrl-single,function-mask = <0x7f>; |
| 1404 | }; |
| 1405 | |
| 1406 | pinctrl-single-pins { |
| 1407 | compatible = "pinctrl-single"; |
| 1408 | reg = <0x0000 0x238>; |
| 1409 | #pinctrl-cells = <1>; |
| 1410 | pinctrl-single,register-width = <32>; |
| 1411 | pinctrl-single,function-mask = <0x7f>; |
| 1412 | |
| 1413 | pinmux_pwm_pins: pinmux_pwm_pins { |
| 1414 | pinctrl-single,pins = < 0x48 0x06 >; |
| 1415 | }; |
| 1416 | |
| 1417 | pinmux_spi0_pins: pinmux_spi0_pins { |
| 1418 | pinctrl-single,pins = < |
| 1419 | 0x190 0x0c |
| 1420 | 0x194 0x0c |
| 1421 | 0x198 0x23 |
| 1422 | 0x19c 0x0c |
| 1423 | >; |
| 1424 | }; |
| 1425 | |
| 1426 | pinmux_uart0_pins: pinmux_uart0_pins { |
| 1427 | pinctrl-single,pins = < |
| 1428 | 0x70 0x30 |
| 1429 | 0x74 0x00 |
| 1430 | >; |
| 1431 | }; |
| 1432 | }; |
| 1433 | |
| 1434 | pinctrl-single-bits { |
| 1435 | compatible = "pinctrl-single"; |
| 1436 | reg = <0x0000 0x50>; |
| 1437 | #pinctrl-cells = <2>; |
| 1438 | pinctrl-single,bit-per-mux; |
| 1439 | pinctrl-single,register-width = <32>; |
| 1440 | pinctrl-single,function-mask = <0xf>; |
| 1441 | |
| 1442 | pinmux_i2c0_pins: pinmux_i2c0_pins { |
| 1443 | pinctrl-single,bits = < |
| 1444 | 0x10 0x00002200 0x0000ff00 |
| 1445 | >; |
| 1446 | }; |
| 1447 | |
| 1448 | pinmux_lcd_pins: pinmux_lcd_pins { |
| 1449 | pinctrl-single,bits = < |
| 1450 | 0x40 0x22222200 0xffffff00 |
| 1451 | 0x44 0x22222222 0xffffffff |
| 1452 | 0x48 0x00000022 0x000000ff |
| 1453 | 0x48 0x02000000 0x0f000000 |
| 1454 | 0x4c 0x02000022 0x0f0000ff |
| 1455 | >; |
| 1456 | }; |
| 1457 | }; |
| 1458 | |
Benjamin Gaignard | a550b54 | 2018-11-27 13:49:50 +0100 | [diff] [blame] | 1459 | hwspinlock@0 { |
| 1460 | compatible = "sandbox,hwspinlock"; |
| 1461 | }; |
Grygorii Strashko | 19ebf0b | 2018-11-28 19:17:51 +0100 | [diff] [blame] | 1462 | |
| 1463 | dma: dma { |
| 1464 | compatible = "sandbox,dma"; |
| 1465 | #dma-cells = <1>; |
| 1466 | |
| 1467 | dmas = <&dma 0>, <&dma 1>, <&dma 2>; |
| 1468 | dma-names = "m2m", "tx0", "rx0"; |
| 1469 | }; |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 1470 | |
Alex Marginean | 0649be5 | 2019-07-12 10:13:53 +0300 | [diff] [blame] | 1471 | /* |
| 1472 | * keep mdio-mux ahead of mdio so that the mux is removed first at the |
| 1473 | * end of the test. If parent mdio is removed first, clean-up of the |
| 1474 | * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio |
| 1475 | * active at the end of the test. That it turn doesn't allow the mdio |
| 1476 | * class to be destroyed, triggering an error. |
| 1477 | */ |
| 1478 | mdio-mux-test { |
| 1479 | compatible = "sandbox,mdio-mux"; |
| 1480 | #address-cells = <1>; |
| 1481 | #size-cells = <0>; |
| 1482 | mdio-parent-bus = <&mdio>; |
| 1483 | |
| 1484 | mdio-ch-test@0 { |
| 1485 | reg = <0>; |
| 1486 | }; |
| 1487 | mdio-ch-test@1 { |
| 1488 | reg = <1>; |
| 1489 | }; |
| 1490 | }; |
| 1491 | |
| 1492 | mdio: mdio-test { |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 1493 | compatible = "sandbox,mdio"; |
| 1494 | }; |
Sean Anderson | b786054 | 2020-06-24 06:41:12 -0400 | [diff] [blame] | 1495 | |
| 1496 | pm-bus-test { |
| 1497 | compatible = "simple-pm-bus"; |
| 1498 | clocks = <&clk_sandbox 4>; |
| 1499 | power-domains = <&pwrdom 1>; |
| 1500 | }; |
Sean Anderson | 0c1f6bf | 2020-06-24 06:41:14 -0400 | [diff] [blame] | 1501 | |
| 1502 | resetc2: syscon-reset { |
| 1503 | compatible = "syscon-reset"; |
| 1504 | #reset-cells = <1>; |
| 1505 | regmap = <&syscon0>; |
| 1506 | offset = <1>; |
| 1507 | mask = <0x27FFFFFF>; |
| 1508 | assert-high = <0>; |
| 1509 | }; |
| 1510 | |
| 1511 | syscon-reset-test { |
| 1512 | compatible = "sandbox,misc_sandbox"; |
| 1513 | resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>; |
| 1514 | reset-names = "valid", "no_mask", "out_of_range"; |
| 1515 | }; |
Jean-Jacques Hiblot | 0b89fc5 | 2020-09-24 10:04:18 +0530 | [diff] [blame] | 1516 | |
Simon Glass | 458b66a | 2020-11-05 06:32:05 -0700 | [diff] [blame] | 1517 | sysinfo { |
| 1518 | compatible = "sandbox,sysinfo-sandbox"; |
| 1519 | }; |
| 1520 | |
Sean Anderson | 1c83067 | 2021-04-20 10:50:58 -0400 | [diff] [blame] | 1521 | sysinfo-gpio { |
| 1522 | compatible = "gpio-sysinfo"; |
| 1523 | gpios = <&gpio_a 15>, <&gpio_a 16>, <&gpio_a 17>; |
| 1524 | revisions = <19>, <5>; |
| 1525 | names = "rev_a", "foo"; |
| 1526 | }; |
| 1527 | |
Jean-Jacques Hiblot | 0b89fc5 | 2020-09-24 10:04:18 +0530 | [diff] [blame] | 1528 | some_regmapped-bus { |
| 1529 | #address-cells = <0x1>; |
| 1530 | #size-cells = <0x1>; |
| 1531 | |
| 1532 | ranges = <0x0 0x0 0x10>; |
| 1533 | compatible = "simple-bus"; |
| 1534 | |
| 1535 | regmap-test_0 { |
| 1536 | reg = <0 0x10>; |
| 1537 | compatible = "sandbox,regmap_test"; |
| 1538 | }; |
| 1539 | }; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 1540 | }; |
Przemyslaw Marczak | 77bee05 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 1541 | |
| 1542 | #include "sandbox_pmic.dtsi" |
Heinrich Schuchardt | e24fdef | 2021-02-18 13:01:35 +0100 | [diff] [blame] | 1543 | #include "cros-ec-keyboard.dtsi" |