blob: be0d74b4acb6e1efb41f306b5c983f334e197d1b [file] [log] [blame]
Patrick Delaunay85b53972018-03-12 10:46:10 +01001if ARCH_STM32MP
2
3config SPL
Patrick Delaunay4c5821d2020-07-24 11:13:31 +02004 select SPL_BOARD_INIT
Patrick Delaunay85b53972018-03-12 10:46:10 +01005 select SPL_CLK
6 select SPL_DM
7 select SPL_DM_SEQ_ALIAS
Simon Glass284cb9c2021-07-10 21:14:31 -06008 select SPL_DRIVERS_MISC
Patrick Delaunay85b53972018-03-12 10:46:10 +01009 select SPL_FRAMEWORK
Simon Glass035939e2021-07-10 21:14:30 -060010 select SPL_GPIO
Patrick Delaunay85b53972018-03-12 10:46:10 +010011 select SPL_LIBCOMMON_SUPPORT
12 select SPL_LIBGENERIC_SUPPORT
13 select SPL_OF_CONTROL
14 select SPL_OF_TRANSLATE
15 select SPL_PINCTRL
16 select SPL_REGMAP
Ley Foon Tan9caf7122018-06-14 18:45:19 +080017 select SPL_DM_RESET
Simon Glassf4d60392021-08-08 12:20:12 -060018 select SPL_SERIAL
Patrick Delaunay85b53972018-03-12 10:46:10 +010019 select SPL_SYSCON
Simon Glass1ba1d4e2021-07-10 21:14:28 -060020 select SPL_WATCHDOG if WATCHDOG
Patrick Delaunayf8600202019-04-18 17:32:47 +020021 imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
22 imply SPL_BOOTSTAGE if BOOTSTAGE
Patrick Delaunayaa4e6852019-02-27 17:01:14 +010023 imply SPL_DISPLAY_PRINT
Patrick Delaunay85b53972018-03-12 10:46:10 +010024 imply SPL_LIBDISK_SUPPORT
Simon Glassa5820472021-08-08 12:20:14 -060025 imply SPL_SPI_LOAD if SPL_SPI
Patrick Delaunay85b53972018-03-12 10:46:10 +010026
27config SYS_SOC
28 default "stm32mp"
29
Patrick Delaunay7e517c62019-04-18 17:32:36 +020030config SYS_MALLOC_LEN
31 default 0x2000000
32
Patrick Delaunay088b6762019-04-18 17:32:37 +020033config ENV_SIZE
Patrice Chotardd83bba42019-05-07 18:40:47 +020034 default 0x2000
Patrick Delaunay088b6762019-04-18 17:32:37 +020035
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010036config STM32MP15x
37 bool "Support STMicroelectronics STM32MP15x Soc"
Patrick Delaunay196b7db2021-10-11 09:52:49 +020038 select ARCH_SUPPORT_PSCI
Patrick Delaunay1e2a9b72021-10-13 15:11:18 +020039 select BINMAN
Lokesh Vutla81b1a672018-04-26 18:21:26 +053040 select CPU_V7A
Patrick Delaunay196b7db2021-10-11 09:52:49 +020041 select CPU_V7_HAS_NONSEC
Patrick Delaunaye0207372018-04-16 10:13:24 +020042 select CPU_V7_HAS_VIRT
Patrice Chotarddf290812022-01-20 08:19:15 +010043 select OF_BOARD if TFABOOT
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020044 select OF_BOARD_SETUP
Patrick Delaunay85b53972018-03-12 10:46:10 +010045 select PINCTRL_STM32
Patrick Delaunayb139a5b2018-07-09 15:17:20 +020046 select STM32_RCC
Patrick Delaunay85b53972018-03-12 10:46:10 +010047 select STM32_RESET
Patrick Delaunay4368e562019-07-30 19:16:25 +020048 select STM32_SERIAL
Patrick Delaunayefd00f32022-05-20 18:24:40 +020049 select SUPPORT_SPL
Andre Przywara7b169252018-04-12 04:24:46 +030050 select SYS_ARCH_TIMER
Patrick Delaunay59d0da12020-07-02 17:43:45 +020051 imply CMD_NVEDIT_INFO
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010052 help
53 support of STMicroelectronics SOC STM32MP15x family
54 STM32MP157, STM32MP153 or STM32MP151
55 STMicroelectronics MPU with core ARMv7
56 dual core A7 for STM32MP157/3, monocore for STM32MP151
57 target all the STMicroelectronics board with SOC STM32MP1 family
58
Patrick Delaunayba4b8b02021-07-26 11:21:34 +020059config STM32MP15x_STM32IMAGE
60 bool "Support STM32 image for generated U-Boot image"
61 depends on STM32MP15x && TFABOOT
62 help
63 Support of STM32 image generation for SOC STM32MP15x
64 for TF-A boot when FIP container is not used
65
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010066choice
67 prompt "STM32MP15x board select"
68 optional
69
70config TARGET_ST_STM32MP15x
71 bool "STMicroelectronics STM32MP15x boards"
72 select STM32MP15x
Patrick Delaunay66111eb2020-03-10 10:15:03 +010073 imply BOOTSTAGE
Patrick Delaunay66111eb2020-03-10 10:15:03 +010074 imply CMD_BOOTSTAGE
Patrick Delaunayf97beae2019-12-03 09:38:58 +010075 imply CMD_CLS if CMD_BMP
Patrick Delaunay28a46092019-07-30 19:16:26 +020076 imply DISABLE_CONSOLE
Patrick Delaunayfcb49912019-07-30 19:16:23 +020077 imply PRE_CONSOLE_BUFFER
Patrick Delaunay887d9e42019-07-30 19:16:22 +020078 imply SILENT_CONSOLE
Patrick Delaunay85b53972018-03-12 10:46:10 +010079 help
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010080 target the STMicroelectronics board with SOC STM32MP15x
81 managed by board/st/stm32mp1:
82 Evalulation board (EV1) or Discovery board (DK1 and DK2).
83 The difference between board are managed with devicetree
84
Jagan Teki6cd3dc92021-03-16 21:52:06 +053085config TARGET_MICROGEA_STM32MP1
86 bool "Engicam MicroGEA STM32MP1 SOM"
87 select STM32MP15x
Jagan Teki6cd3dc92021-03-16 21:52:06 +053088 imply BOOTSTAGE
Jagan Teki6cd3dc92021-03-16 21:52:06 +053089 imply CMD_BOOTSTAGE
90 imply CMD_CLS if CMD_BMP
91 imply DISABLE_CONSOLE
92 imply PRE_CONSOLE_BUFFER
93 imply SILENT_CONSOLE
94 help
95 MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
96
97 MicroGEA STM32MP1 MicroDev 2.0:
98 * MicroDev 2.0 is a general purpose miniature carrier board with CAN,
99 LTE and LVDS panel interfaces.
100 * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
101 for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
102
Jagan Teki46f44b52021-03-16 21:52:07 +0530103 MicroGEA STM32MP1 MicroDev 2.0 7" OF:
104 * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
105 panel and toucscreen.
106 * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
107 pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
108 Open Frame Solution board.
109
Jagan Tekic0f218b2021-03-16 21:52:03 +0530110config TARGET_ICORE_STM32MP1
111 bool "Engicam i.Core STM32MP1 SOM"
112 select STM32MP15x
Jagan Tekic0f218b2021-03-16 21:52:03 +0530113 imply BOOTSTAGE
Jagan Tekic0f218b2021-03-16 21:52:03 +0530114 imply CMD_BOOTSTAGE
115 imply CMD_CLS if CMD_BMP
116 imply DISABLE_CONSOLE
117 imply PRE_CONSOLE_BUFFER
118 imply SILENT_CONSOLE
119 help
120 i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
121
122 i.Core STM32MP1 EDIMM2.2:
123 * EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
124 * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
125 creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
126
Jagan Teki42597852021-03-16 21:52:04 +0530127 i.Core STM32MP1 C.TOUCH 2.0
128 * C.TOUCH 2.0 is a general purpose Carrier board.
129 * i.Core STM32MP1 needs to mount on top of this Carrier board
130 for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
131
Marek Vasut5ff05292020-01-24 18:39:16 +0100132config TARGET_DH_STM32MP1_PDK2
133 bool "DH STM32MP1 PDK2"
134 select STM32MP15x
Marek Vasut5ff05292020-01-24 18:39:16 +0100135 help
136 Target the DH PDK2 development kit with STM32MP15x SoM.
137
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100138endchoice
Patrick Delaunay85b53972018-03-12 10:46:10 +0100139
140config SYS_TEXT_BASE
Patrick Delaunay85b53972018-03-12 10:46:10 +0100141 default 0xC0100000
Patrick Delaunay85b53972018-03-12 10:46:10 +0100142
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +0100143config NR_DRAM_BANKS
144 default 1
145
Patrick Delaunayab7d6442020-09-04 12:55:19 +0200146config DDR_CACHEABLE_SIZE
147 hex "Size of the DDR marked cacheable in pre-reloc stage"
Patrick Delaunayab7d6442020-09-04 12:55:19 +0200148 default 0x40000000
149 help
150 Define the size of the DDR marked as cacheable in U-Boot
151 pre-reloc stage.
152 This option can be useful to avoid speculatif access
153 to secured area of DDR used by TF-A or OP-TEE before U-Boot
154 initialization.
155 The areas marked "no-map" in device tree should be located
156 before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
157
Patrick Delaunayfc69c682018-03-20 10:54:54 +0100158config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
159 hex "Partition on MMC2 to use to load U-Boot from"
160 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
161 default 1
162 help
163 Partition on the second MMC to load U-Boot from when the MMC is being
164 used in raw mode
165
Patrick Delaunay43f214c2019-07-05 17:20:15 +0200166config STM32_ETZPC
167 bool "STM32 Extended TrustZone Protection"
Patrick Delaunay3a6e3872020-03-10 16:05:43 +0100168 depends on STM32MP15x
Patrick Delaunay43f214c2019-07-05 17:20:15 +0200169 default y
Simon Glass1c383742021-12-18 11:27:51 -0700170 imply BOOTP_SERVERIP
Patrick Delaunay43f214c2019-07-05 17:20:15 +0200171 help
172 Say y to enable STM32 Extended TrustZone Protection
173
Alexandru Gagniuc31aa6972021-07-29 11:47:17 -0500174config STM32_ECDSA_VERIFY
175 bool "STM32 ECDSA verification via the ROM API"
176 depends on SPL_ECDSA_VERIFY
177 default y
178 help
179 Say y to enable the uclass driver for ECDSA verification using the
180 ROM API provided on STM32MP.
181 The ROM API is only available during SPL for now.
182
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200183config CMD_STM32KEY
184 bool "command stm32key to fuse public key hash"
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200185 help
186 fuse public key hash in corresponding fuse used to authenticate
187 binary.
Patrick Delaunayd6c098a2021-06-28 14:55:57 +0200188 This command is used to evaluate the secure boot on stm32mp SOC,
189 it is deactivated by default in real products.
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200190
Patrick Delaunayfcb49912019-07-30 19:16:23 +0200191config PRE_CON_BUF_ADDR
192 default 0xC02FF000
193
194config PRE_CON_BUF_SZ
195 default 4096
196
Patrick Delaunayf8600202019-04-18 17:32:47 +0200197config BOOTSTAGE_STASH_ADDR
198 default 0xC3000000
199
Patrick Delaunay951edb42021-12-07 10:05:59 +0100200if BOOTCOUNT_GENERIC
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +0200201config SYS_BOOTCOUNT_SINGLEWORD
202 default y
203
204# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
205config SYS_BOOTCOUNT_ADDR
206 default 0x5C00A154
207endif
208
Patrick Delaunay82168e82018-05-17 14:50:46 +0200209if DEBUG_UART
210
211config DEBUG_UART_BOARD_INIT
212 default y
213
214# debug on UART4 by default
215config DEBUG_UART_BASE
216 default 0x40010000
217
218# clock source is HSI on reset
219config DEBUG_UART_CLOCK
220 default 64000000
221endif
222
Patrick Delaunay0440d862021-02-25 13:37:00 +0100223source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
Marek Vasut5ff05292020-01-24 18:39:16 +0100224source "board/dhelectronics/dh_stm32mp1/Kconfig"
Jagan Tekic0f218b2021-03-16 21:52:03 +0530225source "board/engicam/stm32mp1/Kconfig"
226source "board/st/stm32mp1/Kconfig"
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +0100227
Patrick Delaunay85b53972018-03-12 10:46:10 +0100228endif