Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 1 | if OMAP54XX |
| 2 | |
Tom Rini | 76acafc | 2022-11-19 18:45:21 -0500 | [diff] [blame] | 3 | config IODELAY_RECALIBRATION |
| 4 | bool |
| 5 | |
Uri Mashiach | e47ae87 | 2017-02-23 15:39:35 +0200 | [diff] [blame] | 6 | config DRA7XX |
| 7 | bool |
Tom Rini | 76acafc | 2022-11-19 18:45:21 -0500 | [diff] [blame] | 8 | select IODELAY_RECALIBRATION |
Tom Rini | 7ea43c5 | 2022-11-16 13:10:32 -0500 | [diff] [blame] | 9 | select SYS_OMAP_ABE_SYSCK |
Uri Mashiach | e47ae87 | 2017-02-23 15:39:35 +0200 | [diff] [blame] | 10 | help |
| 11 | DRA7xx is an OMAP based SOC with Dual Core A-15s. |
| 12 | |
Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 13 | choice |
| 14 | prompt "OMAP5 board select" |
Joe Hershberger | f069960 | 2015-05-12 14:46:23 -0500 | [diff] [blame] | 15 | optional |
Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 16 | |
| 17 | config TARGET_CM_T54 |
| 18 | bool "CompuLab CM-T54" |
| 19 | |
Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 20 | config TARGET_DRA7XX_EVM |
| 21 | bool "TI DRA7XX" |
Tom Rini | 22d567e | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 22 | select BOARD_LATE_INIT |
Uri Mashiach | e47ae87 | 2017-02-23 15:39:35 +0200 | [diff] [blame] | 23 | select DRA7XX |
Masahiro Yamada | 653e9fe | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 24 | select PHYS_64BIT |
Michal Simek | 7e7ba3b | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 25 | select TI_I2C_BOARD_DETECT |
Lokesh Vutla | 68ad506 | 2017-08-21 12:50:51 +0530 | [diff] [blame] | 26 | imply DM_PMIC |
Lokesh Vutla | 68ad506 | 2017-08-21 12:50:51 +0530 | [diff] [blame] | 27 | imply DM_REGULATOR |
| 28 | imply DM_REGULATOR_LP87565 |
Faiz Abbas | 6c198d7 | 2017-11-14 16:12:33 +0530 | [diff] [blame] | 29 | imply DM_THERMAL |
Michal Simek | 7e7ba3b | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 30 | imply PMIC_LP87565 |
| 31 | imply SCSI |
| 32 | imply SPL_THERMAL |
Faiz Abbas | 6c198d7 | 2017-11-14 16:12:33 +0530 | [diff] [blame] | 33 | imply TI_DRA7_THERMAL |
Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 34 | |
Lokesh Vutla | 6c2cfdd | 2016-06-10 09:35:42 +0530 | [diff] [blame] | 35 | config TARGET_AM57XX_EVM |
| 36 | bool "AM57XX" |
Tom Rini | 22d567e | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 37 | select BOARD_LATE_INIT |
Michal Simek | 7e7ba3b | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 38 | select CMD_DDR3 |
Uri Mashiach | e47ae87 | 2017-02-23 15:39:35 +0200 | [diff] [blame] | 39 | select DRA7XX |
Kipisz, Steven | 161f138 | 2016-02-24 12:30:58 -0600 | [diff] [blame] | 40 | select TI_I2C_BOARD_DETECT |
Kory Maincent | 66fd9ec | 2021-05-04 19:31:25 +0200 | [diff] [blame] | 41 | select SUPPORT_EXTENSION_SCAN |
Michal Simek | 7e7ba3b | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 42 | imply DM_THERMAL |
Simon Glass | 0e5faf0 | 2017-06-14 21:28:21 -0600 | [diff] [blame] | 43 | imply SCSI |
Faiz Abbas | 6c198d7 | 2017-11-14 16:12:33 +0530 | [diff] [blame] | 44 | imply SPL_THERMAL |
Faiz Abbas | 6c198d7 | 2017-11-14 16:12:33 +0530 | [diff] [blame] | 45 | imply TI_DRA7_THERMAL |
Felipe Balbi | 4750eb6 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 46 | |
Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 47 | endchoice |
| 48 | |
Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 49 | config SYS_SOC |
Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 50 | default "omap5" |
| 51 | |
Tom Rini | 50e221a | 2017-05-12 22:33:17 -0400 | [diff] [blame] | 52 | config OMAP_PLATFORM_RESET_TIME_MAX_USEC |
| 53 | int "Something" |
| 54 | range 0 31219 |
| 55 | default 31219 |
| 56 | help |
| 57 | Most OMAPs' provide a way to specify the time for which the reset |
| 58 | should be held low while the voltages and Oscillator outputs |
| 59 | stabilize. |
| 60 | This time is mostly board and PMIC dependent. Hence the boards are |
| 61 | expected to specify a pre-computed time using the above option. |
| 62 | This value can be computed using a summation of the below 3 |
| 63 | parameters |
| 64 | 1: Time taken by the Osciallator to stop and restart |
| 65 | 2: PMIC OTP time |
| 66 | 3: Voltage ramp time, which can be derived using the PMIC slew rate |
| 67 | and value of voltage ramp needed. |
| 68 | |
Suman Anna | f28b26c | 2016-11-23 12:54:40 +0530 | [diff] [blame] | 69 | if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM |
| 70 | menu "Voltage Domain OPP selections" |
| 71 | |
| 72 | choice |
| 73 | prompt "MPU Voltage Domain" |
| 74 | default DRA7_MPU_OPP_NOM |
| 75 | help |
| 76 | Select the Operating Performance Point(OPP) for the MPU voltage |
| 77 | domain on DRA7xx & AM57xx SoCs. |
| 78 | |
| 79 | config DRA7_MPU_OPP_NOM |
| 80 | bool "OPP NOM" |
| 81 | help |
| 82 | This config option enables Normal OPP for MPU. This is the safest |
| 83 | option for booting. |
| 84 | |
| 85 | endchoice |
| 86 | |
| 87 | choice |
| 88 | prompt "DSPEVE Voltage Domain" |
| 89 | help |
| 90 | Select the Operating Performance Point(OPP) for the DSPEVE voltage |
| 91 | domain on DRA7xx & AM57xx SoCs. |
| 92 | |
| 93 | config DRA7_DSPEVE_OPP_NOM |
| 94 | bool "OPP NOM" |
| 95 | help |
| 96 | This config option enables Normal OPP for DSPEVE. This is the safest |
| 97 | option for booting and choose this when unsure about other OPPs . |
| 98 | |
| 99 | config DRA7_DSPEVE_OPP_OD |
| 100 | bool "OPP OD" |
| 101 | help |
| 102 | This config option enables Over drive OPP for DSPEVE. |
| 103 | |
| 104 | config DRA7_DSPEVE_OPP_HIGH |
| 105 | bool "OPP HIGH" |
| 106 | help |
| 107 | This config option enables High OPP for DSPEVE. |
| 108 | |
| 109 | endchoice |
| 110 | |
| 111 | choice |
| 112 | prompt "IVA Voltage Domain" |
| 113 | help |
| 114 | Select the Operating Performance Point(OPP) for the IVA voltage |
| 115 | domain on DRA7xx & AM57xx SoCs. |
| 116 | |
| 117 | config DRA7_IVA_OPP_NOM |
| 118 | bool "OPP NOM" |
| 119 | help |
| 120 | This config option enables Normal OPP for IVA. This is the safest |
| 121 | option for booting and choose this when unsure about other OPPs . |
| 122 | |
| 123 | config DRA7_IVA_OPP_OD |
| 124 | bool "OPP OD" |
| 125 | help |
| 126 | This config option enables Over drive OPP for IVA. |
| 127 | |
| 128 | config DRA7_IVA_OPP_HIGH |
| 129 | bool "OPP HIGH" |
| 130 | help |
| 131 | This config option enables High OPP for IVA. |
| 132 | |
| 133 | endchoice |
| 134 | |
| 135 | choice |
| 136 | prompt "GPU Voltage Domain" |
| 137 | help |
| 138 | Select the Operating Performance Point(OPP) for the GPU voltage |
| 139 | domain on DRA7xx & AM57xx SoCs. |
| 140 | |
| 141 | config DRA7_GPU_OPP_NOM |
| 142 | bool "OPP NOM" |
| 143 | help |
| 144 | This config option enables Normal OPP for GPU. This is the safest |
| 145 | option for booting and choose this when unsure about other OPPs . |
| 146 | |
| 147 | config DRA7_GPU_OPP_OD |
| 148 | bool "OPP OD" |
| 149 | help |
| 150 | This config option enables Over drive OPP for GPU. |
| 151 | |
| 152 | config DRA7_GPU_OPP_HIGH |
| 153 | bool "OPP HIGH" |
| 154 | help |
| 155 | This config option enables High OPP for GPU. |
| 156 | |
| 157 | endchoice |
| 158 | |
| 159 | endmenu |
| 160 | endif |
| 161 | |
Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 162 | source "board/ti/dra7xx/Kconfig" |
Kipisz, Steven | 1dacd0d | 2015-10-29 16:50:43 -0500 | [diff] [blame] | 163 | source "board/ti/am57xx/Kconfig" |
Masahiro Yamada | 420b816 | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 164 | |
| 165 | endif |