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git01.mediatek.com / filogic / uboot / 6c198d7a5d25b232bd31c799d1da42317650f185 / . / arch / arm / mach-omap2 / omap5 / Kconfig
blob: 8c1730a6be0a67019f2b71b02a2015e333b756a2 [file] [log] [blame]
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]1if OMAP54XX
2
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]3config DRA7XX
4 bool
5 help
6 DRA7xx is an OMAP based SOC with Dual Core A-15s.
7
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]8choice
9 prompt "OMAP5 board select"
Joe Hershbergerf0699602015-05-12 14:46:23 -0500[diff] [blame]10 optional
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]11
Dmitry Lifshitz10a59d02016-12-28 18:28:33 +0200[diff] [blame]12config TARGET_CL_SOM_AM57X
13 bool "CompuLab CL-SOM-AM57x"
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]14 select DRA7XX
Dmitry Lifshitz10a59d02016-12-28 18:28:33 +0200[diff] [blame]15
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]16config TARGET_CM_T54
17 bool "CompuLab CM-T54"
18
19config TARGET_OMAP5_UEVM
20 bool "TI OMAP5 uEVM board"
21
22config TARGET_DRA7XX_EVM
23 bool "TI DRA7XX"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]24 select BOARD_LATE_INIT
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]25 select DRA7XX
Lokesh Vutla3c7dc012016-03-08 09:18:05 +0530[diff] [blame]26 select TI_I2C_BOARD_DETECT
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900[diff] [blame]27 select PHYS_64BIT
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]28 imply SCSI
Lokesh Vutla68ad5062017-08-21 12:50:51 +0530[diff] [blame]29 imply DM_PMIC
30 imply PMIC_LP87565
31 imply DM_REGULATOR
32 imply DM_REGULATOR_LP87565
Faiz Abbas6c198d72017-11-14 16:12:33 +0530[diff] [blame^]33 imply SPL_THERMAL
34 imply DM_THERMAL
35 imply TI_DRA7_THERMAL
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]36
Lokesh Vutla6c2cfdd2016-06-10 09:35:42 +0530[diff] [blame]37config TARGET_AM57XX_EVM
38 bool "AM57XX"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]39 select BOARD_LATE_INIT
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]40 select DRA7XX
Kipisz, Steven161f1382016-02-24 12:30:58 -0600[diff] [blame]41 select TI_I2C_BOARD_DETECT
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]42 imply SCSI
Faiz Abbas6c198d72017-11-14 16:12:33 +0530[diff] [blame^]43 imply SPL_THERMAL
44 imply DM_THERMAL
45 imply TI_DRA7_THERMAL
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]46
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]47endchoice
48
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]49config SYS_SOC
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]50 default "omap5"
51
Tom Rini50e221a2017-05-12 22:33:17 -0400[diff] [blame]52config OMAP_PLATFORM_RESET_TIME_MAX_USEC
53 int "Something"
54 range 0 31219
55 default 31219
56 help
57 Most OMAPs' provide a way to specify the time for which the reset
58 should be held low while the voltages and Oscillator outputs
59 stabilize.
60 This time is mostly board and PMIC dependent. Hence the boards are
61 expected to specify a pre-computed time using the above option.
62 This value can be computed using a summation of the below 3
63 parameters
64 1: Time taken by the Osciallator to stop and restart
65 2: PMIC OTP time
66 3: Voltage ramp time, which can be derived using the PMIC slew rate
67 and value of voltage ramp needed.
68
Suman Annaf28b26c2016-11-23 12:54:40 +0530[diff] [blame]69if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM
70menu "Voltage Domain OPP selections"
71
72choice
73 prompt "MPU Voltage Domain"
74 default DRA7_MPU_OPP_NOM
75 help
76 Select the Operating Performance Point(OPP) for the MPU voltage
77 domain on DRA7xx & AM57xx SoCs.
78
79config DRA7_MPU_OPP_NOM
80 bool "OPP NOM"
81 help
82 This config option enables Normal OPP for MPU. This is the safest
83 option for booting.
84
85endchoice
86
87choice
88 prompt "DSPEVE Voltage Domain"
89 help
90 Select the Operating Performance Point(OPP) for the DSPEVE voltage
91 domain on DRA7xx & AM57xx SoCs.
92
93config DRA7_DSPEVE_OPP_NOM
94 bool "OPP NOM"
95 help
96 This config option enables Normal OPP for DSPEVE. This is the safest
97 option for booting and choose this when unsure about other OPPs .
98
99config DRA7_DSPEVE_OPP_OD
100 bool "OPP OD"
101 help
102 This config option enables Over drive OPP for DSPEVE.
103
104config DRA7_DSPEVE_OPP_HIGH
105 bool "OPP HIGH"
106 help
107 This config option enables High OPP for DSPEVE.
108
109endchoice
110
111choice
112 prompt "IVA Voltage Domain"
113 help
114 Select the Operating Performance Point(OPP) for the IVA voltage
115 domain on DRA7xx & AM57xx SoCs.
116
117config DRA7_IVA_OPP_NOM
118 bool "OPP NOM"
119 help
120 This config option enables Normal OPP for IVA. This is the safest
121 option for booting and choose this when unsure about other OPPs .
122
123config DRA7_IVA_OPP_OD
124 bool "OPP OD"
125 help
126 This config option enables Over drive OPP for IVA.
127
128config DRA7_IVA_OPP_HIGH
129 bool "OPP HIGH"
130 help
131 This config option enables High OPP for IVA.
132
133endchoice
134
135choice
136 prompt "GPU Voltage Domain"
137 help
138 Select the Operating Performance Point(OPP) for the GPU voltage
139 domain on DRA7xx & AM57xx SoCs.
140
141config DRA7_GPU_OPP_NOM
142 bool "OPP NOM"
143 help
144 This config option enables Normal OPP for GPU. This is the safest
145 option for booting and choose this when unsure about other OPPs .
146
147config DRA7_GPU_OPP_OD
148 bool "OPP OD"
149 help
150 This config option enables Over drive OPP for GPU.
151
152config DRA7_GPU_OPP_HIGH
153 bool "OPP HIGH"
154 help
155 This config option enables High OPP for GPU.
156
157endchoice
158
159endmenu
160endif
161
Dmitry Lifshitz10a59d02016-12-28 18:28:33 +0200[diff] [blame]162source "board/compulab/cl-som-am57x/Kconfig"
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]163source "board/compulab/cm_t54/Kconfig"
164source "board/ti/omap5_uevm/Kconfig"
165source "board/ti/dra7xx/Kconfig"
Kipisz, Steven1dacd0d2015-10-29 16:50:43 -0500[diff] [blame]166source "board/ti/am57xx/Kconfig"
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]167
168endif