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git01.mediatek.com / filogic / uboot / 68ad50616d7dc4cb78466809d1e4b70c9943cde4 / . / arch / arm / mach-omap2 / omap5 / Kconfig
blob: 8f58235baf9d4f9997adcd281e932c57f304f13c [file] [log] [blame]
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]1if OMAP54XX
2
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]3config DRA7XX
4 bool
5 help
6 DRA7xx is an OMAP based SOC with Dual Core A-15s.
7
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]8choice
9 prompt "OMAP5 board select"
Joe Hershbergerf0699602015-05-12 14:46:23 -0500[diff] [blame]10 optional
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]11
Dmitry Lifshitz10a59d02016-12-28 18:28:33 +0200[diff] [blame]12config TARGET_CL_SOM_AM57X
13 bool "CompuLab CL-SOM-AM57x"
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]14 select DRA7XX
Dmitry Lifshitz10a59d02016-12-28 18:28:33 +0200[diff] [blame]15
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]16config TARGET_CM_T54
17 bool "CompuLab CM-T54"
18
19config TARGET_OMAP5_UEVM
20 bool "TI OMAP5 uEVM board"
21
22config TARGET_DRA7XX_EVM
23 bool "TI DRA7XX"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]24 select BOARD_LATE_INIT
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]25 select DRA7XX
Lokesh Vutla3c7dc012016-03-08 09:18:05 +0530[diff] [blame]26 select TI_I2C_BOARD_DETECT
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900[diff] [blame]27 select PHYS_64BIT
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]28 imply SCSI
Lokesh Vutla68ad5062017-08-21 12:50:51 +0530[diff] [blame^]29 imply DM_PMIC
30 imply PMIC_LP87565
31 imply DM_REGULATOR
32 imply DM_REGULATOR_LP87565
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]33
Lokesh Vutla6c2cfdd2016-06-10 09:35:42 +0530[diff] [blame]34config TARGET_AM57XX_EVM
35 bool "AM57XX"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]36 select BOARD_LATE_INIT
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]37 select DRA7XX
Kipisz, Steven161f1382016-02-24 12:30:58 -0600[diff] [blame]38 select TI_I2C_BOARD_DETECT
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]39 imply SCSI
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]40
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]41endchoice
42
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]43config SYS_SOC
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]44 default "omap5"
45
Tom Rini50e221a2017-05-12 22:33:17 -0400[diff] [blame]46config OMAP_PLATFORM_RESET_TIME_MAX_USEC
47 int "Something"
48 range 0 31219
49 default 31219
50 help
51 Most OMAPs' provide a way to specify the time for which the reset
52 should be held low while the voltages and Oscillator outputs
53 stabilize.
54 This time is mostly board and PMIC dependent. Hence the boards are
55 expected to specify a pre-computed time using the above option.
56 This value can be computed using a summation of the below 3
57 parameters
58 1: Time taken by the Osciallator to stop and restart
59 2: PMIC OTP time
60 3: Voltage ramp time, which can be derived using the PMIC slew rate
61 and value of voltage ramp needed.
62
Suman Annaf28b26c2016-11-23 12:54:40 +0530[diff] [blame]63if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM
64menu "Voltage Domain OPP selections"
65
66choice
67 prompt "MPU Voltage Domain"
68 default DRA7_MPU_OPP_NOM
69 help
70 Select the Operating Performance Point(OPP) for the MPU voltage
71 domain on DRA7xx & AM57xx SoCs.
72
73config DRA7_MPU_OPP_NOM
74 bool "OPP NOM"
75 help
76 This config option enables Normal OPP for MPU. This is the safest
77 option for booting.
78
79endchoice
80
81choice
82 prompt "DSPEVE Voltage Domain"
83 help
84 Select the Operating Performance Point(OPP) for the DSPEVE voltage
85 domain on DRA7xx & AM57xx SoCs.
86
87config DRA7_DSPEVE_OPP_NOM
88 bool "OPP NOM"
89 help
90 This config option enables Normal OPP for DSPEVE. This is the safest
91 option for booting and choose this when unsure about other OPPs .
92
93config DRA7_DSPEVE_OPP_OD
94 bool "OPP OD"
95 help
96 This config option enables Over drive OPP for DSPEVE.
97
98config DRA7_DSPEVE_OPP_HIGH
99 bool "OPP HIGH"
100 help
101 This config option enables High OPP for DSPEVE.
102
103endchoice
104
105choice
106 prompt "IVA Voltage Domain"
107 help
108 Select the Operating Performance Point(OPP) for the IVA voltage
109 domain on DRA7xx & AM57xx SoCs.
110
111config DRA7_IVA_OPP_NOM
112 bool "OPP NOM"
113 help
114 This config option enables Normal OPP for IVA. This is the safest
115 option for booting and choose this when unsure about other OPPs .
116
117config DRA7_IVA_OPP_OD
118 bool "OPP OD"
119 help
120 This config option enables Over drive OPP for IVA.
121
122config DRA7_IVA_OPP_HIGH
123 bool "OPP HIGH"
124 help
125 This config option enables High OPP for IVA.
126
127endchoice
128
129choice
130 prompt "GPU Voltage Domain"
131 help
132 Select the Operating Performance Point(OPP) for the GPU voltage
133 domain on DRA7xx & AM57xx SoCs.
134
135config DRA7_GPU_OPP_NOM
136 bool "OPP NOM"
137 help
138 This config option enables Normal OPP for GPU. This is the safest
139 option for booting and choose this when unsure about other OPPs .
140
141config DRA7_GPU_OPP_OD
142 bool "OPP OD"
143 help
144 This config option enables Over drive OPP for GPU.
145
146config DRA7_GPU_OPP_HIGH
147 bool "OPP HIGH"
148 help
149 This config option enables High OPP for GPU.
150
151endchoice
152
153endmenu
154endif
155
Dmitry Lifshitz10a59d02016-12-28 18:28:33 +0200[diff] [blame]156source "board/compulab/cl-som-am57x/Kconfig"
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]157source "board/compulab/cm_t54/Kconfig"
158source "board/ti/omap5_uevm/Kconfig"
159source "board/ti/dra7xx/Kconfig"
Kipisz, Steven1dacd0d2015-10-29 16:50:43 -0500[diff] [blame]160source "board/ti/am57xx/Kconfig"
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]161
162endif