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git01.mediatek.com / filogic / uboot / 7ea43c580c00ba8c85fbdeb4fa4ec340282724f2 / . / arch / arm / mach-omap2 / omap5 / Kconfig
blob: 18a66764224dcafb71db72ac8e1013ece6667dc7 [file] [log] [blame]
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]1if OMAP54XX
2
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]3config DRA7XX
4 bool
Tom Rini7ea43c52022-11-16 13:10:32 -0500[diff] [blame^]5 select SYS_OMAP_ABE_SYSCK
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]6 help
7 DRA7xx is an OMAP based SOC with Dual Core A-15s.
8
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]9choice
10 prompt "OMAP5 board select"
Joe Hershbergerf0699602015-05-12 14:46:23 -0500[diff] [blame]11 optional
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]12
13config TARGET_CM_T54
14 bool "CompuLab CM-T54"
15
16config TARGET_OMAP5_UEVM
17 bool "TI OMAP5 uEVM board"
18
19config TARGET_DRA7XX_EVM
20 bool "TI DRA7XX"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]21 select BOARD_LATE_INIT
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]22 select DRA7XX
Masahiro Yamada653e9fe2016-07-25 19:56:03 +0900[diff] [blame]23 select PHYS_64BIT
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]24 select TI_I2C_BOARD_DETECT
Lokesh Vutla68ad5062017-08-21 12:50:51 +0530[diff] [blame]25 imply DM_PMIC
Lokesh Vutla68ad5062017-08-21 12:50:51 +0530[diff] [blame]26 imply DM_REGULATOR
27 imply DM_REGULATOR_LP87565
Faiz Abbas6c198d72017-11-14 16:12:33 +0530[diff] [blame]28 imply DM_THERMAL
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]29 imply PMIC_LP87565
30 imply SCSI
31 imply SPL_THERMAL
Faiz Abbas6c198d72017-11-14 16:12:33 +0530[diff] [blame]32 imply TI_DRA7_THERMAL
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]33
Lokesh Vutla6c2cfdd2016-06-10 09:35:42 +0530[diff] [blame]34config TARGET_AM57XX_EVM
35 bool "AM57XX"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]36 select BOARD_LATE_INIT
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]37 select CMD_DDR3
Uri Mashiache47ae872017-02-23 15:39:35 +0200[diff] [blame]38 select DRA7XX
Kipisz, Steven161f1382016-02-24 12:30:58 -0600[diff] [blame]39 select TI_I2C_BOARD_DETECT
Kory Maincent66fd9ec2021-05-04 19:31:25 +0200[diff] [blame]40 select SUPPORT_EXTENSION_SCAN
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]41 imply DM_THERMAL
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]42 imply SCSI
Faiz Abbas6c198d72017-11-14 16:12:33 +0530[diff] [blame]43 imply SPL_THERMAL
Faiz Abbas6c198d72017-11-14 16:12:33 +0530[diff] [blame]44 imply TI_DRA7_THERMAL
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]45
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]46endchoice
47
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]48config SYS_SOC
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]49 default "omap5"
50
Tom Rini50e221a2017-05-12 22:33:17 -0400[diff] [blame]51config OMAP_PLATFORM_RESET_TIME_MAX_USEC
52 int "Something"
53 range 0 31219
54 default 31219
55 help
56 Most OMAPs' provide a way to specify the time for which the reset
57 should be held low while the voltages and Oscillator outputs
58 stabilize.
59 This time is mostly board and PMIC dependent. Hence the boards are
60 expected to specify a pre-computed time using the above option.
61 This value can be computed using a summation of the below 3
62 parameters
63 1: Time taken by the Osciallator to stop and restart
64 2: PMIC OTP time
65 3: Voltage ramp time, which can be derived using the PMIC slew rate
66 and value of voltage ramp needed.
67
Suman Annaf28b26c2016-11-23 12:54:40 +0530[diff] [blame]68if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM
69menu "Voltage Domain OPP selections"
70
71choice
72 prompt "MPU Voltage Domain"
73 default DRA7_MPU_OPP_NOM
74 help
75 Select the Operating Performance Point(OPP) for the MPU voltage
76 domain on DRA7xx & AM57xx SoCs.
77
78config DRA7_MPU_OPP_NOM
79 bool "OPP NOM"
80 help
81 This config option enables Normal OPP for MPU. This is the safest
82 option for booting.
83
84endchoice
85
86choice
87 prompt "DSPEVE Voltage Domain"
88 help
89 Select the Operating Performance Point(OPP) for the DSPEVE voltage
90 domain on DRA7xx & AM57xx SoCs.
91
92config DRA7_DSPEVE_OPP_NOM
93 bool "OPP NOM"
94 help
95 This config option enables Normal OPP for DSPEVE. This is the safest
96 option for booting and choose this when unsure about other OPPs .
97
98config DRA7_DSPEVE_OPP_OD
99 bool "OPP OD"
100 help
101 This config option enables Over drive OPP for DSPEVE.
102
103config DRA7_DSPEVE_OPP_HIGH
104 bool "OPP HIGH"
105 help
106 This config option enables High OPP for DSPEVE.
107
108endchoice
109
110choice
111 prompt "IVA Voltage Domain"
112 help
113 Select the Operating Performance Point(OPP) for the IVA voltage
114 domain on DRA7xx & AM57xx SoCs.
115
116config DRA7_IVA_OPP_NOM
117 bool "OPP NOM"
118 help
119 This config option enables Normal OPP for IVA. This is the safest
120 option for booting and choose this when unsure about other OPPs .
121
122config DRA7_IVA_OPP_OD
123 bool "OPP OD"
124 help
125 This config option enables Over drive OPP for IVA.
126
127config DRA7_IVA_OPP_HIGH
128 bool "OPP HIGH"
129 help
130 This config option enables High OPP for IVA.
131
132endchoice
133
134choice
135 prompt "GPU Voltage Domain"
136 help
137 Select the Operating Performance Point(OPP) for the GPU voltage
138 domain on DRA7xx & AM57xx SoCs.
139
140config DRA7_GPU_OPP_NOM
141 bool "OPP NOM"
142 help
143 This config option enables Normal OPP for GPU. This is the safest
144 option for booting and choose this when unsure about other OPPs .
145
146config DRA7_GPU_OPP_OD
147 bool "OPP OD"
148 help
149 This config option enables Over drive OPP for GPU.
150
151config DRA7_GPU_OPP_HIGH
152 bool "OPP HIGH"
153 help
154 This config option enables High OPP for GPU.
155
156endchoice
157
158endmenu
159endif
160
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]161source "board/ti/omap5_uevm/Kconfig"
162source "board/ti/dra7xx/Kconfig"
Kipisz, Steven1dacd0d2015-10-29 16:50:43 -0500[diff] [blame]163source "board/ti/am57xx/Kconfig"
Masahiro Yamada420b8162014-08-31 07:11:04 +0900[diff] [blame]164
165endif