blob: c9bc0841949de745ed73f5db5129a6be778c86db [file] [log] [blame]
Patrick Delaunay85b53972018-03-12 10:46:10 +01001if ARCH_STM32MP
2
3config SPL
4 select SPL_BOARD_INIT
5 select SPL_CLK
6 select SPL_DM
7 select SPL_DM_SEQ_ALIAS
Patrick Delaunay636279a2018-07-09 15:17:21 +02008 select SPL_DRIVERS_MISC_SUPPORT
Patrick Delaunay85b53972018-03-12 10:46:10 +01009 select SPL_FRAMEWORK
10 select SPL_GPIO_SUPPORT
11 select SPL_LIBCOMMON_SUPPORT
12 select SPL_LIBGENERIC_SUPPORT
13 select SPL_OF_CONTROL
14 select SPL_OF_TRANSLATE
15 select SPL_PINCTRL
16 select SPL_REGMAP
Ley Foon Tan9caf7122018-06-14 18:45:19 +080017 select SPL_DM_RESET
Patrick Delaunay85b53972018-03-12 10:46:10 +010018 select SPL_SERIAL_SUPPORT
Patrick Delaunayfbe54572019-07-30 19:16:36 +020019 select SPL_SPI_LOAD
Patrick Delaunay85b53972018-03-12 10:46:10 +010020 select SPL_SYSCON
Patrick Delaunay8bbadde2019-07-30 19:16:33 +020021 select SPL_WATCHDOG_SUPPORT if WATCHDOG
Patrick Delaunayf8600202019-04-18 17:32:47 +020022 imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
23 imply SPL_BOOTSTAGE if BOOTSTAGE
Patrick Delaunayaa4e6852019-02-27 17:01:14 +010024 imply SPL_DISPLAY_PRINT
Patrick Delaunay85b53972018-03-12 10:46:10 +010025 imply SPL_LIBDISK_SUPPORT
26
27config SYS_SOC
28 default "stm32mp"
29
Patrick Delaunay7e517c62019-04-18 17:32:36 +020030config SYS_MALLOC_LEN
31 default 0x2000000
32
Patrick Delaunay088b6762019-04-18 17:32:37 +020033config ENV_SIZE
Patrice Chotardd83bba42019-05-07 18:40:47 +020034 default 0x2000
Patrick Delaunay088b6762019-04-18 17:32:37 +020035
Patrick Delaunay85b53972018-03-12 10:46:10 +010036config TARGET_STM32MP1
37 bool "Support stm32mp1xx"
Patrick Delaunay5d061412019-02-12 11:44:39 +010038 select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED
Lokesh Vutla81b1a672018-04-26 18:21:26 +053039 select CPU_V7A
Patrick Delaunay5d061412019-02-12 11:44:39 +010040 select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED
Patrick Delaunaye0207372018-04-16 10:13:24 +020041 select CPU_V7_HAS_VIRT
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020042 select OF_BOARD_SETUP
Patrick Delaunay85b53972018-03-12 10:46:10 +010043 select PINCTRL_STM32
Patrick Delaunayb139a5b2018-07-09 15:17:20 +020044 select STM32_RCC
Patrick Delaunay85b53972018-03-12 10:46:10 +010045 select STM32_RESET
Patrick Delaunay4368e562019-07-30 19:16:25 +020046 select STM32_SERIAL
Andre Przywara7b169252018-04-12 04:24:46 +030047 select SYS_ARCH_TIMER
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +020048 imply BOOTCOUNT_LIMIT
Patrick Delaunayf8600202019-04-18 17:32:47 +020049 imply BOOTSTAGE
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +020050 imply CMD_BOOTCOUNT
Patrick Delaunayf8600202019-04-18 17:32:47 +020051 imply CMD_BOOTSTAGE
Patrick Delaunay28a46092019-07-30 19:16:26 +020052 imply DISABLE_CONSOLE
Patrick Delaunayfcb49912019-07-30 19:16:23 +020053 imply PRE_CONSOLE_BUFFER
Patrick Delaunay887d9e42019-07-30 19:16:22 +020054 imply SILENT_CONSOLE
Patrick Delaunay5d061412019-02-12 11:44:39 +010055 imply SYSRESET_PSCI if STM32MP1_TRUSTED
56 imply SYSRESET_SYSCON if !STM32MP1_TRUSTED
Patrick Delaunay85b53972018-03-12 10:46:10 +010057 help
58 target STMicroelectronics SOC STM32MP1 family
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010059 STM32MP157, STM32MP153 or STM32MP151
Patrick Delaunay85b53972018-03-12 10:46:10 +010060 STMicroelectronics MPU with core ARMv7
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010061 dual core A7 for STM32MP157/3, monocore for STM32MP151
Patrick Delaunay85b53972018-03-12 10:46:10 +010062
Patrick Delaunay5d061412019-02-12 11:44:39 +010063config STM32MP1_TRUSTED
64 bool "Support trusted boot with TF-A"
65 default y if !SPL
66 select ARM_SMCCC
67 help
68 Say Y here to enable boot with TF-A
69 Trusted boot chain is :
70 BootRom => TF-A.stm32 (clock & DDR) => U-Boot.stm32
Patrick Delaunayff215a42019-07-02 13:26:06 +020071 TF-A monitor provides proprietary SMC to manage secure devices
72
73config STM32MP1_OPTEE
74 bool "Support trusted boot with TF-A and OP-TEE"
75 depends on STM32MP1_TRUSTED
76 default n
77 help
78 Say Y here to enable boot with TF-A and OP-TEE
79 Trusted boot chain is :
80 BootRom => TF-A.stm32 (clock & DDR) => OP-TEE => U-Boot.stm32
81 OP-TEE monitor provides ST SMC to access to secure resources
Patrick Delaunay5d061412019-02-12 11:44:39 +010082
Patrick Delaunay85b53972018-03-12 10:46:10 +010083config SYS_TEXT_BASE
84 prompt "U-Boot base address"
85 default 0xC0100000
86 help
87 configure the U-Boot base address
88 when DDR driver is used:
89 DDR + 1MB (0xC0100000)
90
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010091config NR_DRAM_BANKS
92 default 1
93
Patrick Delaunayfc69c682018-03-20 10:54:54 +010094config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
95 hex "Partition on MMC2 to use to load U-Boot from"
96 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
97 default 1
98 help
99 Partition on the second MMC to load U-Boot from when the MMC is being
100 used in raw mode
101
Patrick Delaunay43f214c2019-07-05 17:20:15 +0200102config STM32_ETZPC
103 bool "STM32 Extended TrustZone Protection"
104 depends on TARGET_STM32MP1
105 default y
106 help
107 Say y to enable STM32 Extended TrustZone Protection
108
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200109config CMD_STM32KEY
110 bool "command stm32key to fuse public key hash"
111 default y
112 depends on CMD_FUSE
113 help
114 fuse public key hash in corresponding fuse used to authenticate
115 binary.
116
Patrick Delaunayfcb49912019-07-30 19:16:23 +0200117
118config PRE_CON_BUF_ADDR
119 default 0xC02FF000
120
121config PRE_CON_BUF_SZ
122 default 4096
123
Patrick Delaunayf8600202019-04-18 17:32:47 +0200124config BOOTSTAGE_STASH_ADDR
125 default 0xC3000000
126
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +0200127if BOOTCOUNT_LIMIT
128config SYS_BOOTCOUNT_SINGLEWORD
129 default y
130
131# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
132config SYS_BOOTCOUNT_ADDR
133 default 0x5C00A154
134endif
135
Patrick Delaunay82168e82018-05-17 14:50:46 +0200136if DEBUG_UART
137
138config DEBUG_UART_BOARD_INIT
139 default y
140
141# debug on UART4 by default
142config DEBUG_UART_BASE
143 default 0x40010000
144
145# clock source is HSI on reset
146config DEBUG_UART_CLOCK
147 default 64000000
148endif
149
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +0100150source "board/st/stm32mp1/Kconfig"
151
Patrick Delaunay85b53972018-03-12 10:46:10 +0100152endif