Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 1 | if ARCH_STM32MP |
| 2 | |
| 3 | config SPL |
| 4 | select SPL_BOARD_INIT |
| 5 | select SPL_CLK |
| 6 | select SPL_DM |
| 7 | select SPL_DM_SEQ_ALIAS |
Patrick Delaunay | 636279a | 2018-07-09 15:17:21 +0200 | [diff] [blame] | 8 | select SPL_DRIVERS_MISC_SUPPORT |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 9 | select SPL_FRAMEWORK |
| 10 | select SPL_GPIO_SUPPORT |
| 11 | select SPL_LIBCOMMON_SUPPORT |
| 12 | select SPL_LIBGENERIC_SUPPORT |
| 13 | select SPL_OF_CONTROL |
| 14 | select SPL_OF_TRANSLATE |
| 15 | select SPL_PINCTRL |
| 16 | select SPL_REGMAP |
Ley Foon Tan | 9caf712 | 2018-06-14 18:45:19 +0800 | [diff] [blame] | 17 | select SPL_DM_RESET |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 18 | select SPL_SERIAL_SUPPORT |
| 19 | select SPL_SYSCON |
Patrick Delaunay | 32ddd26 | 2018-03-20 14:15:06 +0100 | [diff] [blame] | 20 | select SPL_DRIVERS_MISC_SUPPORT |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 21 | imply SPL_LIBDISK_SUPPORT |
| 22 | |
| 23 | config SYS_SOC |
| 24 | default "stm32mp" |
| 25 | |
| 26 | config TARGET_STM32MP1 |
| 27 | bool "Support stm32mp1xx" |
Patrick Delaunay | 5d06141 | 2019-02-12 11:44:39 +0100 | [diff] [blame^] | 28 | select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED |
Lokesh Vutla | 81b1a67 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 29 | select CPU_V7A |
Patrick Delaunay | 5d06141 | 2019-02-12 11:44:39 +0100 | [diff] [blame^] | 30 | select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED |
Patrick Delaunay | e020737 | 2018-04-16 10:13:24 +0200 | [diff] [blame] | 31 | select CPU_V7_HAS_VIRT |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 32 | select PINCTRL_STM32 |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 33 | select STM32_RCC |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 34 | select STM32_RESET |
Andre Przywara | 7b16925 | 2018-04-12 04:24:46 +0300 | [diff] [blame] | 35 | select SYS_ARCH_TIMER |
Patrick Delaunay | 5d06141 | 2019-02-12 11:44:39 +0100 | [diff] [blame^] | 36 | imply SYSRESET_PSCI if STM32MP1_TRUSTED |
| 37 | imply SYSRESET_SYSCON if !STM32MP1_TRUSTED |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 38 | help |
| 39 | target STMicroelectronics SOC STM32MP1 family |
| 40 | STMicroelectronics MPU with core ARMv7 |
| 41 | |
Patrick Delaunay | 5d06141 | 2019-02-12 11:44:39 +0100 | [diff] [blame^] | 42 | config STM32MP1_TRUSTED |
| 43 | bool "Support trusted boot with TF-A" |
| 44 | default y if !SPL |
| 45 | select ARM_SMCCC |
| 46 | help |
| 47 | Say Y here to enable boot with TF-A |
| 48 | Trusted boot chain is : |
| 49 | BootRom => TF-A.stm32 (clock & DDR) => U-Boot.stm32 |
| 50 | TF-A monitor provides proprietary smc to manage secure devices |
| 51 | |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 52 | config SYS_TEXT_BASE |
| 53 | prompt "U-Boot base address" |
| 54 | default 0xC0100000 |
| 55 | help |
| 56 | configure the U-Boot base address |
| 57 | when DDR driver is used: |
| 58 | DDR + 1MB (0xC0100000) |
| 59 | |
Patrick Delaunay | fc69c68 | 2018-03-20 10:54:54 +0100 | [diff] [blame] | 60 | config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 |
| 61 | hex "Partition on MMC2 to use to load U-Boot from" |
| 62 | depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION |
| 63 | default 1 |
| 64 | help |
| 65 | Partition on the second MMC to load U-Boot from when the MMC is being |
| 66 | used in raw mode |
| 67 | |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 68 | source "board/st/stm32mp1/Kconfig" |
| 69 | |
Patrick Delaunay | 82168e8 | 2018-05-17 14:50:46 +0200 | [diff] [blame] | 70 | # currently activated for debug / should be deactivated for real product |
| 71 | if DEBUG_UART |
| 72 | |
| 73 | config DEBUG_UART_BOARD_INIT |
| 74 | default y |
| 75 | |
| 76 | # debug on UART4 by default |
| 77 | config DEBUG_UART_BASE |
| 78 | default 0x40010000 |
| 79 | |
| 80 | # clock source is HSI on reset |
| 81 | config DEBUG_UART_CLOCK |
| 82 | default 64000000 |
| 83 | endif |
| 84 | |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 85 | endif |