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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Peng Fanf664c142015-08-13 10:55:34 +08002/*
3 * (C) Copyright 2009
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
Peng Fanf664c142015-08-13 10:55:34 +08005 */
6
7#ifndef _SYS_PROTO_H_
8#define _SYS_PROTO_H_
9
Jagan Tekie5f970b2017-02-24 15:45:12 +053010#include <asm/io.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020011#include <asm/mach-imx/regs-common.h>
Peng Fan415f8952020-05-01 22:08:34 +080012#include <asm/mach-imx/module_fuse.h>
Simon Glass1e268642020-05-10 11:39:55 -060013#include <linux/bitops.h>
Peng Fanf664c142015-08-13 10:55:34 +080014#include "../arch-imx/cpu.h"
15
Simon Glass1e268642020-05-10 11:39:55 -060016struct bd_info;
17
Peng Fanf664c142015-08-13 10:55:34 +080018#define soc_rev() (get_cpu_rev() & 0xFF)
19#define is_soc_rev(rev) (soc_rev() == rev)
20
21/* returns MXC_CPU_ value */
Peng Fan6e3a3802020-02-05 17:44:28 +080022#define cpu_type(rev) (((rev) >> 12) & 0x1ff)
Adrian Alonso1eec27c2015-09-02 13:54:12 -050023#define soc_type(rev) (((rev) >> 12) & 0xf0)
Peng Fanf664c142015-08-13 10:55:34 +080024/* both macros return/take MXC_CPU_ constants */
25#define get_cpu_type() (cpu_type(get_cpu_rev()))
Adrian Alonso1eec27c2015-09-02 13:54:12 -050026#define get_soc_type() (soc_type(get_cpu_rev()))
Peng Fanf664c142015-08-13 10:55:34 +080027#define is_cpu_type(cpu) (get_cpu_type() == cpu)
Adrian Alonso1eec27c2015-09-02 13:54:12 -050028#define is_soc_type(soc) (get_soc_type() == soc)
Peng Fanf664c142015-08-13 10:55:34 +080029
Peng Fan1e4e7622016-05-23 18:35:52 +080030#define is_mx6() (is_soc_type(MXC_SOC_MX6))
31#define is_mx7() (is_soc_type(MXC_SOC_MX7))
Peng Fan39945c12018-11-20 10:19:25 +000032#define is_imx8m() (is_soc_type(MXC_SOC_IMX8M))
Peng Fan36b65172018-10-18 14:28:16 +020033#define is_imx8() (is_soc_type(MXC_SOC_IMX8))
Giulio Benetti3d1a5732021-05-20 16:10:13 +020034#define is_imxrt() (is_soc_type(MXC_SOC_IMXRT))
Peng Fan1e4e7622016-05-23 18:35:52 +080035
Peng Fanf664c142015-08-13 10:55:34 +080036#define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
Peng Fan1e4e7622016-05-23 18:35:52 +080037#define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
38#define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6DL))
Jagan Teki0d6d48b2016-10-08 18:00:11 +053039#define is_mx6dl() (is_cpu_type(MXC_CPU_MX6DL))
Peng Fan1e4e7622016-05-23 18:35:52 +080040#define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX))
41#define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL))
Jagan Teki0d6d48b2016-10-08 18:00:11 +053042#define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO))
Peng Fan1e4e7622016-05-23 18:35:52 +080043#define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL))
Peng Fanad69a062020-02-05 20:17:17 +080044#define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL) || is_cpu_type(MXC_CPU_MX6ULZ))
Peng Fanc53d0c92019-08-08 09:55:52 +000045#define is_mx6ulz() (is_cpu_type(MXC_CPU_MX6ULZ))
Peng Fan4cfd7972016-12-11 19:24:20 +080046#define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))
Peng Fanf664c142015-08-13 10:55:34 +080047
Peng Fan98c57822017-02-22 16:21:46 +080048#define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP))
49
Peng Fan67815082020-02-05 17:34:54 +080050#define is_imx8mq() (is_cpu_type(MXC_CPU_IMX8MQ) || is_cpu_type(MXC_CPU_IMX8MD) || is_cpu_type(MXC_CPU_IMX8MQL))
51#define is_imx8md() (is_cpu_type(MXC_CPU_IMX8MD))
52#define is_imx8mql() (is_cpu_type(MXC_CPU_IMX8MQL))
Peng Fan3e1d1ea2019-08-26 08:11:46 +000053#define is_imx8qm() (is_cpu_type(MXC_CPU_IMX8QM))
Peng Fan5c2218a2021-08-07 16:00:31 +080054#define is_imx8ulp() (is_cpu_type(MXC_CPU_IMX8ULP))
Peng Fan2d22a992019-08-27 06:25:04 +000055#define is_imx8mm() (is_cpu_type(MXC_CPU_IMX8MM) || is_cpu_type(MXC_CPU_IMX8MML) ||\
56 is_cpu_type(MXC_CPU_IMX8MMD) || is_cpu_type(MXC_CPU_IMX8MMDL) || \
57 is_cpu_type(MXC_CPU_IMX8MMS) || is_cpu_type(MXC_CPU_IMX8MMSL))
58#define is_imx8mml() (is_cpu_type(MXC_CPU_IMX8MML))
59#define is_imx8mmd() (is_cpu_type(MXC_CPU_IMX8MMD))
60#define is_imx8mmdl() (is_cpu_type(MXC_CPU_IMX8MMDL))
61#define is_imx8mms() (is_cpu_type(MXC_CPU_IMX8MMS))
62#define is_imx8mmsl() (is_cpu_type(MXC_CPU_IMX8MMSL))
Peng Fan1a07d912020-02-05 17:39:27 +080063#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN) || is_cpu_type(MXC_CPU_IMX8MND) || \
64 is_cpu_type(MXC_CPU_IMX8MNS) || is_cpu_type(MXC_CPU_IMX8MNL) || \
Ye Li715180e2021-03-19 15:57:11 +080065 is_cpu_type(MXC_CPU_IMX8MNDL) || is_cpu_type(MXC_CPU_IMX8MNSL) || \
66 is_cpu_type(MXC_CPU_IMX8MNUD) || is_cpu_type(MXC_CPU_IMX8MNUS) || is_cpu_type(MXC_CPU_IMX8MNUQ))
Peng Fan1a07d912020-02-05 17:39:27 +080067#define is_imx8mnd() (is_cpu_type(MXC_CPU_IMX8MND))
68#define is_imx8mns() (is_cpu_type(MXC_CPU_IMX8MNS))
69#define is_imx8mnl() (is_cpu_type(MXC_CPU_IMX8MNL))
70#define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL))
71#define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL))
Ye Li715180e2021-03-19 15:57:11 +080072#define is_imx8mnuq() (is_cpu_type(MXC_CPU_IMX8MNUQ))
73#define is_imx8mnud() (is_cpu_type(MXC_CPU_IMX8MNUD))
74#define is_imx8mnus() (is_cpu_type(MXC_CPU_IMX8MNUS))
Ye Lid2d754f2020-04-20 20:12:54 -070075#define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP) || is_cpu_type(MXC_CPU_IMX8MPD) || \
Peng Fan8a472a22020-09-16 15:17:22 +080076 is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP6))
Ye Lid2d754f2020-04-20 20:12:54 -070077#define is_imx8mpd() (is_cpu_type(MXC_CPU_IMX8MPD))
78#define is_imx8mpl() (is_cpu_type(MXC_CPU_IMX8MPL))
Ye Lid2d754f2020-04-20 20:12:54 -070079#define is_imx8mp6() (is_cpu_type(MXC_CPU_IMX8MP6))
Peng Fan5d2f2062019-06-27 17:23:49 +080080
Peng Fan36b65172018-10-18 14:28:16 +020081#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
82
Giulio Benetti3d1a5732021-05-20 16:10:13 +020083#define is_imxrt1020() (is_cpu_type(MXC_CPU_IMXRT1020))
84#define is_imxrt1050() (is_cpu_type(MXC_CPU_IMXRT1050))
85
Jagan Tekie5f970b2017-02-24 15:45:12 +053086#ifdef CONFIG_MX6
Marek Vasut28c0b632020-08-05 15:34:04 +020087#define IMX6_SRC_GPR10_BMODE BIT(28)
Marek Vasut6b17c852020-08-05 15:34:05 +020088#define IMX6_SRC_GPR10_PERSIST_SECONDARY_BOOT BIT(30)
Jagan Tekie5f970b2017-02-24 15:45:12 +053089
Jagan Teki32a71142017-02-24 15:45:14 +053090#define IMX6_BMODE_MASK GENMASK(7, 0)
91#define IMX6_BMODE_SHIFT 4
92#define IMX6_BMODE_EMI_MASK BIT(3)
93#define IMX6_BMODE_EMI_SHIFT 3
94#define IMX6_BMODE_SERIAL_ROM_MASK GENMASK(26, 24)
95#define IMX6_BMODE_SERIAL_ROM_SHIFT 24
96
97enum imx6_bmode_serial_rom {
98 IMX6_BMODE_ECSPI1,
99 IMX6_BMODE_ECSPI2,
100 IMX6_BMODE_ECSPI3,
101 IMX6_BMODE_ECSPI4,
102 IMX6_BMODE_ECSPI5,
103 IMX6_BMODE_I2C1,
104 IMX6_BMODE_I2C2,
105 IMX6_BMODE_I2C3,
106};
107
108enum imx6_bmode_emi {
Jagan Teki32a71142017-02-24 15:45:14 +0530109 IMX6_BMODE_NOR,
Lukasz Majewski3234ef32019-01-03 23:50:51 +0100110 IMX6_BMODE_ONENAND,
Jagan Teki32a71142017-02-24 15:45:14 +0530111};
112
113enum imx6_bmode {
114 IMX6_BMODE_EMI,
Stefan Agner53456f52017-08-15 17:49:42 -0700115#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
116 IMX6_BMODE_QSPI,
117 IMX6_BMODE_RESERVED,
118#else
119 IMX6_BMODE_RESERVED,
Jagan Teki32a71142017-02-24 15:45:14 +0530120 IMX6_BMODE_SATA,
Stefan Agner53456f52017-08-15 17:49:42 -0700121#endif
Jagan Teki32a71142017-02-24 15:45:14 +0530122 IMX6_BMODE_SERIAL_ROM,
123 IMX6_BMODE_SD,
124 IMX6_BMODE_ESD,
125 IMX6_BMODE_MMC,
126 IMX6_BMODE_EMMC,
Eran Matityahu5fa7ca62017-12-14 20:20:02 +0200127 IMX6_BMODE_NAND_MIN,
128 IMX6_BMODE_NAND_MAX = 0xf,
Jagan Teki32a71142017-02-24 15:45:14 +0530129};
130
Jagan Tekie5f970b2017-02-24 15:45:12 +0530131u32 imx6_src_get_boot_mode(void);
Breno Limaf22b1092017-08-24 10:00:16 -0300132void gpr_init(void);
133
Jagan Tekie5f970b2017-02-24 15:45:12 +0530134#endif /* CONFIG_MX6 */
135
Marek Vasut28c0b632020-08-05 15:34:04 +0200136#ifdef CONFIG_MX7
137#define IMX7_SRC_GPR10_BMODE BIT(28)
Marek Vasut6b17c852020-08-05 15:34:05 +0200138#define IMX7_SRC_GPR10_PERSIST_SECONDARY_BOOT BIT(30)
Marek Vasut28c0b632020-08-05 15:34:04 +0200139#endif
140
Igor Opaniukb65af982019-12-30 13:56:44 +0200141/* address translation table */
142struct rproc_att {
143 u32 da; /* device address (From Cortex M4 view) */
144 u32 sa; /* system bus address */
145 u32 size; /* size of reg range */
146};
147
Ye Li7a71c612021-08-07 16:00:39 +0800148#if defined(CONFIG_IMX8M) || defined(CONFIG_IMX8ULP)
Peng Fan36986792019-09-16 03:09:31 +0000149struct rom_api {
150 u16 ver;
151 u16 tag;
152 u32 reserved1;
153 u32 (*download_image)(u8 *dest, u32 offset, u32 size, u32 xor);
154 u32 (*query_boot_infor)(u32 info_type, u32 *info, u32 xor);
155};
156
157enum boot_dev_type_e {
158 BT_DEV_TYPE_SD = 1,
159 BT_DEV_TYPE_MMC = 2,
160 BT_DEV_TYPE_NAND = 3,
161 BT_DEV_TYPE_FLEXSPINOR = 4,
162
163 BT_DEV_TYPE_USB = 0xE,
164 BT_DEV_TYPE_MEM_DEV = 0xF,
165
166 BT_DEV_TYPE_INVALID = 0xFF
167};
168
169#define QUERY_ROM_VER 1
170#define QUERY_BT_DEV 2
171#define QUERY_PAGE_SZ 3
172#define QUERY_IVT_OFF 4
173#define QUERY_BT_STAGE 5
174#define QUERY_IMG_OFF 6
175
176#define ROM_API_OKAY 0xF0
177
178extern struct rom_api *g_rom_api;
179#endif
180
Peng Fan101ef622021-08-07 16:00:32 +0800181/* For i.MX ULP */
182#define BT0CFG_LPBOOT_MASK 0x1
183#define BT0CFG_DUALBOOT_MASK 0x2
184
185enum bt_mode {
186 LOW_POWER_BOOT, /* LP_BT = 1 */
187 DUAL_BOOT, /* LP_BT = 0, DUAL_BT = 1 */
188 SINGLE_BOOT /* LP_BT = 0, DUAL_BT = 0 */
189};
190
Peng Fanf664c142015-08-13 10:55:34 +0800191u32 get_nr_cpus(void);
192u32 get_cpu_rev(void);
193u32 get_cpu_speed_grade_hz(void);
194u32 get_cpu_temp_grade(int *minc, int *maxc);
195const char *get_imx_type(u32 imxtype);
196u32 imx_ddr_size(void);
197void sdelay(unsigned long);
198void set_chipselect_size(int const);
199
Adrian Alonsoee7c4ca2015-09-02 13:54:15 -0500200void init_aips(void);
201void init_src(void);
Bryan O'Donoghue0290ea02018-04-05 19:46:06 +0100202void init_snvs(void);
Fabio Estevam5f79d462017-11-23 10:55:33 -0200203void imx_wdog_disable_powerdown(void);
Adrian Alonsoee7c4ca2015-09-02 13:54:15 -0500204
Marcel Ziswilera45585b2020-10-22 11:21:40 +0300205void board_mem_get_layout(u64 *phys_sdram_1_start,
206 u64 *phys_sdram_1_size,
207 u64 *phys_sdram_2_start,
208 u64 *phys_sdram_2_size);
209
Igor Opaniukcbee9452019-12-03 14:04:47 +0200210int arch_auxiliary_core_check_up(u32 core_id);
211
Diego Dorta29f702e2017-09-21 15:10:03 -0300212int board_mmc_get_env_dev(int devno);
213
Fabio Estevam49bcdd72017-11-27 10:25:09 -0200214int nxp_board_rev(void);
215char nxp_board_rev_string(void);
216
Peng Fanf664c142015-08-13 10:55:34 +0800217/*
218 * Initializes on-chip ethernet controllers.
219 * to override, implement board_eth_init()
220 */
Simon Glass1e268642020-05-10 11:39:55 -0600221int fecmxc_initialize(struct bd_info *bis);
Peng Fanf664c142015-08-13 10:55:34 +0800222u32 get_ahb_clk(void);
223u32 get_periph_clk(void);
224
Peng Fan5f8dbf52015-10-29 15:54:49 +0800225void lcdif_power_down(void);
226
Peng Fanf664c142015-08-13 10:55:34 +0800227int mxs_reset_block(struct mxs_register_32 *reg);
228int mxs_wait_mask_set(struct mxs_register_32 *reg, u32 mask, u32 timeout);
229int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout);
Peng Fanaa3b9072018-01-10 13:20:23 +0800230
231unsigned long call_imx_sip(unsigned long id, unsigned long reg0,
Ye Lie5e91092019-10-26 16:24:03 +0200232 unsigned long reg1, unsigned long reg2,
233 unsigned long reg3);
Peng Fana5060092019-04-12 07:54:50 +0000234unsigned long call_imx_sip_ret2(unsigned long id, unsigned long reg0,
235 unsigned long *reg1, unsigned long reg2,
236 unsigned long reg3);
Ye Li89e2f952020-05-03 22:41:19 +0800237
238void imx_get_mac_from_fuse(int dev_id, unsigned char *mac);
Sven Schwermer2645cfa2022-01-02 20:36:56 +0100239
240#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
241void enable_ca7_smp(void);
242#endif
243
Peng Fanf664c142015-08-13 10:55:34 +0800244#endif