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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +05302/*
3 * Copyright 2016 Freescale Semiconductor
Prabhakar Kushwaha55432502016-06-03 18:41:34 +05304 */
5
6#ifndef __LS1012A_COMMON_H
7#define __LS1012A_COMMON_H
8
Prabhakar Kushwaha55432502016-06-03 18:41:34 +05309#include <asm/arch/config.h>
Bharat Bhushanc8651312017-03-22 12:06:29 +053010#include <asm/arch/stream_id_lsch2.h>
Kuldeep Singh02261092020-06-25 12:56:22 +053011#include <linux/sizes.h>
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053012
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080013#define CONFIG_SYS_CLK_FREQ 125000000
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053014
Rajesh Bhagatfcafef62018-11-05 18:02:53 +000015#ifdef CONFIG_TFABOOT
16#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
17#else
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053018#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
Rajesh Bhagatfcafef62018-11-05 18:02:53 +000019#endif
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053020
21#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
22#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
23#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
Prabhakar Kushwaha1fb2f112017-01-30 17:05:22 +053024#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053025
26/* Generic Timer Definitions */
Yuantian Tang8d7d8202017-10-12 14:29:26 +080027#define COUNTER_FREQUENCY 25000000 /* 25MHz */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053028
29/* CSU */
30#define CONFIG_LAYERSCAPE_NS_ACCESS
31
Kuldeep Singh14e956f2020-05-28 11:42:53 +053032/* PFE */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053033#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
Kuldeep Singh14e956f2020-05-28 11:42:53 +053034#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x300000
35
36/*SPI device */
Kuldeep Singh1f73ca62020-05-12 12:54:07 +053037#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053038
Yuantian Tang932c5b12018-01-03 15:53:10 +080039/* SATA */
40#define CONFIG_SCSI_AHCI_PLAT
41
42#define CONFIG_SYS_SATA AHCI_BASE_ADDR
43
44#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
45#define CONFIG_SYS_SCSI_MAX_LUN 1
46#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
47 CONFIG_SYS_SCSI_MAX_LUN)
48
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053049/* I2C */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053050
Biwen Li672b9992021-02-05 19:01:55 +080051/* GPIO */
52#ifdef CONFIG_DM_GPIO
53#ifndef CONFIG_MPC8XXX_GPIO
54#define CONFIG_MPC8XXX_GPIO
55#endif
56#endif
57
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053058#define CONFIG_SYS_NS16550_SERIAL
59#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080060#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053061
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053062#define CONFIG_SYS_HZ 1000
63
64#define CONFIG_HWCONFIG
65#define HWCONFIG_BUFFER_SIZE 128
66
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053067#ifndef CONFIG_SPL_BUILD
68#define BOOT_TARGET_DEVICES(func) \
69 func(MMC, mmc, 0) \
Yunfeng Ding0c1d95e2019-02-19 14:44:04 +080070 func(USB, usb, 0) \
71 func(SCSI, scsi, 0) \
72 func(DHCP, dhcp, na)
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053073#include <config_distro_bootcmd.h>
74#endif
75
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053076/* Initial environment variables */
77#define CONFIG_EXTRA_ENV_SETTINGS \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053078 "verify=no\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053079 "loadaddr=0x80100000\0" \
80 "kernel_addr=0x100000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053081 "initrd_high=0xffffffffffffffff\0" \
Bhaskar Upadhaya11385d82017-11-14 05:05:10 +053082 "kernel_start=0x1000000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053083 "kernel_load=0xa0000000\0" \
84 "kernel_size=0x2800000\0" \
Udit Agarwal4fe5c552020-06-08 18:55:44 +053085 "bootm_size=0x10000000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053086
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053087#undef CONFIG_BOOTCOMMAND
Rajesh Bhagatfcafef62018-11-05 18:02:53 +000088#ifdef CONFIG_TFABOOT
Mian Yousaf Kaukab2529deae2021-04-14 12:33:58 +020089#define QSPI_NOR_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
Rajesh Bhagatfcafef62018-11-05 18:02:53 +000090 "$kernel_start $kernel_size && "\
91 "bootm $kernel_load"
92#else
Mian Yousaf Kaukab2529deae2021-04-14 12:33:58 +020093#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
Calvin Johnson0e6101a2018-03-08 15:30:35 +053094 "$kernel_start $kernel_size && "\
95 "bootm $kernel_load"
Rajesh Bhagatfcafef62018-11-05 18:02:53 +000096#endif
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053097
98/* Monitor Command Prompt */
99#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530100#define CONFIG_SYS_MAXARGS 64 /* max command args */
101
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530102#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
103
Simon Glass89e0a3a2017-05-17 08:23:10 -0600104#include <asm/arch/soc.h>
105
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530106#endif /* __LS1012A_COMMON_H */