blob: 0965afafb14ec72a7c2df9fc2946d0aa23424a49 [file] [log] [blame]
Prabhakar Kushwaha55432502016-06-03 18:41:34 +05301/*
2 * Copyright 2016 Freescale Semiconductor
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __LS1012A_COMMON_H
8#define __LS1012A_COMMON_H
9
10#define CONFIG_FSL_LAYERSCAPE
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053011#define CONFIG_GICV2
12
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053013#include <asm/arch/config.h>
14#define CONFIG_SYS_NO_FLASH
15
16#define CONFIG_SUPPORT_RAW_INITRD
17
18#define CONFIG_DISPLAY_BOARDINFO_LATE
19
20#define CONFIG_SYS_TEXT_BASE 0x40100000
21
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080022#define CONFIG_SYS_CLK_FREQ 125000000
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053023
24#define CONFIG_SKIP_LOWLEVEL_INIT
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053025
26#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
27#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
28
29#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
30#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
31#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
Prabhakar Kushwaha1fb2f112017-01-30 17:05:22 +053032#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053033
34/* Generic Timer Definitions */
35#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ/4 /* 25MHz */
36
37/* CSU */
38#define CONFIG_LAYERSCAPE_NS_ACCESS
39
40/* Size of malloc() pool */
41#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
42
43/*SPI device */
44#ifdef CONFIG_QSPI_BOOT
45#define CONFIG_SYS_QE_FW_IN_SPIFLASH
46#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
47#define CONFIG_ENV_SPI_BUS 0
48#define CONFIG_ENV_SPI_CS 0
49#define CONFIG_ENV_SPI_MAX_HZ 1000000
50#define CONFIG_ENV_SPI_MODE 0x03
51#define CONFIG_SPI_FLASH_SPANSION
52#define CONFIG_FSL_SPI_INTERFACE
53#define CONFIG_SF_DATAFLASH
54
55#define CONFIG_FSL_QSPI
56#define QSPI0_AMBA_BASE 0x40000000
57#define CONFIG_SPI_FLASH_SPANSION
58#define CONFIG_SPI_FLASH_BAR
59
60#define FSL_QSPI_FLASH_SIZE (1 << 24)
61#define FSL_QSPI_FLASH_NUM 2
62
63/*
64 * Environment
65 */
66#define CONFIG_ENV_OVERWRITE
67
68#define CONFIG_ENV_IS_IN_SPI_FLASH
69#define CONFIG_ENV_SIZE 0x40000 /* 256KB */
70#define CONFIG_ENV_OFFSET 0x200000 /* 2MB */
71#define CONFIG_ENV_SECT_SIZE 0x40000
72#endif
73
74/* I2C */
75#define CONFIG_SYS_I2C
76#define CONFIG_SYS_I2C_MXC
77#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
78#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
79
80#define CONFIG_CONS_INDEX 1
81#define CONFIG_SYS_NS16550_SERIAL
82#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080083#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053084
85#define CONFIG_BAUDRATE 115200
86#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
87
88/* Command line configuration */
89#define CONFIG_CMD_ENV
90#undef CONFIG_CMD_IMLS
91
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053092#define CONFIG_SYS_HZ 1000
93
94#define CONFIG_HWCONFIG
95#define HWCONFIG_BUFFER_SIZE 128
96
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053097/* Initial environment variables */
98#define CONFIG_EXTRA_ENV_SETTINGS \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053099 "verify=no\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530100 "loadaddr=0x80100000\0" \
101 "kernel_addr=0x100000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530102 "fdt_high=0xffffffffffffffff\0" \
103 "initrd_high=0xffffffffffffffff\0" \
104 "kernel_start=0xa00000\0" \
105 "kernel_load=0xa0000000\0" \
106 "kernel_size=0x2800000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530107
108#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
Pratiyush Srivastava922a1292016-10-10 18:45:15 +0530109 "earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530110#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
111 "$kernel_start $kernel_size && "\
112 "bootm $kernel_load"
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530113
114/* Monitor Command Prompt */
115#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
116#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
117 sizeof(CONFIG_SYS_PROMPT) + 16)
118#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
119#define CONFIG_SYS_LONGHELP
120#define CONFIG_CMDLINE_EDITING 1
121#define CONFIG_AUTO_COMPLETE
122#define CONFIG_SYS_MAXARGS 64 /* max command args */
123
124#define CONFIG_PANIC_HANG
125#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
126
127#include <asm/fsl_secure_boot.h>
128
129#endif /* __LS1012A_COMMON_H */