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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +05302/*
3 * Copyright 2016 Freescale Semiconductor
Prabhakar Kushwaha55432502016-06-03 18:41:34 +05304 */
5
6#ifndef __LS1012A_COMMON_H
7#define __LS1012A_COMMON_H
8
Prabhakar Kushwaha55432502016-06-03 18:41:34 +05309#define CONFIG_GICV2
10
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053011#include <asm/arch/config.h>
Bharat Bhushanc8651312017-03-22 12:06:29 +053012#include <asm/arch/stream_id_lsch2.h>
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053013
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080014#define CONFIG_SYS_CLK_FREQ 125000000
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053015
16#define CONFIG_SKIP_LOWLEVEL_INIT
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053017
Rajesh Bhagatfcafef62018-11-05 18:02:53 +000018#ifdef CONFIG_TFABOOT
19#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
20#else
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053021#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
Rajesh Bhagatfcafef62018-11-05 18:02:53 +000022#endif
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053023#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
24
25#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
26#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
27#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
Prabhakar Kushwaha1fb2f112017-01-30 17:05:22 +053028#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053029
30/* Generic Timer Definitions */
Yuantian Tang8d7d8202017-10-12 14:29:26 +080031#define COUNTER_FREQUENCY 25000000 /* 25MHz */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053032
33/* CSU */
34#define CONFIG_LAYERSCAPE_NS_ACCESS
35
36/* Size of malloc() pool */
Kuldeep Singh23013ee2020-05-12 14:58:51 +053037#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053038
Kuldeep Singh14e956f2020-05-28 11:42:53 +053039/* PFE */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053040#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
Kuldeep Singh14e956f2020-05-28 11:42:53 +053041#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x300000
42
43/*SPI device */
Kuldeep Singh1f73ca62020-05-12 12:54:07 +053044#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053045
Yuantian Tang932c5b12018-01-03 15:53:10 +080046/* SATA */
47#define CONFIG_SCSI_AHCI_PLAT
48
49#define CONFIG_SYS_SATA AHCI_BASE_ADDR
50
51#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
52#define CONFIG_SYS_SCSI_MAX_LUN 1
53#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
54 CONFIG_SYS_SCSI_MAX_LUN)
55
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053056/* I2C */
Biwen Li0a759bb2019-12-31 15:33:41 +080057#ifndef CONFIG_DM_I2C
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053058#define CONFIG_SYS_I2C
Biwen Li0a759bb2019-12-31 15:33:41 +080059#else
60#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
61#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
62#endif
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053063
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053064#define CONFIG_SYS_NS16550_SERIAL
65#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080066#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053067
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053068#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
69
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053070#define CONFIG_SYS_HZ 1000
71
72#define CONFIG_HWCONFIG
73#define HWCONFIG_BUFFER_SIZE 128
74
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053075#ifndef CONFIG_SPL_BUILD
76#define BOOT_TARGET_DEVICES(func) \
77 func(MMC, mmc, 0) \
Yunfeng Ding0c1d95e2019-02-19 14:44:04 +080078 func(USB, usb, 0) \
79 func(SCSI, scsi, 0) \
80 func(DHCP, dhcp, na)
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053081#include <config_distro_bootcmd.h>
82#endif
83
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053084/* Initial environment variables */
85#define CONFIG_EXTRA_ENV_SETTINGS \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053086 "verify=no\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053087 "loadaddr=0x80100000\0" \
88 "kernel_addr=0x100000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053089 "initrd_high=0xffffffffffffffff\0" \
Bhaskar Upadhaya11385d82017-11-14 05:05:10 +053090 "kernel_start=0x1000000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053091 "kernel_load=0xa0000000\0" \
92 "kernel_size=0x2800000\0" \
Udit Agarwal4fe5c552020-06-08 18:55:44 +053093 "bootm_size=0x10000000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053094
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053095#undef CONFIG_BOOTCOMMAND
Rajesh Bhagatfcafef62018-11-05 18:02:53 +000096#ifdef CONFIG_TFABOOT
97#define QSPI_NOR_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\
98 "$kernel_start $kernel_size && "\
99 "bootm $kernel_load"
100#else
Calvin Johnson0e6101a2018-03-08 15:30:35 +0530101#define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\
102 "$kernel_start $kernel_size && "\
103 "bootm $kernel_load"
Rajesh Bhagatfcafef62018-11-05 18:02:53 +0000104#endif
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530105
106/* Monitor Command Prompt */
107#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530108#define CONFIG_SYS_MAXARGS 64 /* max command args */
109
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530110#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
111
Simon Glass89e0a3a2017-05-17 08:23:10 -0600112#include <asm/arch/soc.h>
113
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530114#endif /* __LS1012A_COMMON_H */