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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +05302/*
3 * Copyright 2016 Freescale Semiconductor
Prabhakar Kushwaha55432502016-06-03 18:41:34 +05304 */
5
6#ifndef __LS1012A_COMMON_H
7#define __LS1012A_COMMON_H
8
9#define CONFIG_FSL_LAYERSCAPE
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053010#define CONFIG_GICV2
11
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053012#include <asm/arch/config.h>
Bharat Bhushanc8651312017-03-22 12:06:29 +053013#include <asm/arch/stream_id_lsch2.h>
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053014
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080015#define CONFIG_SYS_CLK_FREQ 125000000
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053016
17#define CONFIG_SKIP_LOWLEVEL_INIT
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053018
19#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
20#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
21
22#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
23#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
24#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
Prabhakar Kushwaha1fb2f112017-01-30 17:05:22 +053025#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053026
27/* Generic Timer Definitions */
Yuantian Tang8d7d8202017-10-12 14:29:26 +080028#define COUNTER_FREQUENCY 25000000 /* 25MHz */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053029
30/* CSU */
31#define CONFIG_LAYERSCAPE_NS_ACCESS
32
33/* Size of malloc() pool */
34#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
35
36/*SPI device */
37#ifdef CONFIG_QSPI_BOOT
38#define CONFIG_SYS_QE_FW_IN_SPIFLASH
39#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
40#define CONFIG_ENV_SPI_BUS 0
41#define CONFIG_ENV_SPI_CS 0
42#define CONFIG_ENV_SPI_MAX_HZ 1000000
43#define CONFIG_ENV_SPI_MODE 0x03
44#define CONFIG_SPI_FLASH_SPANSION
45#define CONFIG_FSL_SPI_INTERFACE
46#define CONFIG_SF_DATAFLASH
47
48#define CONFIG_FSL_QSPI
49#define QSPI0_AMBA_BASE 0x40000000
50#define CONFIG_SPI_FLASH_SPANSION
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053051
Suresh Gupta2c31d722017-04-25 14:51:38 +053052#define FSL_QSPI_FLASH_SIZE SZ_64M
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053053#define FSL_QSPI_FLASH_NUM 2
54
55/*
56 * Environment
57 */
58#define CONFIG_ENV_OVERWRITE
59
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053060#define CONFIG_ENV_SIZE 0x40000 /* 256KB */
Bhaskar Upadhaya11385d82017-11-14 05:05:10 +053061#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053062#define CONFIG_ENV_SECT_SIZE 0x40000
63#endif
64
Yuantian Tang932c5b12018-01-03 15:53:10 +080065/* SATA */
66#define CONFIG_SCSI_AHCI_PLAT
67
68#define CONFIG_SYS_SATA AHCI_BASE_ADDR
69
70#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
71#define CONFIG_SYS_SCSI_MAX_LUN 1
72#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
73 CONFIG_SYS_SCSI_MAX_LUN)
74
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053075/* I2C */
76#define CONFIG_SYS_I2C
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053077
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053078#define CONFIG_SYS_NS16550_SERIAL
79#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080080#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053081
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053082#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
83
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053084#define CONFIG_SYS_HZ 1000
85
86#define CONFIG_HWCONFIG
87#define HWCONFIG_BUFFER_SIZE 128
88
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053089#ifndef CONFIG_SPL_BUILD
90#define BOOT_TARGET_DEVICES(func) \
Yuantian Tang932c5b12018-01-03 15:53:10 +080091 func(SCSI, scsi, 0) \
Rajesh Bhagatd59447a2017-11-30 16:44:38 +053092 func(MMC, mmc, 0) \
93 func(USB, usb, 0)
94#include <config_distro_bootcmd.h>
95#endif
96
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053097/* Initial environment variables */
98#define CONFIG_EXTRA_ENV_SETTINGS \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +053099 "verify=no\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530100 "loadaddr=0x80100000\0" \
101 "kernel_addr=0x100000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530102 "fdt_high=0xffffffffffffffff\0" \
103 "initrd_high=0xffffffffffffffff\0" \
Bhaskar Upadhaya11385d82017-11-14 05:05:10 +0530104 "kernel_start=0x1000000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530105 "kernel_load=0xa0000000\0" \
106 "kernel_size=0x2800000\0" \
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530107
Rajesh Bhagatd59447a2017-11-30 16:44:38 +0530108#undef CONFIG_BOOTCOMMAND
Calvin Johnson0e6101a2018-03-08 15:30:35 +0530109#define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\
110 "$kernel_start $kernel_size && "\
111 "bootm $kernel_load"
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530112
113/* Monitor Command Prompt */
114#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530115#define CONFIG_SYS_MAXARGS 64 /* max command args */
116
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530117#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
118
Simon Glass89e0a3a2017-05-17 08:23:10 -0600119#include <asm/arch/soc.h>
120
Prabhakar Kushwaha55432502016-06-03 18:41:34 +0530121#endif /* __LS1012A_COMMON_H */