blob: 3205a31c6d0f29ee5e088908a45c70231004705b [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrick Delaunayf7b2a842020-11-06 19:01:59 +01005
6#define LOG_CATEGORY LOGC_BOARD
7
Patrice Chotard879cde52019-02-12 16:50:40 +01008#include <common.h>
9#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +020010#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020011#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +020012#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020013#include <dm.h>
Sughosh Ganue166b5e2022-10-21 18:15:58 +053014#include <efi_loader.h>
Simon Glassdb229612019-08-01 09:46:42 -060015#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060016#include <env_internal.h>
Patrick Delaunay028fddd2021-11-15 16:32:23 +010017#include <fdt_simplefb.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060018#include <fdt_support.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010019#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020020#include <generic-phy.h>
Simon Glassf11478f2019-12-28 10:45:07 -070021#include <hang.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010022#include <i2c.h>
Simon Glassa7b51302019-11-14 12:57:46 -070023#include <init.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010024#include <led.h>
Simon Glass0f2af882020-05-10 11:40:05 -060025#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070026#include <malloc.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010027#include <misc.h>
Simon Glass274e0b02020-05-10 11:39:56 -060028#include <net.h>
Patrick Delaunaybff66f92019-08-01 11:29:03 +020029#include <netdev.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020030#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020031#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020032#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010033#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010034#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020035#include <watchdog.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060036#include <asm/global_data.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020037#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010038#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010039#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020040#include <asm/arch/sys_proto.h>
Simon Glass0034d962021-08-07 07:24:01 -060041#include <dm/ofnode.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020042#include <jffs2/load_kernel.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060043#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060044#include <linux/delay.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070045#include <linux/err.h>
Patrick Delaunay181298e2020-04-22 14:29:16 +020046#include <linux/iopoll.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020047#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010048#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010049
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +020050#include "../../st/common/stusb160x.h"
51
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010052/* SYSCFG registers */
53#define SYSCFG_BOOTR 0x00
54#define SYSCFG_PMCSETR 0x04
55#define SYSCFG_IOCTRLSETR 0x18
56#define SYSCFG_ICNR 0x1C
57#define SYSCFG_CMPCR 0x20
58#define SYSCFG_CMPENSETR 0x24
59#define SYSCFG_PMCCLRR 0x44
60
61#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
62#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
63
64#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
65#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
66#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
67#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
68#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
69
70#define SYSCFG_CMPCR_SW_CTRL BIT(1)
71#define SYSCFG_CMPCR_READY BIT(8)
72
73#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
74
75#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
76#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
77
78#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
79
80#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020081#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
82#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
83#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010084
Patrice Chotardcded32f2019-04-30 18:09:38 +020085#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010086#define USB_WARNING_LOW_THRESHOLD_UV 660000
87#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020088#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010089
Simon Glassb8196212023-02-05 15:39:42 -070090#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
Sughosh Ganue166b5e2022-10-21 18:15:58 +053091struct efi_fw_image fw_images[1];
92
93struct efi_capsule_update_info update_info = {
Masahisa Kojima5d2438b2023-06-07 14:41:51 +090094 .num_images = ARRAY_SIZE(fw_images),
Sughosh Ganue166b5e2022-10-21 18:15:58 +053095 .images = fw_images,
96};
97
Sughosh Ganue166b5e2022-10-21 18:15:58 +053098#endif /* EFI_HAVE_CAPSULE_SUPPORT */
99
Patrick Delaunayf2f25c32020-05-25 12:19:46 +0200100int board_early_init_f(void)
101{
102 /* nothing to do, only used in SPL */
103 return 0;
104}
105
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100106int checkboard(void)
107{
108 int ret;
109 char *mode;
110 u32 otp;
111 struct udevice *dev;
112 const char *fdt_compat;
113 int fdt_compat_len;
114
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200115 if (IS_ENABLED(CONFIG_TFABOOT)) {
116 if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE))
117 mode = "trusted - stm32image";
118 else
119 mode = "trusted";
120 } else {
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100121 mode = "basic";
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200122 }
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100123
Patrick Delaunay4e506b02022-05-19 09:07:29 +0200124 fdt_compat = ofnode_get_property(ofnode_root(), "compatible",
125 &fdt_compat_len);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100126
127 log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
128 fdt_compat && fdt_compat_len ? fdt_compat : "");
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100129
Patrick Delaunay52163d92020-03-24 09:05:00 +0100130 /* display the STMicroelectronics board identification */
Simon Glassd87b83e2023-02-05 15:36:43 -0700131 if (IS_ENABLED(CONFIG_CMD_STBOARD)) {
Patrick Delaunay0885c232020-02-12 19:37:42 +0100132 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700133 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay0885c232020-02-12 19:37:42 +0100134 &dev);
135 if (!ret)
136 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
137 &otp, sizeof(otp));
138 if (ret > 0 && otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100139 log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
140 otp >> 16,
141 (otp >> 12) & 0xF,
142 (otp >> 4) & 0xF,
143 ((otp >> 8) & 0xF) - 1 + 'A',
144 otp & 0xF);
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100145 }
146
147 return 0;
148}
149
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100150static void board_key_check(void)
151{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100152 ofnode node;
153 struct gpio_desc gpio;
154 enum forced_boot_mode boot_mode = BOOT_NORMAL;
155
Patrick Delaunayf6604852020-07-31 16:31:42 +0200156 if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
157 return;
158
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100159 node = ofnode_path("/config");
160 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100161 log_debug("no /config node?\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100162 return;
163 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200164 if (IS_ENABLED(CONFIG_FASTBOOT)) {
165 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
166 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100167 log_debug("could not find a /config/st,fastboot-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200168 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200169 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200170 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100171 log_notice("Fastboot key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200172 boot_mode = BOOT_FASTBOOT;
173 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100174
Patrick Delaunayf6604852020-07-31 16:31:42 +0200175 dm_gpio_free(NULL, &gpio);
176 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100177 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200178 if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
179 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
180 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100181 log_debug("could not find a /config/st,stm32prog-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200182 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200183 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200184 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100185 log_notice("STM32Programmer key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200186 boot_mode = BOOT_STM32PROG;
187 }
188 dm_gpio_free(NULL, &gpio);
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100189 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100190 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100191 if (boot_mode != BOOT_NORMAL) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100192 log_notice("entering download mode...\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100193 clrsetbits_le32(TAMP_BOOT_CONTEXT,
194 TAMP_BOOT_FORCED_MASK,
195 boot_mode);
196 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100197}
198
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100199int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200200{
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100201 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200202 int ret;
203
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200204 if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
205 return -ENODEV;
206
Patrice Chotardaef7c182022-04-22 09:39:18 +0200207 /*
208 * In case of USB boot device is detected, consider USB cable is
209 * connected
210 */
211 if ((get_bootmode() & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_USB)
212 return true;
213
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +0200214 /* if typec stusb160x is present, means DK1 or DK2 board */
215 ret = stusb160x_cable_connected();
216 if (ret >= 0)
217 return ret;
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100218
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100219 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700220 DM_DRIVER_GET(dwc2_udc_otg),
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100221 &dwc2_udc_otg);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100222 if (ret) {
223 log_debug("dwc2_udc_otg init failed\n");
224 return ret;
225 }
Patrice Chotard204079b2018-08-10 17:12:14 +0200226
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100227 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100228}
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200229
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200230#ifdef CONFIG_USB_GADGET_DOWNLOAD
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200231#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
232#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
233
234int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
235{
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200236 if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
237 !strcmp(name, "usb_dnl_dfu"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200238 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200239 else if (IS_ENABLED(CONFIG_FASTBOOT) &&
240 !strcmp(name, "usb_dnl_fastboot"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200241 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
242 &dev->idProduct);
243 else
244 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
245
246 return 0;
247}
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200248#endif /* CONFIG_USB_GADGET_DOWNLOAD */
Patrice Chotard879cde52019-02-12 16:50:40 +0100249
250static int get_led(struct udevice **dev, char *led_string)
251{
Simon Glass0034d962021-08-07 07:24:01 -0600252 const char *led_name;
Patrice Chotard879cde52019-02-12 16:50:40 +0100253 int ret;
254
Simon Glass0034d962021-08-07 07:24:01 -0600255 led_name = ofnode_conf_read_str(led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100256 if (!led_name) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100257 log_debug("could not find %s config string\n", led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100258 return -ENOENT;
259 }
260 ret = led_get_by_label(led_name, dev);
261 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100262 log_debug("get=%d\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100263 return ret;
264 }
265
266 return 0;
267}
268
269static int setup_led(enum led_state_t cmd)
270{
271 struct udevice *dev;
272 int ret;
273
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200274 if (!CONFIG_IS_ENABLED(LED))
275 return 0;
276
Patrice Chotard879cde52019-02-12 16:50:40 +0100277 ret = get_led(&dev, "u-boot,boot-led");
278 if (ret)
279 return ret;
280
281 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200282 return ret;
283}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200284
285static void __maybe_unused led_error_blink(u32 nb_blink)
286{
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200287 int ret;
288 struct udevice *led;
289 u32 i;
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200290
291 if (!nb_blink)
292 return;
293
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200294 if (CONFIG_IS_ENABLED(LED)) {
295 ret = get_led(&led, "u-boot,error-led");
296 if (!ret) {
297 /* make u-boot,error-led blinking */
298 /* if U32_MAX and 125ms interval, for 17.02 years */
299 for (i = 0; i < 2 * nb_blink; i++) {
300 led_set_state(led, LEDST_TOGGLE);
301 mdelay(125);
Stefan Roese80877fa2022-09-02 14:10:46 +0200302 schedule();
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200303 }
304 led_set_state(led, LEDST_ON);
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200305 }
306 }
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200307
308 /* infinite: the boot process must be stopped */
309 if (nb_blink == U32_MAX)
310 hang();
311}
Patrice Chotard204079b2018-08-10 17:12:14 +0200312
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200313static int adc_measurement(ofnode node, int adc_count, int *min_uV, int *max_uV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100314{
315 struct ofnode_phandle_args adc_args;
316 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100317 unsigned int raw;
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200318 int ret, uV;
319 int i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100320
321 for (i = 0; i < adc_count; i++) {
322 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
323 "#io-channel-cells", 0, i,
324 &adc_args)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100325 log_debug("can't find /config/st,adc_usb_pd\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100326 return 0;
327 }
328
329 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
330 &adc);
331
332 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100333 log_err("Can't get adc device(%d)\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100334 return ret;
335 }
336
337 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
338 &raw);
339 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100340 log_err("single shot failed for %s[%d]!\n",
341 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100342 return ret;
343 }
344 /* Convert to uV */
345 if (!adc_raw_to_uV(adc, raw, &uV)) {
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200346 if (uV > *max_uV)
347 *max_uV = uV;
348 if (uV < *min_uV)
349 *min_uV = uV;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100350 log_debug("%s[%02d] = %u, %d uV\n",
351 adc->name, adc_args.args[0], raw, uV);
Patrice Chotard879cde52019-02-12 16:50:40 +0100352 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100353 log_err("Can't get uV value for %s[%d]\n",
354 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100355 }
356 }
357
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200358 return 0;
359}
360
361static int board_check_usb_power(void)
362{
363 ofnode node;
364 int max_uV = 0;
365 int min_uV = USB_START_HIGH_THRESHOLD_UV;
366 int adc_count, ret;
367 u32 nb_blink;
368 u8 i;
369
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200370 if (!IS_ENABLED(CONFIG_ADC))
371 return -ENODEV;
372
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200373 node = ofnode_path("/config");
374 if (!ofnode_valid(node)) {
375 log_debug("no /config node?\n");
376 return -ENOENT;
377 }
378
Patrice Chotard879cde52019-02-12 16:50:40 +0100379 /*
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200380 * Retrieve the ADC channels devices and get measurement
381 * for each of them
Patrice Chotard879cde52019-02-12 16:50:40 +0100382 */
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200383 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
384 "#io-channel-cells", 0);
385 if (adc_count < 0) {
386 if (adc_count == -ENOENT)
387 return 0;
Patrice Chotard879cde52019-02-12 16:50:40 +0100388
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200389 log_err("Can't find adc channel (%d)\n", adc_count);
390
391 return adc_count;
392 }
Patrice Chotardcded32f2019-04-30 18:09:38 +0200393
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200394 /* perform maximum of 2 ADC measurements to detect power supply current */
395 for (i = 0; i < 2; i++) {
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200396 ret = adc_measurement(node, adc_count, &min_uV, &max_uV);
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200397 if (ret)
398 return ret;
399
400 /*
401 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
402 * board is plugged on an USB-C 3A power supply and boot process can
403 * continue.
404 */
405 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
406 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
407 min_uV <= USB_LOW_THRESHOLD_UV)
408 return 0;
409
410 if (i == 0) {
411 log_err("Previous ADC measurements was not the one expected, retry in 20ms\n");
412 mdelay(20); /* equal to max tPDDebounce duration (min 10ms - max 20ms) */
413 }
414 }
415
416 log_notice("****************************************************\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200417 /*
418 * If highest and lowest value are either both below
419 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
420 * means USB TYPE-C is in unattached mode, this is an issue, make
421 * u-boot,error-led blinking and stop boot process.
422 */
423 if ((max_uV > USB_LOW_THRESHOLD_UV &&
424 min_uV > USB_LOW_THRESHOLD_UV) ||
425 (max_uV <= USB_LOW_THRESHOLD_UV &&
426 min_uV <= USB_LOW_THRESHOLD_UV)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100427 log_notice("* ERROR USB TYPE-C connection in unattached mode *\n");
428 log_notice("* Check that USB TYPE-C cable is correctly plugged *\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200429 /* with 125ms interval, led will blink for 17.02 years ....*/
430 nb_blink = U32_MAX;
431 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100432
Patrice Chotardcded32f2019-04-30 18:09:38 +0200433 if (max_uV > USB_LOW_THRESHOLD_UV &&
434 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
435 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100436 log_notice("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100437 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200438 }
439
440 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
441 max_uV <= USB_START_LOW_THRESHOLD_UV &&
442 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100443 log_notice("* WARNING 1.5A power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100444 nb_blink = 3;
445 }
446
Patrice Chotardcded32f2019-04-30 18:09:38 +0200447 /*
448 * If highest value is above 2.15 Volts that means that the USB TypeC
449 * supplies more than 3 Amp, this is not compliant with TypeC specification
450 */
451 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100452 log_notice("* USB TYPE-C charger not compliant with *\n");
453 log_notice("* specification *\n");
454 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200455 /* with 125ms interval, led will blink for 17.02 years ....*/
456 nb_blink = U32_MAX;
457 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100458 log_notice("* Current too low, use a 3A power supply! *\n");
459 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200460 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100461
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200462 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100463
464 return 0;
465}
466
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100467static void sysconf_init(void)
468{
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100469 u8 *syscfg;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100470 struct udevice *pwr_dev;
471 struct udevice *pwr_reg;
472 struct udevice *dev;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100473 u32 otp = 0;
Patrick Delaunay181298e2020-04-22 14:29:16 +0200474 int ret;
475 u32 bootr, val;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100476
477 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
478
479 /* interconnect update : select master using the port 1 */
480 /* LTDC = AXI_M9 */
481 /* GPU = AXI_M8 */
482 /* today information is hardcoded in U-Boot */
483 writel(BIT(9), syscfg + SYSCFG_ICNR);
484
485 /* disable Pull-Down for boot pin connected to VDD */
486 bootr = readl(syscfg + SYSCFG_BOOTR);
487 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
488 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
489 writel(bootr, syscfg + SYSCFG_BOOTR);
490
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100491 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
492 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
493 * The customer will have to disable this for low frequencies
494 * or if AFMUX is selected but the function not used, typically for
495 * TRACE. Otherwise, impact on power consumption.
496 *
497 * WARNING:
498 * enabling High Speed mode while VDD>2.7V
499 * with the OTP product_below_2v5 (OTP 18, BIT 13)
500 * erroneously set to 1 can damage the IC!
501 * => U-Boot set the register only if VDD < 2.7V (in DT)
502 * but this value need to be consistent with board design
503 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200504 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700505 DM_DRIVER_GET(stm32mp_pwr_pmic),
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200506 &pwr_dev);
Patrick Delaunay7c104822022-06-20 12:36:10 +0200507 if (!ret) {
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100508 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700509 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100510 &dev);
511 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100512 log_err("Can't find stm32mp_bsec driver\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100513 return;
514 }
515
516 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200517 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100518 otp = otp & BIT(13);
519
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200520 /* get VDD = vdd-supply */
521 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100522 &pwr_reg);
523
524 /* check if VDD is Low Voltage */
525 if (!ret) {
526 if (regulator_get_value(pwr_reg) < 2700000) {
527 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
528 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
529 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
530 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
531 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
532 syscfg + SYSCFG_IOCTRLSETR);
533
534 if (!otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100535 log_err("product_below_2v5=0: HSLVEN protected by HW\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100536 } else {
537 if (otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100538 log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100539 }
540 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100541 log_debug("VDD unknown");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100542 }
543 }
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100544
545 /* activate automatic I/O compensation
546 * warning: need to ensure CSI enabled and ready in clock driver
547 */
548 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
549
Patrick Delaunay181298e2020-04-22 14:29:16 +0200550 /* poll until ready (1s timeout) */
551 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
552 val & SYSCFG_CMPCR_READY,
553 1000000);
554 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100555 log_err("SYSCFG: I/O compensation failed, timeout.\n");
Patrick Delaunay181298e2020-04-22 14:29:16 +0200556 led_error_blink(10);
557 }
558
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100559 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100560}
561
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200562static int board_stm32mp15x_dk2_init(void)
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200563{
564 ofnode node;
565 struct gpio_desc hdmi, audio;
566 int ret = 0;
567
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200568 /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200569 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
570 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100571 log_debug("no hdmi-transmitter@39 ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200572 return -ENOENT;
573 }
574
575 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
576 &hdmi, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100577 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200578 return -ENOENT;
579 }
580
581 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
582 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100583 log_debug("no cs42l51@4a ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200584 return -ENOENT;
585 }
586
587 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
588 &audio, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100589 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200590 return -ENOENT;
591 }
592
593 /* before power up, insure that HDMI and AUDIO IC is under reset */
594 ret = dm_gpio_set_value(&hdmi, 1);
595 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100596 log_err("can't set_value for hdmi_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200597 goto error;
598 }
599 ret = dm_gpio_set_value(&audio, 1);
600 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100601 log_err("can't set_value for audio_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200602 goto error;
603 }
604
605 /* power-up audio IC */
606 regulator_autoset_by_name("v1v8_audio", NULL);
607
608 /* power-up HDMI IC */
609 regulator_autoset_by_name("v1v2_hdmi", NULL);
610 regulator_autoset_by_name("v3v3_hdmi", NULL);
611
612error:
613 return ret;
614}
615
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200616static bool board_is_stm32mp15x_dk2(void)
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200617{
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100618 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200619 of_machine_is_compatible("st,stm32mp157c-dk2"))
620 return true;
621
622 return false;
623}
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200624
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200625static bool board_is_stm32mp15x_ev1(void)
Patrick Delaunay486ae962020-04-22 14:29:13 +0200626{
627 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
628 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
629 of_machine_is_compatible("st,stm32mp157c-ev1") ||
630 of_machine_is_compatible("st,stm32mp157d-ev1") ||
631 of_machine_is_compatible("st,stm32mp157f-ev1")))
632 return true;
633
634 return false;
635}
636
637/* touchscreen driver: only used for pincontrol configuration */
638static const struct udevice_id goodix_ids[] = {
639 { .compatible = "goodix,gt9147", },
640 { }
641};
642
643U_BOOT_DRIVER(goodix) = {
644 .name = "goodix",
645 .id = UCLASS_NOP,
646 .of_match = goodix_ids,
647};
648
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200649static void board_stm32mp15x_ev1_init(void)
Patrick Delaunay486ae962020-04-22 14:29:13 +0200650{
651 struct udevice *dev;
652
653 /* configure IRQ line on EV1 for touchscreen before LCD reset */
Simon Glass65130cd2020-12-28 20:34:56 -0700654 uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev);
Patrick Delaunay486ae962020-04-22 14:29:13 +0200655}
656
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100657/* board dependent setup after realloc */
658int board_init(void)
659{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100660 board_key_check();
661
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200662 if (board_is_stm32mp15x_ev1())
663 board_stm32mp15x_ev1_init();
Patrick Delaunay486ae962020-04-22 14:29:13 +0200664
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200665 if (board_is_stm32mp15x_dk2())
666 board_stm32mp15x_dk2_init();
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200667
Patrick Delaunay7c104822022-06-20 12:36:10 +0200668 regulators_enable_boot_on(_DEBUG);
Patrick Delaunay6519e442019-07-05 17:20:09 +0200669
Patrick Delaunay72a57622021-10-11 09:52:50 +0200670 /*
671 * sysconf initialisation done only when U-Boot is running in secure
672 * done in TF-A for TFABOOT.
673 */
674 if (IS_ENABLED(CONFIG_ARMV7_NONSEC))
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200675 sysconf_init();
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100676
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200677 setup_led(LEDST_ON);
678
Simon Glassb8196212023-02-05 15:39:42 -0700679#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
Sughosh Ganue166b5e2022-10-21 18:15:58 +0530680 efi_guid_t image_type_guid = STM32MP_FIP_IMAGE_GUID;
681
682 guidcpy(&fw_images[0].image_type_id, &image_type_guid);
683 fw_images[0].fw_name = u"STM32MP-FIP";
684 fw_images[0].image_index = 1;
685#endif
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100686 return 0;
687}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100688
689int board_late_init(void)
690{
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100691 const void *fdt_compat;
692 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200693 int ret;
694 u32 otp;
695 struct udevice *dev;
696 char buf[10];
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200697 char dtb_name[256];
698 int buf_len;
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100699
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200700 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
Patrick Delaunay4e506b02022-05-19 09:07:29 +0200701 fdt_compat = ofnode_get_property(ofnode_root(), "compatible",
702 &fdt_compat_len);
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200703 if (fdt_compat && fdt_compat_len) {
704 if (strncmp(fdt_compat, "st,", 3) != 0) {
705 env_set("board_name", fdt_compat);
706 } else {
707 env_set("board_name", fdt_compat + 3);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200708
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200709 buf_len = sizeof(dtb_name);
710 strncpy(dtb_name, fdt_compat + 3, buf_len);
711 buf_len -= strlen(fdt_compat + 3);
712 strncat(dtb_name, ".dtb", buf_len);
713 env_set("fdtfile", dtb_name);
714 }
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200715 }
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200716 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700717 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200718 &dev);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200719
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200720 if (!ret)
721 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
722 &otp, sizeof(otp));
723 if (ret > 0 && otp) {
724 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
725 env_set("board_id", buf);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200726
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200727 snprintf(buf, sizeof(buf), "0x%04x",
728 ((otp >> 8) & 0xF) - 1 + 0xA);
729 env_set("board_rev", buf);
730 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200731 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100732
Patrice Chotard879cde52019-02-12 16:50:40 +0100733 /* for DK1/DK2 boards */
734 board_check_usb_power();
735
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100736 return 0;
737}
Patrice Chotard879cde52019-02-12 16:50:40 +0100738
739void board_quiesce_devices(void)
740{
741 setup_led(LEDST_OFF);
742}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200743
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200744/* eth init function : weak called in eqos driver */
745int board_interface_eth_init(struct udevice *dev,
746 phy_interface_t interface_type)
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200747{
748 u8 *syscfg;
749 u32 value;
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200750 bool eth_clk_sel_reg = false;
751 bool eth_ref_clk_sel_reg = false;
752
753 /* Gigabit Ethernet 125MHz clock selection. */
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200754 eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200755
756 /* Ethernet 50Mhz RMII clock selection */
757 eth_ref_clk_sel_reg =
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200758 dev_read_bool(dev, "st,eth-ref-clk-sel");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200759
760 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
761
762 if (!syscfg)
763 return -ENODEV;
764
765 switch (interface_type) {
766 case PHY_INTERFACE_MODE_MII:
767 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
768 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100769 log_debug("PHY_INTERFACE_MODE_MII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200770 break;
771 case PHY_INTERFACE_MODE_GMII:
772 if (eth_clk_sel_reg)
773 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
774 SYSCFG_PMCSETR_ETH_CLK_SEL;
775 else
776 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100777 log_debug("PHY_INTERFACE_MODE_GMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200778 break;
779 case PHY_INTERFACE_MODE_RMII:
780 if (eth_ref_clk_sel_reg)
781 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
782 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
783 else
784 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100785 log_debug("PHY_INTERFACE_MODE_RMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200786 break;
787 case PHY_INTERFACE_MODE_RGMII:
788 case PHY_INTERFACE_MODE_RGMII_ID:
789 case PHY_INTERFACE_MODE_RGMII_RXID:
790 case PHY_INTERFACE_MODE_RGMII_TXID:
791 if (eth_clk_sel_reg)
792 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
793 SYSCFG_PMCSETR_ETH_CLK_SEL;
794 else
795 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100796 log_debug("PHY_INTERFACE_MODE_RGMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200797 break;
798 default:
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100799 log_debug("Do not manage %d interface\n",
800 interface_type);
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200801 /* Do not manage others interfaces */
802 return -EINVAL;
803 }
804
805 /* clear and set ETH configuration bits */
806 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
807 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
808 syscfg + SYSCFG_PMCCLRR);
809 writel(value, syscfg + SYSCFG_PMCSETR);
810
811 return 0;
812}
813
Patrice Chotard34320372019-05-02 18:28:05 +0200814enum env_location env_get_location(enum env_operation op, int prio)
815{
816 u32 bootmode = get_bootmode();
817
818 if (prio)
819 return ENVL_UNKNOWN;
820
821 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
Patrick Delaunay455b0652020-06-15 11:18:22 +0200822 case BOOT_FLASH_SD:
823 case BOOT_FLASH_EMMC:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200824 if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
825 return ENVL_MMC;
826 else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
827 return ENVL_EXT4;
828 else
829 return ENVL_NOWHERE;
830
Patrice Chotard34320372019-05-02 18:28:05 +0200831 case BOOT_FLASH_NAND:
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100832 case BOOT_FLASH_SPINAND:
Simon Glassbd3ebf62023-02-05 15:39:48 -0700833 if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200834 return ENVL_UBI;
835 else
836 return ENVL_NOWHERE;
837
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200838 case BOOT_FLASH_NOR:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200839 if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
840 return ENVL_SPI_FLASH;
841 else
842 return ENVL_NOWHERE;
843
Patrice Chotard34320372019-05-02 18:28:05 +0200844 default:
845 return ENVL_NOWHERE;
846 }
847}
848
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200849const char *env_ext4_get_intf(void)
850{
851 u32 bootmode = get_bootmode();
852
853 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
854 case BOOT_FLASH_SD:
855 case BOOT_FLASH_EMMC:
856 return "mmc";
857 default:
858 return "";
859 }
860}
861
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200862int mmc_get_boot(void)
863{
864 struct udevice *dev;
865 u32 boot_mode = get_bootmode();
866 unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
867 char cmd[20];
868 const u32 sdmmc_addr[] = {
869 STM32_SDMMC1_BASE,
870 STM32_SDMMC2_BASE,
871 STM32_SDMMC3_BASE
872 };
873
Rasmus Villemoes6d83f3c2023-03-24 08:55:19 +0100874 if (instance >= ARRAY_SIZE(sdmmc_addr))
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200875 return 0;
876
877 /* search associated sdmmc node in devicetree */
878 snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]);
879 if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) {
880 log_err("mmc%d = %s not found in device tree!\n", instance, cmd);
881 return 0;
882 }
883
884 return dev_seq(dev);
885};
886
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200887const char *env_ext4_get_dev_part(void)
888{
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000889 static char *const env_dev_part =
890#ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
891 CONFIG_ENV_EXT4_DEVICE_AND_PART;
892#else
893 "";
894#endif
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200895 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000896
897 if (strlen(env_dev_part) > 0)
898 return env_dev_part;
899
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200900 return dev_part[mmc_get_boot()];
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200901}
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000902
Patrick Delaunay455b0652020-06-15 11:18:22 +0200903int mmc_get_env_dev(void)
904{
Patrick Delaunay520e2992022-01-11 16:37:21 +0100905 const int mmc_env_dev = CONFIG_IS_ENABLED(ENV_IS_IN_MMC, (CONFIG_SYS_MMC_ENV_DEV), (-1));
906
907 if (mmc_env_dev >= 0)
908 return mmc_env_dev;
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100909
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100910 /* use boot instance to select the correct mmc device identifier */
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200911 return mmc_get_boot();
Patrick Delaunay455b0652020-06-15 11:18:22 +0200912}
Patrick Delaunay455b0652020-06-15 11:18:22 +0200913
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200914#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900915int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200916{
Patrick Delaunay67e95d52023-06-08 17:16:44 +0200917 fdt_copy_fixed_partitions(blob);
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200918
Simon Glass703f5bd2023-02-05 15:39:57 -0700919 if (IS_ENABLED(CONFIG_FDT_SIMPLEFB))
Patrick Delaunay028fddd2021-11-15 16:32:23 +0100920 fdt_simplefb_enable_and_mem_rsv(blob);
921
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200922 return 0;
923}
924#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200925
926static void board_copro_image_process(ulong fw_image, size_t fw_size)
927{
928 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
929
930 if (!rproc_is_initialized())
931 if (rproc_init()) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100932 log_err("Remote Processor %d initialization failed\n",
933 id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200934 return;
935 }
936
937 ret = rproc_load(id, fw_image, fw_size);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100938 log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
939 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200940
Fabien Dessennead6cc942019-10-30 14:38:32 +0100941 if (!ret)
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200942 rproc_start(id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200943}
944
945U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);
Sughosh Ganu73abe8e2022-10-21 18:16:00 +0530946
947#if defined(CONFIG_FWU_MULTI_BANK_UPDATE)
948
949#include <fwu.h>
950
951/**
952 * fwu_plat_get_bootidx() - Get the value of the boot index
953 * @boot_idx: Boot index value
954 *
955 * Get the value of the bank(partition) from which the platform
956 * has booted. This value is passed to U-Boot from the earlier
957 * stage bootloader which loads and boots all the relevant
958 * firmware images
959 *
960 */
961void fwu_plat_get_bootidx(uint *boot_idx)
962{
963 *boot_idx = (readl(TAMP_FWU_BOOT_INFO_REG) >>
964 TAMP_FWU_BOOT_IDX_OFFSET) & TAMP_FWU_BOOT_IDX_MASK;
965}
966#endif /* CONFIG_FWU_MULTI_BANK_UPDATE */