blob: fff1880e5b03b850da4415ef27c6a154679dd243 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrick Delaunayf7b2a842020-11-06 19:01:59 +01005
6#define LOG_CATEGORY LOGC_BOARD
7
Patrice Chotard879cde52019-02-12 16:50:40 +01008#include <common.h>
9#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +020010#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020011#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +020012#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020013#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060014#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060015#include <env_internal.h>
Patrick Delaunay028fddd2021-11-15 16:32:23 +010016#include <fdt_simplefb.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060017#include <fdt_support.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010018#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020019#include <generic-phy.h>
Simon Glassf11478f2019-12-28 10:45:07 -070020#include <hang.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010021#include <i2c.h>
Simon Glassa7b51302019-11-14 12:57:46 -070022#include <init.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010023#include <led.h>
Simon Glass0f2af882020-05-10 11:40:05 -060024#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070025#include <malloc.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010026#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020027#include <mtd_node.h>
Simon Glass274e0b02020-05-10 11:39:56 -060028#include <net.h>
Patrick Delaunaybff66f92019-08-01 11:29:03 +020029#include <netdev.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020030#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020031#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020032#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010033#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010034#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020035#include <watchdog.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060036#include <asm/global_data.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020037#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010038#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010039#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020040#include <asm/arch/sys_proto.h>
Simon Glass0034d962021-08-07 07:24:01 -060041#include <dm/ofnode.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020042#include <jffs2/load_kernel.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060043#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060044#include <linux/delay.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070045#include <linux/err.h>
Patrick Delaunay181298e2020-04-22 14:29:16 +020046#include <linux/iopoll.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020047#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010048#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010049
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +020050#include "../../st/common/stusb160x.h"
51
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010052/* SYSCFG registers */
53#define SYSCFG_BOOTR 0x00
54#define SYSCFG_PMCSETR 0x04
55#define SYSCFG_IOCTRLSETR 0x18
56#define SYSCFG_ICNR 0x1C
57#define SYSCFG_CMPCR 0x20
58#define SYSCFG_CMPENSETR 0x24
59#define SYSCFG_PMCCLRR 0x44
60
61#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
62#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
63
64#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
65#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
66#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
67#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
68#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
69
70#define SYSCFG_CMPCR_SW_CTRL BIT(1)
71#define SYSCFG_CMPCR_READY BIT(8)
72
73#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
74
75#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
76#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
77
78#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
79
80#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020081#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
82#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
83#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010084
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010085/*
86 * Get a global data pointer
87 */
88DECLARE_GLOBAL_DATA_PTR;
89
Patrice Chotardcded32f2019-04-30 18:09:38 +020090#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010091#define USB_WARNING_LOW_THRESHOLD_UV 660000
92#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020093#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010094
Patrick Delaunayf2f25c32020-05-25 12:19:46 +020095int board_early_init_f(void)
96{
97 /* nothing to do, only used in SPL */
98 return 0;
99}
100
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100101int checkboard(void)
102{
103 int ret;
104 char *mode;
105 u32 otp;
106 struct udevice *dev;
107 const char *fdt_compat;
108 int fdt_compat_len;
109
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200110 if (IS_ENABLED(CONFIG_TFABOOT)) {
111 if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE))
112 mode = "trusted - stm32image";
113 else
114 mode = "trusted";
115 } else {
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100116 mode = "basic";
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200117 }
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100118
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100119 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
120 &fdt_compat_len);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100121
122 log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
123 fdt_compat && fdt_compat_len ? fdt_compat : "");
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100124
Patrick Delaunay52163d92020-03-24 09:05:00 +0100125 /* display the STMicroelectronics board identification */
Patrick Delaunay0885c232020-02-12 19:37:42 +0100126 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
127 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700128 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay0885c232020-02-12 19:37:42 +0100129 &dev);
130 if (!ret)
131 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
132 &otp, sizeof(otp));
133 if (ret > 0 && otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100134 log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
135 otp >> 16,
136 (otp >> 12) & 0xF,
137 (otp >> 4) & 0xF,
138 ((otp >> 8) & 0xF) - 1 + 'A',
139 otp & 0xF);
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100140 }
141
142 return 0;
143}
144
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100145static void board_key_check(void)
146{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100147 ofnode node;
148 struct gpio_desc gpio;
149 enum forced_boot_mode boot_mode = BOOT_NORMAL;
150
Patrick Delaunayf6604852020-07-31 16:31:42 +0200151 if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
152 return;
153
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100154 node = ofnode_path("/config");
155 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100156 log_debug("no /config node?\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100157 return;
158 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200159 if (IS_ENABLED(CONFIG_FASTBOOT)) {
160 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
161 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100162 log_debug("could not find a /config/st,fastboot-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200163 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200164 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200165 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100166 log_notice("Fastboot key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200167 boot_mode = BOOT_FASTBOOT;
168 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100169
Patrick Delaunayf6604852020-07-31 16:31:42 +0200170 dm_gpio_free(NULL, &gpio);
171 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100172 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200173 if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
174 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
175 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100176 log_debug("could not find a /config/st,stm32prog-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200177 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200178 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200179 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100180 log_notice("STM32Programmer key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200181 boot_mode = BOOT_STM32PROG;
182 }
183 dm_gpio_free(NULL, &gpio);
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100184 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100185 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100186 if (boot_mode != BOOT_NORMAL) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100187 log_notice("entering download mode...\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100188 clrsetbits_le32(TAMP_BOOT_CONTEXT,
189 TAMP_BOOT_FORCED_MASK,
190 boot_mode);
191 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100192}
193
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100194int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200195{
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100196 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200197 int ret;
198
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200199 if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
200 return -ENODEV;
201
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +0200202 /* if typec stusb160x is present, means DK1 or DK2 board */
203 ret = stusb160x_cable_connected();
204 if (ret >= 0)
205 return ret;
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100206
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100207 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700208 DM_DRIVER_GET(dwc2_udc_otg),
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100209 &dwc2_udc_otg);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100210 if (ret) {
211 log_debug("dwc2_udc_otg init failed\n");
212 return ret;
213 }
Patrice Chotard204079b2018-08-10 17:12:14 +0200214
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100215 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100216}
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200217
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200218#ifdef CONFIG_USB_GADGET_DOWNLOAD
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200219#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
220#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
221
222int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
223{
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200224 if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
225 !strcmp(name, "usb_dnl_dfu"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200226 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200227 else if (IS_ENABLED(CONFIG_FASTBOOT) &&
228 !strcmp(name, "usb_dnl_fastboot"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200229 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
230 &dev->idProduct);
231 else
232 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
233
234 return 0;
235}
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200236#endif /* CONFIG_USB_GADGET_DOWNLOAD */
Patrice Chotard879cde52019-02-12 16:50:40 +0100237
238static int get_led(struct udevice **dev, char *led_string)
239{
Simon Glass0034d962021-08-07 07:24:01 -0600240 const char *led_name;
Patrice Chotard879cde52019-02-12 16:50:40 +0100241 int ret;
242
Simon Glass0034d962021-08-07 07:24:01 -0600243 led_name = ofnode_conf_read_str(led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100244 if (!led_name) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100245 log_debug("could not find %s config string\n", led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100246 return -ENOENT;
247 }
248 ret = led_get_by_label(led_name, dev);
249 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100250 log_debug("get=%d\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100251 return ret;
252 }
253
254 return 0;
255}
256
257static int setup_led(enum led_state_t cmd)
258{
259 struct udevice *dev;
260 int ret;
261
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200262 if (!CONFIG_IS_ENABLED(LED))
263 return 0;
264
Patrice Chotard879cde52019-02-12 16:50:40 +0100265 ret = get_led(&dev, "u-boot,boot-led");
266 if (ret)
267 return ret;
268
269 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200270 return ret;
271}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200272
273static void __maybe_unused led_error_blink(u32 nb_blink)
274{
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200275 int ret;
276 struct udevice *led;
277 u32 i;
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200278
279 if (!nb_blink)
280 return;
281
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200282 if (CONFIG_IS_ENABLED(LED)) {
283 ret = get_led(&led, "u-boot,error-led");
284 if (!ret) {
285 /* make u-boot,error-led blinking */
286 /* if U32_MAX and 125ms interval, for 17.02 years */
287 for (i = 0; i < 2 * nb_blink; i++) {
288 led_set_state(led, LEDST_TOGGLE);
289 mdelay(125);
290 WATCHDOG_RESET();
291 }
292 led_set_state(led, LEDST_ON);
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200293 }
294 }
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200295
296 /* infinite: the boot process must be stopped */
297 if (nb_blink == U32_MAX)
298 hang();
299}
Patrice Chotard204079b2018-08-10 17:12:14 +0200300
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200301static int adc_measurement(ofnode node, int adc_count, int *min_uV, int *max_uV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100302{
303 struct ofnode_phandle_args adc_args;
304 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100305 unsigned int raw;
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200306 int ret, uV;
307 int i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100308
309 for (i = 0; i < adc_count; i++) {
310 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
311 "#io-channel-cells", 0, i,
312 &adc_args)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100313 log_debug("can't find /config/st,adc_usb_pd\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100314 return 0;
315 }
316
317 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
318 &adc);
319
320 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100321 log_err("Can't get adc device(%d)\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100322 return ret;
323 }
324
325 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
326 &raw);
327 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100328 log_err("single shot failed for %s[%d]!\n",
329 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100330 return ret;
331 }
332 /* Convert to uV */
333 if (!adc_raw_to_uV(adc, raw, &uV)) {
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200334 if (uV > *max_uV)
335 *max_uV = uV;
336 if (uV < *min_uV)
337 *min_uV = uV;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100338 log_debug("%s[%02d] = %u, %d uV\n",
339 adc->name, adc_args.args[0], raw, uV);
Patrice Chotard879cde52019-02-12 16:50:40 +0100340 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100341 log_err("Can't get uV value for %s[%d]\n",
342 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100343 }
344 }
345
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200346 return 0;
347}
348
349static int board_check_usb_power(void)
350{
351 ofnode node;
352 int max_uV = 0;
353 int min_uV = USB_START_HIGH_THRESHOLD_UV;
354 int adc_count, ret;
355 u32 nb_blink;
356 u8 i;
357
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200358 if (!IS_ENABLED(CONFIG_ADC))
359 return -ENODEV;
360
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200361 node = ofnode_path("/config");
362 if (!ofnode_valid(node)) {
363 log_debug("no /config node?\n");
364 return -ENOENT;
365 }
366
Patrice Chotard879cde52019-02-12 16:50:40 +0100367 /*
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200368 * Retrieve the ADC channels devices and get measurement
369 * for each of them
Patrice Chotard879cde52019-02-12 16:50:40 +0100370 */
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200371 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
372 "#io-channel-cells", 0);
373 if (adc_count < 0) {
374 if (adc_count == -ENOENT)
375 return 0;
Patrice Chotard879cde52019-02-12 16:50:40 +0100376
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200377 log_err("Can't find adc channel (%d)\n", adc_count);
378
379 return adc_count;
380 }
Patrice Chotardcded32f2019-04-30 18:09:38 +0200381
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200382 /* perform maximum of 2 ADC measurements to detect power supply current */
383 for (i = 0; i < 2; i++) {
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200384 ret = adc_measurement(node, adc_count, &min_uV, &max_uV);
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200385 if (ret)
386 return ret;
387
388 /*
389 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
390 * board is plugged on an USB-C 3A power supply and boot process can
391 * continue.
392 */
393 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
394 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
395 min_uV <= USB_LOW_THRESHOLD_UV)
396 return 0;
397
398 if (i == 0) {
399 log_err("Previous ADC measurements was not the one expected, retry in 20ms\n");
400 mdelay(20); /* equal to max tPDDebounce duration (min 10ms - max 20ms) */
401 }
402 }
403
404 log_notice("****************************************************\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200405 /*
406 * If highest and lowest value are either both below
407 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
408 * means USB TYPE-C is in unattached mode, this is an issue, make
409 * u-boot,error-led blinking and stop boot process.
410 */
411 if ((max_uV > USB_LOW_THRESHOLD_UV &&
412 min_uV > USB_LOW_THRESHOLD_UV) ||
413 (max_uV <= USB_LOW_THRESHOLD_UV &&
414 min_uV <= USB_LOW_THRESHOLD_UV)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100415 log_notice("* ERROR USB TYPE-C connection in unattached mode *\n");
416 log_notice("* Check that USB TYPE-C cable is correctly plugged *\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200417 /* with 125ms interval, led will blink for 17.02 years ....*/
418 nb_blink = U32_MAX;
419 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100420
Patrice Chotardcded32f2019-04-30 18:09:38 +0200421 if (max_uV > USB_LOW_THRESHOLD_UV &&
422 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
423 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100424 log_notice("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100425 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200426 }
427
428 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
429 max_uV <= USB_START_LOW_THRESHOLD_UV &&
430 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100431 log_notice("* WARNING 1.5A power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100432 nb_blink = 3;
433 }
434
Patrice Chotardcded32f2019-04-30 18:09:38 +0200435 /*
436 * If highest value is above 2.15 Volts that means that the USB TypeC
437 * supplies more than 3 Amp, this is not compliant with TypeC specification
438 */
439 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100440 log_notice("* USB TYPE-C charger not compliant with *\n");
441 log_notice("* specification *\n");
442 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200443 /* with 125ms interval, led will blink for 17.02 years ....*/
444 nb_blink = U32_MAX;
445 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100446 log_notice("* Current too low, use a 3A power supply! *\n");
447 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200448 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100449
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200450 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100451
452 return 0;
453}
454
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100455static void sysconf_init(void)
456{
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100457 u8 *syscfg;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100458 struct udevice *pwr_dev;
459 struct udevice *pwr_reg;
460 struct udevice *dev;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100461 u32 otp = 0;
Patrick Delaunay181298e2020-04-22 14:29:16 +0200462 int ret;
463 u32 bootr, val;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100464
465 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
466
467 /* interconnect update : select master using the port 1 */
468 /* LTDC = AXI_M9 */
469 /* GPU = AXI_M8 */
470 /* today information is hardcoded in U-Boot */
471 writel(BIT(9), syscfg + SYSCFG_ICNR);
472
473 /* disable Pull-Down for boot pin connected to VDD */
474 bootr = readl(syscfg + SYSCFG_BOOTR);
475 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
476 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
477 writel(bootr, syscfg + SYSCFG_BOOTR);
478
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100479 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
480 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
481 * The customer will have to disable this for low frequencies
482 * or if AFMUX is selected but the function not used, typically for
483 * TRACE. Otherwise, impact on power consumption.
484 *
485 * WARNING:
486 * enabling High Speed mode while VDD>2.7V
487 * with the OTP product_below_2v5 (OTP 18, BIT 13)
488 * erroneously set to 1 can damage the IC!
489 * => U-Boot set the register only if VDD < 2.7V (in DT)
490 * but this value need to be consistent with board design
491 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200492 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700493 DM_DRIVER_GET(stm32mp_pwr_pmic),
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200494 &pwr_dev);
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200495 if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100496 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700497 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100498 &dev);
499 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100500 log_err("Can't find stm32mp_bsec driver\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100501 return;
502 }
503
504 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200505 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100506 otp = otp & BIT(13);
507
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200508 /* get VDD = vdd-supply */
509 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100510 &pwr_reg);
511
512 /* check if VDD is Low Voltage */
513 if (!ret) {
514 if (regulator_get_value(pwr_reg) < 2700000) {
515 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
516 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
517 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
518 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
519 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
520 syscfg + SYSCFG_IOCTRLSETR);
521
522 if (!otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100523 log_err("product_below_2v5=0: HSLVEN protected by HW\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100524 } else {
525 if (otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100526 log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100527 }
528 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100529 log_debug("VDD unknown");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100530 }
531 }
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100532
533 /* activate automatic I/O compensation
534 * warning: need to ensure CSI enabled and ready in clock driver
535 */
536 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
537
Patrick Delaunay181298e2020-04-22 14:29:16 +0200538 /* poll until ready (1s timeout) */
539 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
540 val & SYSCFG_CMPCR_READY,
541 1000000);
542 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100543 log_err("SYSCFG: I/O compensation failed, timeout.\n");
Patrick Delaunay181298e2020-04-22 14:29:16 +0200544 led_error_blink(10);
545 }
546
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100547 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100548}
549
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200550/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
551static int dk2_i2c1_fix(void)
552{
553 ofnode node;
554 struct gpio_desc hdmi, audio;
555 int ret = 0;
556
Patrick Delaunayc75bc6a2020-07-31 16:31:47 +0200557 if (!IS_ENABLED(CONFIG_DM_REGULATOR))
558 return -ENODEV;
559
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200560 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
561 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100562 log_debug("no hdmi-transmitter@39 ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200563 return -ENOENT;
564 }
565
566 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
567 &hdmi, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100568 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200569 return -ENOENT;
570 }
571
572 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
573 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100574 log_debug("no cs42l51@4a ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200575 return -ENOENT;
576 }
577
578 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
579 &audio, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100580 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200581 return -ENOENT;
582 }
583
584 /* before power up, insure that HDMI and AUDIO IC is under reset */
585 ret = dm_gpio_set_value(&hdmi, 1);
586 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100587 log_err("can't set_value for hdmi_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200588 goto error;
589 }
590 ret = dm_gpio_set_value(&audio, 1);
591 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100592 log_err("can't set_value for audio_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200593 goto error;
594 }
595
596 /* power-up audio IC */
597 regulator_autoset_by_name("v1v8_audio", NULL);
598
599 /* power-up HDMI IC */
600 regulator_autoset_by_name("v1v2_hdmi", NULL);
601 regulator_autoset_by_name("v3v3_hdmi", NULL);
602
603error:
604 return ret;
605}
606
607static bool board_is_dk2(void)
608{
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100609 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200610 of_machine_is_compatible("st,stm32mp157c-dk2"))
611 return true;
612
613 return false;
614}
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200615
Patrick Delaunay486ae962020-04-22 14:29:13 +0200616static bool board_is_ev1(void)
617{
618 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
619 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
620 of_machine_is_compatible("st,stm32mp157c-ev1") ||
621 of_machine_is_compatible("st,stm32mp157d-ev1") ||
622 of_machine_is_compatible("st,stm32mp157f-ev1")))
623 return true;
624
625 return false;
626}
627
628/* touchscreen driver: only used for pincontrol configuration */
629static const struct udevice_id goodix_ids[] = {
630 { .compatible = "goodix,gt9147", },
631 { }
632};
633
634U_BOOT_DRIVER(goodix) = {
635 .name = "goodix",
636 .id = UCLASS_NOP,
637 .of_match = goodix_ids,
638};
639
640static void board_ev1_init(void)
641{
642 struct udevice *dev;
643
644 /* configure IRQ line on EV1 for touchscreen before LCD reset */
Simon Glass65130cd2020-12-28 20:34:56 -0700645 uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev);
Patrick Delaunay486ae962020-04-22 14:29:13 +0200646}
647
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100648/* board dependent setup after realloc */
649int board_init(void)
650{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100651 board_key_check();
652
Patrick Delaunay486ae962020-04-22 14:29:13 +0200653 if (board_is_ev1())
654 board_ev1_init();
655
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200656 if (board_is_dk2())
657 dk2_i2c1_fix();
658
Patrick Delaunayc75bc6a2020-07-31 16:31:47 +0200659 if (IS_ENABLED(CONFIG_DM_REGULATOR))
660 regulators_enable_boot_on(_DEBUG);
Patrick Delaunay6519e442019-07-05 17:20:09 +0200661
Patrick Delaunay72a57622021-10-11 09:52:50 +0200662 /*
663 * sysconf initialisation done only when U-Boot is running in secure
664 * done in TF-A for TFABOOT.
665 */
666 if (IS_ENABLED(CONFIG_ARMV7_NONSEC))
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200667 sysconf_init();
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100668
Patrick Delaunay78f68f22020-04-10 19:14:01 +0200669 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay36e3d112018-07-27 16:37:08 +0200670 led_default_state();
671
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200672 setup_led(LEDST_ON);
673
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100674 return 0;
675}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100676
677int board_late_init(void)
678{
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100679 const void *fdt_compat;
680 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200681 int ret;
682 u32 otp;
683 struct udevice *dev;
684 char buf[10];
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200685 char dtb_name[256];
686 int buf_len;
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100687
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200688 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
689 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
690 &fdt_compat_len);
691 if (fdt_compat && fdt_compat_len) {
692 if (strncmp(fdt_compat, "st,", 3) != 0) {
693 env_set("board_name", fdt_compat);
694 } else {
695 env_set("board_name", fdt_compat + 3);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200696
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200697 buf_len = sizeof(dtb_name);
698 strncpy(dtb_name, fdt_compat + 3, buf_len);
699 buf_len -= strlen(fdt_compat + 3);
700 strncat(dtb_name, ".dtb", buf_len);
701 env_set("fdtfile", dtb_name);
702 }
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200703 }
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200704 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700705 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200706 &dev);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200707
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200708 if (!ret)
709 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
710 &otp, sizeof(otp));
711 if (ret > 0 && otp) {
712 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
713 env_set("board_id", buf);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200714
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200715 snprintf(buf, sizeof(buf), "0x%04x",
716 ((otp >> 8) & 0xF) - 1 + 0xA);
717 env_set("board_rev", buf);
718 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200719 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100720
Patrice Chotard879cde52019-02-12 16:50:40 +0100721 /* for DK1/DK2 boards */
722 board_check_usb_power();
723
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100724 return 0;
725}
Patrice Chotard879cde52019-02-12 16:50:40 +0100726
727void board_quiesce_devices(void)
728{
729 setup_led(LEDST_OFF);
730}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200731
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200732/* eth init function : weak called in eqos driver */
733int board_interface_eth_init(struct udevice *dev,
734 phy_interface_t interface_type)
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200735{
736 u8 *syscfg;
737 u32 value;
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200738 bool eth_clk_sel_reg = false;
739 bool eth_ref_clk_sel_reg = false;
740
741 /* Gigabit Ethernet 125MHz clock selection. */
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200742 eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200743
744 /* Ethernet 50Mhz RMII clock selection */
745 eth_ref_clk_sel_reg =
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200746 dev_read_bool(dev, "st,eth-ref-clk-sel");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200747
748 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
749
750 if (!syscfg)
751 return -ENODEV;
752
753 switch (interface_type) {
754 case PHY_INTERFACE_MODE_MII:
755 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
756 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100757 log_debug("PHY_INTERFACE_MODE_MII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200758 break;
759 case PHY_INTERFACE_MODE_GMII:
760 if (eth_clk_sel_reg)
761 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
762 SYSCFG_PMCSETR_ETH_CLK_SEL;
763 else
764 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100765 log_debug("PHY_INTERFACE_MODE_GMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200766 break;
767 case PHY_INTERFACE_MODE_RMII:
768 if (eth_ref_clk_sel_reg)
769 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
770 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
771 else
772 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100773 log_debug("PHY_INTERFACE_MODE_RMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200774 break;
775 case PHY_INTERFACE_MODE_RGMII:
776 case PHY_INTERFACE_MODE_RGMII_ID:
777 case PHY_INTERFACE_MODE_RGMII_RXID:
778 case PHY_INTERFACE_MODE_RGMII_TXID:
779 if (eth_clk_sel_reg)
780 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
781 SYSCFG_PMCSETR_ETH_CLK_SEL;
782 else
783 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100784 log_debug("PHY_INTERFACE_MODE_RGMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200785 break;
786 default:
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100787 log_debug("Do not manage %d interface\n",
788 interface_type);
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200789 /* Do not manage others interfaces */
790 return -EINVAL;
791 }
792
793 /* clear and set ETH configuration bits */
794 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
795 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
796 syscfg + SYSCFG_PMCCLRR);
797 writel(value, syscfg + SYSCFG_PMCSETR);
798
799 return 0;
800}
801
Patrice Chotard34320372019-05-02 18:28:05 +0200802enum env_location env_get_location(enum env_operation op, int prio)
803{
804 u32 bootmode = get_bootmode();
805
806 if (prio)
807 return ENVL_UNKNOWN;
808
809 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
Patrick Delaunay455b0652020-06-15 11:18:22 +0200810 case BOOT_FLASH_SD:
811 case BOOT_FLASH_EMMC:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200812 if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
813 return ENVL_MMC;
814 else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
815 return ENVL_EXT4;
816 else
817 return ENVL_NOWHERE;
818
Patrice Chotard34320372019-05-02 18:28:05 +0200819 case BOOT_FLASH_NAND:
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100820 case BOOT_FLASH_SPINAND:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200821 if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
822 return ENVL_UBI;
823 else
824 return ENVL_NOWHERE;
825
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200826 case BOOT_FLASH_NOR:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200827 if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
828 return ENVL_SPI_FLASH;
829 else
830 return ENVL_NOWHERE;
831
Patrice Chotard34320372019-05-02 18:28:05 +0200832 default:
833 return ENVL_NOWHERE;
834 }
835}
836
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200837const char *env_ext4_get_intf(void)
838{
839 u32 bootmode = get_bootmode();
840
841 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
842 case BOOT_FLASH_SD:
843 case BOOT_FLASH_EMMC:
844 return "mmc";
845 default:
846 return "";
847 }
848}
849
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200850int mmc_get_boot(void)
851{
852 struct udevice *dev;
853 u32 boot_mode = get_bootmode();
854 unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
855 char cmd[20];
856 const u32 sdmmc_addr[] = {
857 STM32_SDMMC1_BASE,
858 STM32_SDMMC2_BASE,
859 STM32_SDMMC3_BASE
860 };
861
862 if (instance > ARRAY_SIZE(sdmmc_addr))
863 return 0;
864
865 /* search associated sdmmc node in devicetree */
866 snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]);
867 if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) {
868 log_err("mmc%d = %s not found in device tree!\n", instance, cmd);
869 return 0;
870 }
871
872 return dev_seq(dev);
873};
874
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200875const char *env_ext4_get_dev_part(void)
876{
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000877 static char *const env_dev_part =
878#ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
879 CONFIG_ENV_EXT4_DEVICE_AND_PART;
880#else
881 "";
882#endif
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200883 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000884
885 if (strlen(env_dev_part) > 0)
886 return env_dev_part;
887
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200888 return dev_part[mmc_get_boot()];
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200889}
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000890
Patrick Delaunay455b0652020-06-15 11:18:22 +0200891int mmc_get_env_dev(void)
892{
Patrick Delaunay520e2992022-01-11 16:37:21 +0100893 const int mmc_env_dev = CONFIG_IS_ENABLED(ENV_IS_IN_MMC, (CONFIG_SYS_MMC_ENV_DEV), (-1));
894
895 if (mmc_env_dev >= 0)
896 return mmc_env_dev;
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100897
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100898 /* use boot instance to select the correct mmc device identifier */
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200899 return mmc_get_boot();
Patrick Delaunay455b0652020-06-15 11:18:22 +0200900}
Patrick Delaunay455b0652020-06-15 11:18:22 +0200901
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200902#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900903int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200904{
Patrick Delaunaya8a67ed2020-07-29 13:24:52 +0200905 static const struct node_info nodes[] = {
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200906 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100907 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200908 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
Christophe Kerello15359e42020-07-31 09:53:42 +0200909 { "st,stm32mp1-fmc2-nfc", MTD_DEV_TYPE_NAND, },
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200910 };
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200911 char *boot_device;
Patrick Delaunay9d96e902020-07-31 16:31:50 +0200912
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200913 /* Check the boot-source and don't update MTD for serial or usb boot */
914 boot_device = env_get("boot_device");
915 if (!boot_device ||
916 (strcmp(boot_device, "serial") && strcmp(boot_device, "usb")))
917 if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
918 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200919
Patrick Delaunay028fddd2021-11-15 16:32:23 +0100920 if (CONFIG_IS_ENABLED(FDT_SIMPLEFB))
921 fdt_simplefb_enable_and_mem_rsv(blob);
922
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200923 return 0;
924}
925#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200926
927static void board_copro_image_process(ulong fw_image, size_t fw_size)
928{
929 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
930
931 if (!rproc_is_initialized())
932 if (rproc_init()) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100933 log_err("Remote Processor %d initialization failed\n",
934 id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200935 return;
936 }
937
938 ret = rproc_load(id, fw_image, fw_size);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100939 log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
940 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200941
Fabien Dessennead6cc942019-10-30 14:38:32 +0100942 if (!ret)
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200943 rproc_start(id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200944}
945
946U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);