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Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrick Delaunayf7b2a842020-11-06 19:01:59 +01005
6#define LOG_CATEGORY LOGC_BOARD
7
Patrice Chotard879cde52019-02-12 16:50:40 +01008#include <common.h>
9#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +020010#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020011#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +020012#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020013#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060014#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060015#include <env_internal.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060016#include <fdt_support.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010017#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020018#include <generic-phy.h>
Simon Glassf11478f2019-12-28 10:45:07 -070019#include <hang.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010020#include <i2c.h>
Simon Glassa7b51302019-11-14 12:57:46 -070021#include <init.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010022#include <led.h>
Simon Glass0f2af882020-05-10 11:40:05 -060023#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070024#include <malloc.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010025#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020026#include <mtd_node.h>
Simon Glass274e0b02020-05-10 11:39:56 -060027#include <net.h>
Patrick Delaunaybff66f92019-08-01 11:29:03 +020028#include <netdev.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020029#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020030#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020031#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010032#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010033#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020034#include <watchdog.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060035#include <asm/global_data.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020036#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010037#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010038#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020039#include <asm/arch/sys_proto.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020040#include <jffs2/load_kernel.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060041#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060042#include <linux/delay.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070043#include <linux/err.h>
Patrick Delaunay181298e2020-04-22 14:29:16 +020044#include <linux/iopoll.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020045#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010046#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010047
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +020048#include "../../st/common/stusb160x.h"
49
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010050/* SYSCFG registers */
51#define SYSCFG_BOOTR 0x00
52#define SYSCFG_PMCSETR 0x04
53#define SYSCFG_IOCTRLSETR 0x18
54#define SYSCFG_ICNR 0x1C
55#define SYSCFG_CMPCR 0x20
56#define SYSCFG_CMPENSETR 0x24
57#define SYSCFG_PMCCLRR 0x44
58
59#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
60#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
61
62#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
63#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
64#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
65#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
66#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
67
68#define SYSCFG_CMPCR_SW_CTRL BIT(1)
69#define SYSCFG_CMPCR_READY BIT(8)
70
71#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
72
73#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
74#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
75
76#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
77
78#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020079#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
80#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
81#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010082
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010083/*
84 * Get a global data pointer
85 */
86DECLARE_GLOBAL_DATA_PTR;
87
Patrice Chotardcded32f2019-04-30 18:09:38 +020088#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010089#define USB_WARNING_LOW_THRESHOLD_UV 660000
90#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020091#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010092
Patrick Delaunayf2f25c32020-05-25 12:19:46 +020093int board_early_init_f(void)
94{
95 /* nothing to do, only used in SPL */
96 return 0;
97}
98
Patrick Delaunay92dc1022019-02-12 11:44:41 +010099int checkboard(void)
100{
101 int ret;
102 char *mode;
103 u32 otp;
104 struct udevice *dev;
105 const char *fdt_compat;
106 int fdt_compat_len;
107
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200108 if (IS_ENABLED(CONFIG_TFABOOT)) {
109 if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE))
110 mode = "trusted - stm32image";
111 else
112 mode = "trusted";
113 } else {
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100114 mode = "basic";
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200115 }
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100116
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100117 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
118 &fdt_compat_len);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100119
120 log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
121 fdt_compat && fdt_compat_len ? fdt_compat : "");
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100122
Patrick Delaunay52163d92020-03-24 09:05:00 +0100123 /* display the STMicroelectronics board identification */
Patrick Delaunay0885c232020-02-12 19:37:42 +0100124 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
125 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700126 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay0885c232020-02-12 19:37:42 +0100127 &dev);
128 if (!ret)
129 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
130 &otp, sizeof(otp));
131 if (ret > 0 && otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100132 log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
133 otp >> 16,
134 (otp >> 12) & 0xF,
135 (otp >> 4) & 0xF,
136 ((otp >> 8) & 0xF) - 1 + 'A',
137 otp & 0xF);
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100138 }
139
140 return 0;
141}
142
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100143static void board_key_check(void)
144{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100145 ofnode node;
146 struct gpio_desc gpio;
147 enum forced_boot_mode boot_mode = BOOT_NORMAL;
148
Patrick Delaunayf6604852020-07-31 16:31:42 +0200149 if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
150 return;
151
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100152 node = ofnode_path("/config");
153 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100154 log_debug("no /config node?\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100155 return;
156 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200157 if (IS_ENABLED(CONFIG_FASTBOOT)) {
158 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
159 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100160 log_debug("could not find a /config/st,fastboot-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200161 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200162 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200163 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100164 log_notice("Fastboot key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200165 boot_mode = BOOT_FASTBOOT;
166 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100167
Patrick Delaunayf6604852020-07-31 16:31:42 +0200168 dm_gpio_free(NULL, &gpio);
169 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100170 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200171 if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
172 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
173 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100174 log_debug("could not find a /config/st,stm32prog-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200175 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200176 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200177 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100178 log_notice("STM32Programmer key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200179 boot_mode = BOOT_STM32PROG;
180 }
181 dm_gpio_free(NULL, &gpio);
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100182 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100183 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100184 if (boot_mode != BOOT_NORMAL) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100185 log_notice("entering download mode...\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100186 clrsetbits_le32(TAMP_BOOT_CONTEXT,
187 TAMP_BOOT_FORCED_MASK,
188 boot_mode);
189 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100190}
191
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100192int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200193{
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100194 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200195 int ret;
196
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200197 if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
198 return -ENODEV;
199
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +0200200 /* if typec stusb160x is present, means DK1 or DK2 board */
201 ret = stusb160x_cable_connected();
202 if (ret >= 0)
203 return ret;
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100204
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100205 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700206 DM_DRIVER_GET(dwc2_udc_otg),
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100207 &dwc2_udc_otg);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100208 if (ret) {
209 log_debug("dwc2_udc_otg init failed\n");
210 return ret;
211 }
Patrice Chotard204079b2018-08-10 17:12:14 +0200212
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100213 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100214}
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200215
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200216#ifdef CONFIG_USB_GADGET_DOWNLOAD
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200217#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
218#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
219
220int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
221{
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200222 if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
223 !strcmp(name, "usb_dnl_dfu"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200224 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200225 else if (IS_ENABLED(CONFIG_FASTBOOT) &&
226 !strcmp(name, "usb_dnl_fastboot"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200227 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
228 &dev->idProduct);
229 else
230 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
231
232 return 0;
233}
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200234#endif /* CONFIG_USB_GADGET_DOWNLOAD */
Patrice Chotard879cde52019-02-12 16:50:40 +0100235
236static int get_led(struct udevice **dev, char *led_string)
237{
238 char *led_name;
239 int ret;
240
241 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
242 if (!led_name) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100243 log_debug("could not find %s config string\n", led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100244 return -ENOENT;
245 }
246 ret = led_get_by_label(led_name, dev);
247 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100248 log_debug("get=%d\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100249 return ret;
250 }
251
252 return 0;
253}
254
255static int setup_led(enum led_state_t cmd)
256{
257 struct udevice *dev;
258 int ret;
259
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200260 if (!CONFIG_IS_ENABLED(LED))
261 return 0;
262
Patrice Chotard879cde52019-02-12 16:50:40 +0100263 ret = get_led(&dev, "u-boot,boot-led");
264 if (ret)
265 return ret;
266
267 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200268 return ret;
269}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200270
271static void __maybe_unused led_error_blink(u32 nb_blink)
272{
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200273 int ret;
274 struct udevice *led;
275 u32 i;
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200276
277 if (!nb_blink)
278 return;
279
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200280 if (CONFIG_IS_ENABLED(LED)) {
281 ret = get_led(&led, "u-boot,error-led");
282 if (!ret) {
283 /* make u-boot,error-led blinking */
284 /* if U32_MAX and 125ms interval, for 17.02 years */
285 for (i = 0; i < 2 * nb_blink; i++) {
286 led_set_state(led, LEDST_TOGGLE);
287 mdelay(125);
288 WATCHDOG_RESET();
289 }
290 led_set_state(led, LEDST_ON);
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200291 }
292 }
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200293
294 /* infinite: the boot process must be stopped */
295 if (nb_blink == U32_MAX)
296 hang();
297}
Patrice Chotard204079b2018-08-10 17:12:14 +0200298
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200299static int adc_measurement(ofnode node, int adc_count, int *min_uV, int *max_uV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100300{
301 struct ofnode_phandle_args adc_args;
302 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100303 unsigned int raw;
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200304 int ret, uV;
305 int i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100306
307 for (i = 0; i < adc_count; i++) {
308 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
309 "#io-channel-cells", 0, i,
310 &adc_args)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100311 log_debug("can't find /config/st,adc_usb_pd\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100312 return 0;
313 }
314
315 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
316 &adc);
317
318 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100319 log_err("Can't get adc device(%d)\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100320 return ret;
321 }
322
323 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
324 &raw);
325 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100326 log_err("single shot failed for %s[%d]!\n",
327 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100328 return ret;
329 }
330 /* Convert to uV */
331 if (!adc_raw_to_uV(adc, raw, &uV)) {
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200332 if (uV > *max_uV)
333 *max_uV = uV;
334 if (uV < *min_uV)
335 *min_uV = uV;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100336 log_debug("%s[%02d] = %u, %d uV\n",
337 adc->name, adc_args.args[0], raw, uV);
Patrice Chotard879cde52019-02-12 16:50:40 +0100338 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100339 log_err("Can't get uV value for %s[%d]\n",
340 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100341 }
342 }
343
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200344 return 0;
345}
346
347static int board_check_usb_power(void)
348{
349 ofnode node;
350 int max_uV = 0;
351 int min_uV = USB_START_HIGH_THRESHOLD_UV;
352 int adc_count, ret;
353 u32 nb_blink;
354 u8 i;
355
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200356 if (!IS_ENABLED(CONFIG_ADC))
357 return -ENODEV;
358
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200359 node = ofnode_path("/config");
360 if (!ofnode_valid(node)) {
361 log_debug("no /config node?\n");
362 return -ENOENT;
363 }
364
Patrice Chotard879cde52019-02-12 16:50:40 +0100365 /*
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200366 * Retrieve the ADC channels devices and get measurement
367 * for each of them
Patrice Chotard879cde52019-02-12 16:50:40 +0100368 */
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200369 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
370 "#io-channel-cells", 0);
371 if (adc_count < 0) {
372 if (adc_count == -ENOENT)
373 return 0;
Patrice Chotard879cde52019-02-12 16:50:40 +0100374
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200375 log_err("Can't find adc channel (%d)\n", adc_count);
376
377 return adc_count;
378 }
Patrice Chotardcded32f2019-04-30 18:09:38 +0200379
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200380 /* perform maximum of 2 ADC measurements to detect power supply current */
381 for (i = 0; i < 2; i++) {
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200382 ret = adc_measurement(node, adc_count, &min_uV, &max_uV);
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200383 if (ret)
384 return ret;
385
386 /*
387 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
388 * board is plugged on an USB-C 3A power supply and boot process can
389 * continue.
390 */
391 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
392 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
393 min_uV <= USB_LOW_THRESHOLD_UV)
394 return 0;
395
396 if (i == 0) {
397 log_err("Previous ADC measurements was not the one expected, retry in 20ms\n");
398 mdelay(20); /* equal to max tPDDebounce duration (min 10ms - max 20ms) */
399 }
400 }
401
402 log_notice("****************************************************\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200403 /*
404 * If highest and lowest value are either both below
405 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
406 * means USB TYPE-C is in unattached mode, this is an issue, make
407 * u-boot,error-led blinking and stop boot process.
408 */
409 if ((max_uV > USB_LOW_THRESHOLD_UV &&
410 min_uV > USB_LOW_THRESHOLD_UV) ||
411 (max_uV <= USB_LOW_THRESHOLD_UV &&
412 min_uV <= USB_LOW_THRESHOLD_UV)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100413 log_notice("* ERROR USB TYPE-C connection in unattached mode *\n");
414 log_notice("* Check that USB TYPE-C cable is correctly plugged *\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200415 /* with 125ms interval, led will blink for 17.02 years ....*/
416 nb_blink = U32_MAX;
417 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100418
Patrice Chotardcded32f2019-04-30 18:09:38 +0200419 if (max_uV > USB_LOW_THRESHOLD_UV &&
420 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
421 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100422 log_notice("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100423 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200424 }
425
426 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
427 max_uV <= USB_START_LOW_THRESHOLD_UV &&
428 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100429 log_notice("* WARNING 1.5A power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100430 nb_blink = 3;
431 }
432
Patrice Chotardcded32f2019-04-30 18:09:38 +0200433 /*
434 * If highest value is above 2.15 Volts that means that the USB TypeC
435 * supplies more than 3 Amp, this is not compliant with TypeC specification
436 */
437 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100438 log_notice("* USB TYPE-C charger not compliant with *\n");
439 log_notice("* specification *\n");
440 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200441 /* with 125ms interval, led will blink for 17.02 years ....*/
442 nb_blink = U32_MAX;
443 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100444 log_notice("* Current too low, use a 3A power supply! *\n");
445 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200446 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100447
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200448 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100449
450 return 0;
451}
452
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100453static void sysconf_init(void)
454{
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100455 u8 *syscfg;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100456 struct udevice *pwr_dev;
457 struct udevice *pwr_reg;
458 struct udevice *dev;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100459 u32 otp = 0;
Patrick Delaunay181298e2020-04-22 14:29:16 +0200460 int ret;
461 u32 bootr, val;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100462
463 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
464
465 /* interconnect update : select master using the port 1 */
466 /* LTDC = AXI_M9 */
467 /* GPU = AXI_M8 */
468 /* today information is hardcoded in U-Boot */
469 writel(BIT(9), syscfg + SYSCFG_ICNR);
470
471 /* disable Pull-Down for boot pin connected to VDD */
472 bootr = readl(syscfg + SYSCFG_BOOTR);
473 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
474 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
475 writel(bootr, syscfg + SYSCFG_BOOTR);
476
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100477 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
478 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
479 * The customer will have to disable this for low frequencies
480 * or if AFMUX is selected but the function not used, typically for
481 * TRACE. Otherwise, impact on power consumption.
482 *
483 * WARNING:
484 * enabling High Speed mode while VDD>2.7V
485 * with the OTP product_below_2v5 (OTP 18, BIT 13)
486 * erroneously set to 1 can damage the IC!
487 * => U-Boot set the register only if VDD < 2.7V (in DT)
488 * but this value need to be consistent with board design
489 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200490 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700491 DM_DRIVER_GET(stm32mp_pwr_pmic),
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200492 &pwr_dev);
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200493 if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100494 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700495 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100496 &dev);
497 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100498 log_err("Can't find stm32mp_bsec driver\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100499 return;
500 }
501
502 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200503 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100504 otp = otp & BIT(13);
505
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200506 /* get VDD = vdd-supply */
507 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100508 &pwr_reg);
509
510 /* check if VDD is Low Voltage */
511 if (!ret) {
512 if (regulator_get_value(pwr_reg) < 2700000) {
513 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
514 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
515 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
516 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
517 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
518 syscfg + SYSCFG_IOCTRLSETR);
519
520 if (!otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100521 log_err("product_below_2v5=0: HSLVEN protected by HW\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100522 } else {
523 if (otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100524 log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100525 }
526 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100527 log_debug("VDD unknown");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100528 }
529 }
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100530
531 /* activate automatic I/O compensation
532 * warning: need to ensure CSI enabled and ready in clock driver
533 */
534 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
535
Patrick Delaunay181298e2020-04-22 14:29:16 +0200536 /* poll until ready (1s timeout) */
537 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
538 val & SYSCFG_CMPCR_READY,
539 1000000);
540 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100541 log_err("SYSCFG: I/O compensation failed, timeout.\n");
Patrick Delaunay181298e2020-04-22 14:29:16 +0200542 led_error_blink(10);
543 }
544
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100545 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100546}
547
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200548/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
549static int dk2_i2c1_fix(void)
550{
551 ofnode node;
552 struct gpio_desc hdmi, audio;
553 int ret = 0;
554
Patrick Delaunayc75bc6a2020-07-31 16:31:47 +0200555 if (!IS_ENABLED(CONFIG_DM_REGULATOR))
556 return -ENODEV;
557
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200558 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
559 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100560 log_debug("no hdmi-transmitter@39 ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200561 return -ENOENT;
562 }
563
564 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
565 &hdmi, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100566 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200567 return -ENOENT;
568 }
569
570 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
571 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100572 log_debug("no cs42l51@4a ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200573 return -ENOENT;
574 }
575
576 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
577 &audio, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100578 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200579 return -ENOENT;
580 }
581
582 /* before power up, insure that HDMI and AUDIO IC is under reset */
583 ret = dm_gpio_set_value(&hdmi, 1);
584 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100585 log_err("can't set_value for hdmi_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200586 goto error;
587 }
588 ret = dm_gpio_set_value(&audio, 1);
589 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100590 log_err("can't set_value for audio_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200591 goto error;
592 }
593
594 /* power-up audio IC */
595 regulator_autoset_by_name("v1v8_audio", NULL);
596
597 /* power-up HDMI IC */
598 regulator_autoset_by_name("v1v2_hdmi", NULL);
599 regulator_autoset_by_name("v3v3_hdmi", NULL);
600
601error:
602 return ret;
603}
604
605static bool board_is_dk2(void)
606{
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100607 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200608 of_machine_is_compatible("st,stm32mp157c-dk2"))
609 return true;
610
611 return false;
612}
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200613
Patrick Delaunay486ae962020-04-22 14:29:13 +0200614static bool board_is_ev1(void)
615{
616 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
617 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
618 of_machine_is_compatible("st,stm32mp157c-ev1") ||
619 of_machine_is_compatible("st,stm32mp157d-ev1") ||
620 of_machine_is_compatible("st,stm32mp157f-ev1")))
621 return true;
622
623 return false;
624}
625
626/* touchscreen driver: only used for pincontrol configuration */
627static const struct udevice_id goodix_ids[] = {
628 { .compatible = "goodix,gt9147", },
629 { }
630};
631
632U_BOOT_DRIVER(goodix) = {
633 .name = "goodix",
634 .id = UCLASS_NOP,
635 .of_match = goodix_ids,
636};
637
638static void board_ev1_init(void)
639{
640 struct udevice *dev;
641
642 /* configure IRQ line on EV1 for touchscreen before LCD reset */
Simon Glass65130cd2020-12-28 20:34:56 -0700643 uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev);
Patrick Delaunay486ae962020-04-22 14:29:13 +0200644}
645
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100646/* board dependent setup after realloc */
647int board_init(void)
648{
649 /* address of boot parameters */
650 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
651
Patrick Delaunay97896402020-06-04 14:30:24 +0200652 if (CONFIG_IS_ENABLED(DM_GPIO_HOG))
653 gpio_hog_probe_all();
Patrice Chotard972723a2019-03-11 11:13:17 +0100654
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100655 board_key_check();
656
Patrick Delaunay486ae962020-04-22 14:29:13 +0200657 if (board_is_ev1())
658 board_ev1_init();
659
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200660 if (board_is_dk2())
661 dk2_i2c1_fix();
662
Patrick Delaunayc75bc6a2020-07-31 16:31:47 +0200663 if (IS_ENABLED(CONFIG_DM_REGULATOR))
664 regulators_enable_boot_on(_DEBUG);
Patrick Delaunay6519e442019-07-05 17:20:09 +0200665
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200666 if (!IS_ENABLED(CONFIG_TFABOOT))
667 sysconf_init();
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100668
Patrick Delaunay78f68f22020-04-10 19:14:01 +0200669 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay36e3d112018-07-27 16:37:08 +0200670 led_default_state();
671
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200672 setup_led(LEDST_ON);
673
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100674 return 0;
675}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100676
677int board_late_init(void)
678{
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100679 const void *fdt_compat;
680 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200681 int ret;
682 u32 otp;
683 struct udevice *dev;
684 char buf[10];
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200685 char dtb_name[256];
686 int buf_len;
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100687
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200688 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
689 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
690 &fdt_compat_len);
691 if (fdt_compat && fdt_compat_len) {
692 if (strncmp(fdt_compat, "st,", 3) != 0) {
693 env_set("board_name", fdt_compat);
694 } else {
695 env_set("board_name", fdt_compat + 3);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200696
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200697 buf_len = sizeof(dtb_name);
698 strncpy(dtb_name, fdt_compat + 3, buf_len);
699 buf_len -= strlen(fdt_compat + 3);
700 strncat(dtb_name, ".dtb", buf_len);
701 env_set("fdtfile", dtb_name);
702 }
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200703 }
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200704 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700705 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200706 &dev);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200707
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200708 if (!ret)
709 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
710 &otp, sizeof(otp));
711 if (ret > 0 && otp) {
712 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
713 env_set("board_id", buf);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200714
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200715 snprintf(buf, sizeof(buf), "0x%04x",
716 ((otp >> 8) & 0xF) - 1 + 0xA);
717 env_set("board_rev", buf);
718 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200719 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100720
Patrice Chotard879cde52019-02-12 16:50:40 +0100721 /* for DK1/DK2 boards */
722 board_check_usb_power();
723
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100724 return 0;
725}
Patrice Chotard879cde52019-02-12 16:50:40 +0100726
727void board_quiesce_devices(void)
728{
729 setup_led(LEDST_OFF);
730}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200731
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200732/* eth init function : weak called in eqos driver */
733int board_interface_eth_init(struct udevice *dev,
734 phy_interface_t interface_type)
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200735{
736 u8 *syscfg;
737 u32 value;
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200738 bool eth_clk_sel_reg = false;
739 bool eth_ref_clk_sel_reg = false;
740
741 /* Gigabit Ethernet 125MHz clock selection. */
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200742 eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200743
744 /* Ethernet 50Mhz RMII clock selection */
745 eth_ref_clk_sel_reg =
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200746 dev_read_bool(dev, "st,eth-ref-clk-sel");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200747
748 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
749
750 if (!syscfg)
751 return -ENODEV;
752
753 switch (interface_type) {
754 case PHY_INTERFACE_MODE_MII:
755 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
756 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100757 log_debug("PHY_INTERFACE_MODE_MII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200758 break;
759 case PHY_INTERFACE_MODE_GMII:
760 if (eth_clk_sel_reg)
761 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
762 SYSCFG_PMCSETR_ETH_CLK_SEL;
763 else
764 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100765 log_debug("PHY_INTERFACE_MODE_GMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200766 break;
767 case PHY_INTERFACE_MODE_RMII:
768 if (eth_ref_clk_sel_reg)
769 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
770 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
771 else
772 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100773 log_debug("PHY_INTERFACE_MODE_RMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200774 break;
775 case PHY_INTERFACE_MODE_RGMII:
776 case PHY_INTERFACE_MODE_RGMII_ID:
777 case PHY_INTERFACE_MODE_RGMII_RXID:
778 case PHY_INTERFACE_MODE_RGMII_TXID:
779 if (eth_clk_sel_reg)
780 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
781 SYSCFG_PMCSETR_ETH_CLK_SEL;
782 else
783 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100784 log_debug("PHY_INTERFACE_MODE_RGMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200785 break;
786 default:
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100787 log_debug("Do not manage %d interface\n",
788 interface_type);
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200789 /* Do not manage others interfaces */
790 return -EINVAL;
791 }
792
793 /* clear and set ETH configuration bits */
794 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
795 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
796 syscfg + SYSCFG_PMCCLRR);
797 writel(value, syscfg + SYSCFG_PMCSETR);
798
799 return 0;
800}
801
Patrice Chotard34320372019-05-02 18:28:05 +0200802enum env_location env_get_location(enum env_operation op, int prio)
803{
804 u32 bootmode = get_bootmode();
805
806 if (prio)
807 return ENVL_UNKNOWN;
808
809 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
Patrick Delaunay455b0652020-06-15 11:18:22 +0200810 case BOOT_FLASH_SD:
811 case BOOT_FLASH_EMMC:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200812 if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
813 return ENVL_MMC;
814 else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
815 return ENVL_EXT4;
816 else
817 return ENVL_NOWHERE;
818
Patrice Chotard34320372019-05-02 18:28:05 +0200819 case BOOT_FLASH_NAND:
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100820 case BOOT_FLASH_SPINAND:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200821 if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
822 return ENVL_UBI;
823 else
824 return ENVL_NOWHERE;
825
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200826 case BOOT_FLASH_NOR:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200827 if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
828 return ENVL_SPI_FLASH;
829 else
830 return ENVL_NOWHERE;
831
Patrice Chotard34320372019-05-02 18:28:05 +0200832 default:
833 return ENVL_NOWHERE;
834 }
835}
836
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200837const char *env_ext4_get_intf(void)
838{
839 u32 bootmode = get_bootmode();
840
841 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
842 case BOOT_FLASH_SD:
843 case BOOT_FLASH_EMMC:
844 return "mmc";
845 default:
846 return "";
847 }
848}
849
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200850int mmc_get_boot(void)
851{
852 struct udevice *dev;
853 u32 boot_mode = get_bootmode();
854 unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
855 char cmd[20];
856 const u32 sdmmc_addr[] = {
857 STM32_SDMMC1_BASE,
858 STM32_SDMMC2_BASE,
859 STM32_SDMMC3_BASE
860 };
861
862 if (instance > ARRAY_SIZE(sdmmc_addr))
863 return 0;
864
865 /* search associated sdmmc node in devicetree */
866 snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]);
867 if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) {
868 log_err("mmc%d = %s not found in device tree!\n", instance, cmd);
869 return 0;
870 }
871
872 return dev_seq(dev);
873};
874
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200875const char *env_ext4_get_dev_part(void)
876{
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000877 static char *const env_dev_part =
878#ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
879 CONFIG_ENV_EXT4_DEVICE_AND_PART;
880#else
881 "";
882#endif
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200883 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000884
885 if (strlen(env_dev_part) > 0)
886 return env_dev_part;
887
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200888 return dev_part[mmc_get_boot()];
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200889}
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000890
Patrick Delaunay455b0652020-06-15 11:18:22 +0200891int mmc_get_env_dev(void)
892{
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100893 if (CONFIG_SYS_MMC_ENV_DEV >= 0)
894 return CONFIG_SYS_MMC_ENV_DEV;
895
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100896 /* use boot instance to select the correct mmc device identifier */
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200897 return mmc_get_boot();
Patrick Delaunay455b0652020-06-15 11:18:22 +0200898}
Patrick Delaunay455b0652020-06-15 11:18:22 +0200899
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200900#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900901int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200902{
Patrick Delaunaya8a67ed2020-07-29 13:24:52 +0200903 static const struct node_info nodes[] = {
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200904 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100905 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200906 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
Christophe Kerello15359e42020-07-31 09:53:42 +0200907 { "st,stm32mp1-fmc2-nfc", MTD_DEV_TYPE_NAND, },
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200908 };
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200909 char *boot_device;
Patrick Delaunay9d96e902020-07-31 16:31:50 +0200910
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200911 /* Check the boot-source and don't update MTD for serial or usb boot */
912 boot_device = env_get("boot_device");
913 if (!boot_device ||
914 (strcmp(boot_device, "serial") && strcmp(boot_device, "usb")))
915 if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
916 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200917
918 return 0;
919}
920#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200921
922static void board_copro_image_process(ulong fw_image, size_t fw_size)
923{
924 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
925
926 if (!rproc_is_initialized())
927 if (rproc_init()) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100928 log_err("Remote Processor %d initialization failed\n",
929 id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200930 return;
931 }
932
933 ret = rproc_load(id, fw_image, fw_size);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100934 log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
935 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200936
Fabien Dessennead6cc942019-10-30 14:38:32 +0100937 if (!ret)
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200938 rproc_start(id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200939}
940
941U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);