blob: 95e60781748fcd009c902086767722ae04707055 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrice Chotard879cde52019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +02007#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +02008#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +02009#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020010#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060011#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060012#include <env_internal.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010013#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020014#include <generic-phy.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010015#include <i2c.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010016#include <led.h>
17#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020018#include <mtd.h>
19#include <mtd_node.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020020#include <phy.h>
21#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010022#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010023#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020024#include <watchdog.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020025#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010026#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010027#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020028#include <asm/arch/sys_proto.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020029#include <jffs2/load_kernel.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020030#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010031#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010032
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010033/* SYSCFG registers */
34#define SYSCFG_BOOTR 0x00
35#define SYSCFG_PMCSETR 0x04
36#define SYSCFG_IOCTRLSETR 0x18
37#define SYSCFG_ICNR 0x1C
38#define SYSCFG_CMPCR 0x20
39#define SYSCFG_CMPENSETR 0x24
40#define SYSCFG_PMCCLRR 0x44
41
42#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
43#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
44
45#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
46#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
47#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
48#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
49#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
50
51#define SYSCFG_CMPCR_SW_CTRL BIT(1)
52#define SYSCFG_CMPCR_READY BIT(8)
53
54#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
55
56#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
57#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
58
59#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
60
61#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020062#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
63#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
64#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010065
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010066/*
67 * Get a global data pointer
68 */
69DECLARE_GLOBAL_DATA_PTR;
70
Patrice Chotardcded32f2019-04-30 18:09:38 +020071#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010072#define USB_WARNING_LOW_THRESHOLD_UV 660000
73#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020074#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010075
Patrick Delaunay92dc1022019-02-12 11:44:41 +010076int checkboard(void)
77{
78 int ret;
79 char *mode;
80 u32 otp;
81 struct udevice *dev;
82 const char *fdt_compat;
83 int fdt_compat_len;
84
Patrick Delaunayff215a42019-07-02 13:26:06 +020085 if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
86 mode = "trusted with OP-TEE";
87 else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
Patrick Delaunay92dc1022019-02-12 11:44:41 +010088 mode = "trusted";
89 else
90 mode = "basic";
91
92 printf("Board: stm32mp1 in %s mode", mode);
93 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
94 &fdt_compat_len);
95 if (fdt_compat && fdt_compat_len)
96 printf(" (%s)", fdt_compat);
97 puts("\n");
98
99 ret = uclass_get_device_by_driver(UCLASS_MISC,
100 DM_GET_DRIVER(stm32mp_bsec),
101 &dev);
102
103 if (!ret)
104 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
105 &otp, sizeof(otp));
Patrick Delaunaydcb89fd2019-08-02 13:08:05 +0200106 if (ret > 0 && otp) {
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100107 printf("Board: MB%04x Var%d Rev.%c-%02d\n",
108 otp >> 16,
109 (otp >> 12) & 0xF,
110 ((otp >> 8) & 0xF) - 1 + 'A',
111 otp & 0xF);
112 }
113
114 return 0;
115}
116
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100117static void board_key_check(void)
118{
119#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
120 ofnode node;
121 struct gpio_desc gpio;
122 enum forced_boot_mode boot_mode = BOOT_NORMAL;
123
124 node = ofnode_path("/config");
125 if (!ofnode_valid(node)) {
126 debug("%s: no /config node?\n", __func__);
127 return;
128 }
129#ifdef CONFIG_FASTBOOT
130 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
131 &gpio, GPIOD_IS_IN)) {
132 debug("%s: could not find a /config/st,fastboot-gpios\n",
133 __func__);
134 } else {
135 if (dm_gpio_get_value(&gpio)) {
136 puts("Fastboot key pressed, ");
137 boot_mode = BOOT_FASTBOOT;
138 }
139
140 dm_gpio_free(NULL, &gpio);
141 }
142#endif
143#ifdef CONFIG_CMD_STM32PROG
144 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
145 &gpio, GPIOD_IS_IN)) {
146 debug("%s: could not find a /config/st,stm32prog-gpios\n",
147 __func__);
148 } else {
149 if (dm_gpio_get_value(&gpio)) {
150 puts("STM32Programmer key pressed, ");
151 boot_mode = BOOT_STM32PROG;
152 }
153 dm_gpio_free(NULL, &gpio);
154 }
155#endif
156
157 if (boot_mode != BOOT_NORMAL) {
158 puts("entering download mode...\n");
159 clrsetbits_le32(TAMP_BOOT_CONTEXT,
160 TAMP_BOOT_FORCED_MASK,
161 boot_mode);
162 }
163#endif
164}
165
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100166#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrice Chotard204079b2018-08-10 17:12:14 +0200167
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100168/* STMicroelectronics STUSB1600 Type-C controller */
169#define STUSB1600_CC_CONNECTION_STATUS 0x0E
170
171/* STUSB1600_CC_CONNECTION_STATUS bitfields */
172#define STUSB1600_CC_ATTACH BIT(0)
173
174static int stusb1600_init(struct udevice **dev_stusb1600)
175{
176 ofnode node;
177 struct udevice *dev, *bus;
178 int ret;
179 u32 chip_addr;
180
181 *dev_stusb1600 = NULL;
182
183 /* if node stusb1600 is present, means DK1 or DK2 board */
184 node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
185 if (!ofnode_valid(node))
186 return -ENODEV;
187
188 ret = ofnode_read_u32(node, "reg", &chip_addr);
189 if (ret)
190 return -EINVAL;
191
192 ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
193 &bus);
194 if (ret) {
195 printf("bus for stusb1600 not found\n");
196 return -ENODEV;
197 }
198
199 ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
200 if (!ret)
201 *dev_stusb1600 = dev;
202
203 return ret;
204}
205
206static int stusb1600_cable_connected(struct udevice *dev)
207{
208 u8 status;
209
210 if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
211 return 0;
212
213 return status & STUSB1600_CC_ATTACH;
214}
215
216#include <usb/dwc2_udc.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100217int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200218{
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100219 struct udevice *stusb1600;
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100220 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200221 int ret;
222
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100223 if (!stusb1600_init(&stusb1600))
224 return stusb1600_cable_connected(stusb1600);
225
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100226 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
227 DM_GET_DRIVER(dwc2_udc_otg),
228 &dwc2_udc_otg);
229 if (!ret)
230 debug("dwc2_udc_otg init failed\n");
Patrice Chotard204079b2018-08-10 17:12:14 +0200231
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100232 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100233}
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100234#endif /* CONFIG_USB_GADGET */
Patrice Chotard879cde52019-02-12 16:50:40 +0100235
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200236#ifdef CONFIG_LED
Patrice Chotard879cde52019-02-12 16:50:40 +0100237static int get_led(struct udevice **dev, char *led_string)
238{
239 char *led_name;
240 int ret;
241
242 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
243 if (!led_name) {
244 pr_debug("%s: could not find %s config string\n",
245 __func__, led_string);
246 return -ENOENT;
247 }
248 ret = led_get_by_label(led_name, dev);
249 if (ret) {
250 debug("%s: get=%d\n", __func__, ret);
251 return ret;
252 }
253
254 return 0;
255}
256
257static int setup_led(enum led_state_t cmd)
258{
259 struct udevice *dev;
260 int ret;
261
262 ret = get_led(&dev, "u-boot,boot-led");
263 if (ret)
264 return ret;
265
266 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200267 return ret;
268}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200269#endif
270
271static void __maybe_unused led_error_blink(u32 nb_blink)
272{
273#ifdef CONFIG_LED
274 int ret;
275 struct udevice *led;
276 u32 i;
277#endif
278
279 if (!nb_blink)
280 return;
281
282#ifdef CONFIG_LED
283 ret = get_led(&led, "u-boot,error-led");
284 if (!ret) {
285 /* make u-boot,error-led blinking */
286 /* if U32_MAX and 125ms interval, for 17.02 years */
287 for (i = 0; i < 2 * nb_blink; i++) {
288 led_set_state(led, LEDST_TOGGLE);
289 mdelay(125);
290 WATCHDOG_RESET();
291 }
292 }
293#endif
294
295 /* infinite: the boot process must be stopped */
296 if (nb_blink == U32_MAX)
297 hang();
298}
Patrice Chotard204079b2018-08-10 17:12:14 +0200299
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200300#ifdef CONFIG_ADC
Patrice Chotard879cde52019-02-12 16:50:40 +0100301static int board_check_usb_power(void)
302{
303 struct ofnode_phandle_args adc_args;
304 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100305 ofnode node;
306 unsigned int raw;
307 int max_uV = 0;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200308 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100309 int ret, uV, adc_count;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200310 u32 nb_blink;
311 u8 i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100312 node = ofnode_path("/config");
313 if (!ofnode_valid(node)) {
314 debug("%s: no /config node?\n", __func__);
315 return -ENOENT;
316 }
317
318 /*
319 * Retrieve the ADC channels devices and get measurement
320 * for each of them
321 */
322 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
323 "#io-channel-cells");
324 if (adc_count < 0) {
325 if (adc_count == -ENOENT)
326 return 0;
327
328 pr_err("%s: can't find adc channel (%d)\n", __func__,
329 adc_count);
330
331 return adc_count;
332 }
333
334 for (i = 0; i < adc_count; i++) {
335 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
336 "#io-channel-cells", 0, i,
337 &adc_args)) {
338 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
339 __func__);
340 return 0;
341 }
342
343 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
344 &adc);
345
346 if (ret) {
347 pr_err("%s: Can't get adc device(%d)\n", __func__,
348 ret);
349 return ret;
350 }
351
352 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
353 &raw);
354 if (ret) {
355 pr_err("%s: single shot failed for %s[%d]!\n",
356 __func__, adc->name, adc_args.args[0]);
357 return ret;
358 }
359 /* Convert to uV */
360 if (!adc_raw_to_uV(adc, raw, &uV)) {
361 if (uV > max_uV)
362 max_uV = uV;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200363 if (uV < min_uV)
364 min_uV = uV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100365 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
366 adc->name, adc_args.args[0], raw, uV);
367 } else {
368 pr_err("%s: Can't get uV value for %s[%d]\n",
369 __func__, adc->name, adc_args.args[0]);
370 }
371 }
372
373 /*
374 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
375 * board is plugged on an USB-C 3A power supply and boot process can
376 * continue.
377 */
378 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotardcded32f2019-04-30 18:09:38 +0200379 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
380 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100381 return 0;
382
Patrice Chotardcded32f2019-04-30 18:09:38 +0200383 pr_err("****************************************************\n");
384
385 /*
386 * If highest and lowest value are either both below
387 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
388 * means USB TYPE-C is in unattached mode, this is an issue, make
389 * u-boot,error-led blinking and stop boot process.
390 */
391 if ((max_uV > USB_LOW_THRESHOLD_UV &&
392 min_uV > USB_LOW_THRESHOLD_UV) ||
393 (max_uV <= USB_LOW_THRESHOLD_UV &&
394 min_uV <= USB_LOW_THRESHOLD_UV)) {
395 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
396 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
397 /* with 125ms interval, led will blink for 17.02 years ....*/
398 nb_blink = U32_MAX;
399 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100400
Patrice Chotardcded32f2019-04-30 18:09:38 +0200401 if (max_uV > USB_LOW_THRESHOLD_UV &&
402 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
403 min_uV <= USB_LOW_THRESHOLD_UV) {
404 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100405 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200406 }
407
408 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
409 max_uV <= USB_START_LOW_THRESHOLD_UV &&
410 min_uV <= USB_LOW_THRESHOLD_UV) {
411 pr_err("* WARNING 1.5mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100412 nb_blink = 3;
413 }
414
Patrice Chotardcded32f2019-04-30 18:09:38 +0200415 /*
416 * If highest value is above 2.15 Volts that means that the USB TypeC
417 * supplies more than 3 Amp, this is not compliant with TypeC specification
418 */
419 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
420 pr_err("* USB TYPE-C charger not compliant with *\n");
421 pr_err("* specification *\n");
422 pr_err("****************************************************\n\n");
423 /* with 125ms interval, led will blink for 17.02 years ....*/
424 nb_blink = U32_MAX;
425 } else {
426 pr_err("* Current too low, use a 3A power supply! *\n");
427 pr_err("****************************************************\n\n");
428 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100429
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200430 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100431
432 return 0;
433}
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200434#endif /* CONFIG_ADC */
Patrice Chotard879cde52019-02-12 16:50:40 +0100435
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100436static void sysconf_init(void)
437{
438#ifndef CONFIG_STM32MP1_TRUSTED
439 u8 *syscfg;
440#ifdef CONFIG_DM_REGULATOR
441 struct udevice *pwr_dev;
442 struct udevice *pwr_reg;
443 struct udevice *dev;
444 int ret;
445 u32 otp = 0;
446#endif
447 u32 bootr;
448
449 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
450
451 /* interconnect update : select master using the port 1 */
452 /* LTDC = AXI_M9 */
453 /* GPU = AXI_M8 */
454 /* today information is hardcoded in U-Boot */
455 writel(BIT(9), syscfg + SYSCFG_ICNR);
456
457 /* disable Pull-Down for boot pin connected to VDD */
458 bootr = readl(syscfg + SYSCFG_BOOTR);
459 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
460 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
461 writel(bootr, syscfg + SYSCFG_BOOTR);
462
463#ifdef CONFIG_DM_REGULATOR
464 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
465 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
466 * The customer will have to disable this for low frequencies
467 * or if AFMUX is selected but the function not used, typically for
468 * TRACE. Otherwise, impact on power consumption.
469 *
470 * WARNING:
471 * enabling High Speed mode while VDD>2.7V
472 * with the OTP product_below_2v5 (OTP 18, BIT 13)
473 * erroneously set to 1 can damage the IC!
474 * => U-Boot set the register only if VDD < 2.7V (in DT)
475 * but this value need to be consistent with board design
476 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200477 ret = uclass_get_device_by_driver(UCLASS_PMIC,
478 DM_GET_DRIVER(stm32mp_pwr_pmic),
479 &pwr_dev);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100480 if (!ret) {
481 ret = uclass_get_device_by_driver(UCLASS_MISC,
482 DM_GET_DRIVER(stm32mp_bsec),
483 &dev);
484 if (ret) {
485 pr_err("Can't find stm32mp_bsec driver\n");
486 return;
487 }
488
489 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200490 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100491 otp = otp & BIT(13);
492
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200493 /* get VDD = vdd-supply */
494 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100495 &pwr_reg);
496
497 /* check if VDD is Low Voltage */
498 if (!ret) {
499 if (regulator_get_value(pwr_reg) < 2700000) {
500 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
501 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
502 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
503 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
504 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
505 syscfg + SYSCFG_IOCTRLSETR);
506
507 if (!otp)
508 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
509 } else {
510 if (otp)
511 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
512 }
513 } else {
514 debug("VDD unknown");
515 }
516 }
517#endif
518
519 /* activate automatic I/O compensation
520 * warning: need to ensure CSI enabled and ready in clock driver
521 */
522 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
523
524 while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
525 ;
526 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
527#endif
528}
529
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200530#ifdef CONFIG_DM_REGULATOR
531/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
532static int dk2_i2c1_fix(void)
533{
534 ofnode node;
535 struct gpio_desc hdmi, audio;
536 int ret = 0;
537
538 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
539 if (!ofnode_valid(node)) {
540 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
541 return -ENOENT;
542 }
543
544 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
545 &hdmi, GPIOD_IS_OUT)) {
546 pr_debug("%s: could not find reset-gpios\n",
547 __func__);
548 return -ENOENT;
549 }
550
551 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
552 if (!ofnode_valid(node)) {
553 pr_debug("%s: no cs42l51@4a ?\n", __func__);
554 return -ENOENT;
555 }
556
557 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
558 &audio, GPIOD_IS_OUT)) {
559 pr_debug("%s: could not find reset-gpios\n",
560 __func__);
561 return -ENOENT;
562 }
563
564 /* before power up, insure that HDMI and AUDIO IC is under reset */
565 ret = dm_gpio_set_value(&hdmi, 1);
566 if (ret) {
567 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
568 goto error;
569 }
570 ret = dm_gpio_set_value(&audio, 1);
571 if (ret) {
572 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
573 goto error;
574 }
575
576 /* power-up audio IC */
577 regulator_autoset_by_name("v1v8_audio", NULL);
578
579 /* power-up HDMI IC */
580 regulator_autoset_by_name("v1v2_hdmi", NULL);
581 regulator_autoset_by_name("v3v3_hdmi", NULL);
582
583error:
584 return ret;
585}
586
587static bool board_is_dk2(void)
588{
589 if (CONFIG_IS_ENABLED(TARGET_STM32MP157C_DK2) &&
590 of_machine_is_compatible("st,stm32mp157c-dk2"))
591 return true;
592
593 return false;
594}
595#endif
596
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100597/* board dependent setup after realloc */
598int board_init(void)
599{
Patrice Chotard972723a2019-03-11 11:13:17 +0100600 struct udevice *dev;
601
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100602 /* address of boot parameters */
603 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
604
Patrice Chotard972723a2019-03-11 11:13:17 +0100605 /* probe all PINCTRL for hog */
606 for (uclass_first_device(UCLASS_PINCTRL, &dev);
607 dev;
608 uclass_next_device(&dev)) {
609 pr_debug("probe pincontrol = %s\n", dev->name);
610 }
611
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100612 board_key_check();
613
Patrick Delaunay6519e442019-07-05 17:20:09 +0200614#ifdef CONFIG_DM_REGULATOR
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200615 if (board_is_dk2())
616 dk2_i2c1_fix();
617
Patrick Delaunay6519e442019-07-05 17:20:09 +0200618 regulators_enable_boot_on(_DEBUG);
619#endif
620
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100621 sysconf_init();
622
Patrick Delaunay7a3e4422019-07-30 19:16:40 +0200623 if (CONFIG_IS_ENABLED(CONFIG_LED))
Patrick Delaunay36e3d112018-07-27 16:37:08 +0200624 led_default_state();
625
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100626 return 0;
627}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100628
629int board_late_init(void)
630{
Patrick Delaunayf2451262019-07-30 19:16:41 +0200631 char *boot_device;
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100632#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
633 const void *fdt_compat;
634 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200635 int ret;
636 u32 otp;
637 struct udevice *dev;
638 char buf[10];
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100639
640 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
641 &fdt_compat_len);
642 if (fdt_compat && fdt_compat_len) {
643 if (strncmp(fdt_compat, "st,", 3) != 0)
644 env_set("board_name", fdt_compat);
645 else
646 env_set("board_name", fdt_compat + 3);
647 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200648 ret = uclass_get_device_by_driver(UCLASS_MISC,
649 DM_GET_DRIVER(stm32mp_bsec),
650 &dev);
651
652 if (!ret)
653 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
654 &otp, sizeof(otp));
655 if (!ret && otp) {
656 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
657 env_set("board_id", buf);
658
659 snprintf(buf, sizeof(buf), "0x%04x",
660 ((otp >> 8) & 0xF) - 1 + 0xA);
661 env_set("board_rev", buf);
662 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100663#endif
664
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200665#ifdef CONFIG_ADC
Patrice Chotard879cde52019-02-12 16:50:40 +0100666 /* for DK1/DK2 boards */
667 board_check_usb_power();
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200668#endif /* CONFIG_ADC */
Patrice Chotard879cde52019-02-12 16:50:40 +0100669
Patrick Delaunayf2451262019-07-30 19:16:41 +0200670 /* Check the boot-source to disable bootdelay */
671 boot_device = env_get("boot_device");
672 if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
673 env_set("bootdelay", "0");
674
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100675 return 0;
676}
Patrice Chotard879cde52019-02-12 16:50:40 +0100677
678void board_quiesce_devices(void)
679{
Patrick Delaunay7a3e4422019-07-30 19:16:40 +0200680#ifdef CONFIG_LED
Patrice Chotard879cde52019-02-12 16:50:40 +0100681 setup_led(LEDST_OFF);
Patrick Delaunay7a3e4422019-07-30 19:16:40 +0200682#endif
Patrice Chotard879cde52019-02-12 16:50:40 +0100683}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200684
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200685/* board interface eth init */
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200686int board_interface_eth_init(phy_interface_t interface_type,
687 bool eth_clk_sel_reg, bool eth_ref_clk_sel_reg)
688{
689 u8 *syscfg;
690 u32 value;
691
692 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
693
694 if (!syscfg)
695 return -ENODEV;
696
697 switch (interface_type) {
698 case PHY_INTERFACE_MODE_MII:
699 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
700 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
701 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
702 break;
703 case PHY_INTERFACE_MODE_GMII:
704 if (eth_clk_sel_reg)
705 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
706 SYSCFG_PMCSETR_ETH_CLK_SEL;
707 else
708 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
709 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
710 break;
711 case PHY_INTERFACE_MODE_RMII:
712 if (eth_ref_clk_sel_reg)
713 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
714 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
715 else
716 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
717 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
718 break;
719 case PHY_INTERFACE_MODE_RGMII:
720 case PHY_INTERFACE_MODE_RGMII_ID:
721 case PHY_INTERFACE_MODE_RGMII_RXID:
722 case PHY_INTERFACE_MODE_RGMII_TXID:
723 if (eth_clk_sel_reg)
724 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
725 SYSCFG_PMCSETR_ETH_CLK_SEL;
726 else
727 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
728 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
729 break;
730 default:
731 debug("%s: Do not manage %d interface\n",
732 __func__, interface_type);
733 /* Do not manage others interfaces */
734 return -EINVAL;
735 }
736
737 /* clear and set ETH configuration bits */
738 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
739 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
740 syscfg + SYSCFG_PMCCLRR);
741 writel(value, syscfg + SYSCFG_PMCSETR);
742
743 return 0;
744}
745
Patrice Chotard34320372019-05-02 18:28:05 +0200746enum env_location env_get_location(enum env_operation op, int prio)
747{
748 u32 bootmode = get_bootmode();
749
750 if (prio)
751 return ENVL_UNKNOWN;
752
753 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
754#ifdef CONFIG_ENV_IS_IN_EXT4
755 case BOOT_FLASH_SD:
756 case BOOT_FLASH_EMMC:
757 return ENVL_EXT4;
758#endif
759#ifdef CONFIG_ENV_IS_IN_UBI
760 case BOOT_FLASH_NAND:
761 return ENVL_UBI;
762#endif
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200763#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
764 case BOOT_FLASH_NOR:
765 return ENVL_SPI_FLASH;
766#endif
Patrice Chotard34320372019-05-02 18:28:05 +0200767 default:
768 return ENVL_NOWHERE;
769 }
770}
771
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200772#if defined(CONFIG_ENV_IS_IN_EXT4)
773const char *env_ext4_get_intf(void)
774{
775 u32 bootmode = get_bootmode();
776
777 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
778 case BOOT_FLASH_SD:
779 case BOOT_FLASH_EMMC:
780 return "mmc";
781 default:
782 return "";
783 }
784}
785
786const char *env_ext4_get_dev_part(void)
787{
788 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
789 u32 bootmode = get_bootmode();
790
791 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
792}
793#endif
794
Patrice Chotard41443cf2019-05-02 18:07:14 +0200795#ifdef CONFIG_SYS_MTDPARTS_RUNTIME
796
797#define MTDPARTS_LEN 256
798#define MTDIDS_LEN 128
799
800/**
801 * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
802 * If we need to access it before the env is relocated, then we need
803 * to use our own stack buffer. gd->env_buf will be too small.
804 *
805 * @param buf temporary buffer pointer MTDPARTS_LEN long
806 * @return mtdparts variable string, NULL if not found
807 */
808static const char *env_get_mtdparts(const char *str, char *buf)
809{
810 if (gd->flags & GD_FLG_ENV_READY)
811 return env_get(str);
812 if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
813 return buf;
814
815 return NULL;
816}
817
818/**
819 * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
820 */
821static void board_get_mtdparts(const char *dev,
822 char *mtdids,
823 char *mtdparts)
824{
825 char env_name[32] = "mtdparts_";
826 char tmp_mtdparts[MTDPARTS_LEN];
827 const char *tmp;
828
829 /* name of env variable to read = mtdparts_<dev> */
830 strcat(env_name, dev);
831 tmp = env_get_mtdparts(env_name, tmp_mtdparts);
832 if (tmp) {
833 /* mtdids: "<dev>=<dev>, ...." */
834 if (mtdids[0] != '\0')
835 strcat(mtdids, ",");
836 strcat(mtdids, dev);
837 strcat(mtdids, "=");
838 strcat(mtdids, dev);
839
840 /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
841 if (mtdparts[0] != '\0')
842 strncat(mtdparts, ";", MTDPARTS_LEN);
843 else
844 strcat(mtdparts, "mtdparts=");
845 strncat(mtdparts, dev, MTDPARTS_LEN);
846 strncat(mtdparts, ":", MTDPARTS_LEN);
847 strncat(mtdparts, tmp, MTDPARTS_LEN);
848 }
849}
850
851void board_mtdparts_default(const char **mtdids, const char **mtdparts)
852{
853 struct udevice *dev;
854 static char parts[2 * MTDPARTS_LEN + 1];
855 static char ids[MTDIDS_LEN + 1];
856 static bool mtd_initialized;
857
858 if (mtd_initialized) {
859 *mtdids = ids;
860 *mtdparts = parts;
861 return;
862 }
863
864 memset(parts, 0, sizeof(parts));
865 memset(ids, 0, sizeof(ids));
866
867 if (!uclass_get_device(UCLASS_MTD, 0, &dev))
868 board_get_mtdparts("nand0", ids, parts);
869
870 if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
871 board_get_mtdparts("nor0", ids, parts);
872
873 mtd_initialized = true;
874 *mtdids = ids;
875 *mtdparts = parts;
876 debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
877}
878#endif
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200879
880#if defined(CONFIG_OF_BOARD_SETUP)
881int ft_board_setup(void *blob, bd_t *bd)
882{
883#ifdef CONFIG_FDT_FIXUP_PARTITIONS
884 struct node_info nodes[] = {
885 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
886 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
887 };
888 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
889#endif
890
891 return 0;
892}
893#endif