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Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrice Chotard879cde52019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +02007#include <bootm.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01008#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +02009#include <clk.h>
10#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060011#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060012#include <env_internal.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010013#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020014#include <generic-phy.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010015#include <i2c.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010016#include <led.h>
17#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020018#include <mtd.h>
19#include <mtd_node.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020020#include <phy.h>
21#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010022#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010023#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020024#include <watchdog.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020025#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010026#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010027#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020028#include <asm/arch/sys_proto.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020029#include <jffs2/load_kernel.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020030#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010031#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010032
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010033/* SYSCFG registers */
34#define SYSCFG_BOOTR 0x00
35#define SYSCFG_PMCSETR 0x04
36#define SYSCFG_IOCTRLSETR 0x18
37#define SYSCFG_ICNR 0x1C
38#define SYSCFG_CMPCR 0x20
39#define SYSCFG_CMPENSETR 0x24
40#define SYSCFG_PMCCLRR 0x44
41
42#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
43#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
44
45#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
46#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
47#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
48#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
49#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
50
51#define SYSCFG_CMPCR_SW_CTRL BIT(1)
52#define SYSCFG_CMPCR_READY BIT(8)
53
54#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
55
56#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
57#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
58
59#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
60
61#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020062#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
63#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
64#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010065
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010066/*
67 * Get a global data pointer
68 */
69DECLARE_GLOBAL_DATA_PTR;
70
Patrice Chotardcded32f2019-04-30 18:09:38 +020071#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010072#define USB_WARNING_LOW_THRESHOLD_UV 660000
73#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020074#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010075
Patrick Delaunay92dc1022019-02-12 11:44:41 +010076int checkboard(void)
77{
78 int ret;
79 char *mode;
80 u32 otp;
81 struct udevice *dev;
82 const char *fdt_compat;
83 int fdt_compat_len;
84
Patrick Delaunayff215a42019-07-02 13:26:06 +020085 if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
86 mode = "trusted with OP-TEE";
87 else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
Patrick Delaunay92dc1022019-02-12 11:44:41 +010088 mode = "trusted";
89 else
90 mode = "basic";
91
92 printf("Board: stm32mp1 in %s mode", mode);
93 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
94 &fdt_compat_len);
95 if (fdt_compat && fdt_compat_len)
96 printf(" (%s)", fdt_compat);
97 puts("\n");
98
99 ret = uclass_get_device_by_driver(UCLASS_MISC,
100 DM_GET_DRIVER(stm32mp_bsec),
101 &dev);
102
103 if (!ret)
104 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
105 &otp, sizeof(otp));
106 if (!ret && otp) {
107 printf("Board: MB%04x Var%d Rev.%c-%02d\n",
108 otp >> 16,
109 (otp >> 12) & 0xF,
110 ((otp >> 8) & 0xF) - 1 + 'A',
111 otp & 0xF);
112 }
113
114 return 0;
115}
116
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100117static void board_key_check(void)
118{
119#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
120 ofnode node;
121 struct gpio_desc gpio;
122 enum forced_boot_mode boot_mode = BOOT_NORMAL;
123
124 node = ofnode_path("/config");
125 if (!ofnode_valid(node)) {
126 debug("%s: no /config node?\n", __func__);
127 return;
128 }
129#ifdef CONFIG_FASTBOOT
130 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
131 &gpio, GPIOD_IS_IN)) {
132 debug("%s: could not find a /config/st,fastboot-gpios\n",
133 __func__);
134 } else {
135 if (dm_gpio_get_value(&gpio)) {
136 puts("Fastboot key pressed, ");
137 boot_mode = BOOT_FASTBOOT;
138 }
139
140 dm_gpio_free(NULL, &gpio);
141 }
142#endif
143#ifdef CONFIG_CMD_STM32PROG
144 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
145 &gpio, GPIOD_IS_IN)) {
146 debug("%s: could not find a /config/st,stm32prog-gpios\n",
147 __func__);
148 } else {
149 if (dm_gpio_get_value(&gpio)) {
150 puts("STM32Programmer key pressed, ");
151 boot_mode = BOOT_STM32PROG;
152 }
153 dm_gpio_free(NULL, &gpio);
154 }
155#endif
156
157 if (boot_mode != BOOT_NORMAL) {
158 puts("entering download mode...\n");
159 clrsetbits_le32(TAMP_BOOT_CONTEXT,
160 TAMP_BOOT_FORCED_MASK,
161 boot_mode);
162 }
163#endif
164}
165
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100166#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrice Chotard204079b2018-08-10 17:12:14 +0200167
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100168/* STMicroelectronics STUSB1600 Type-C controller */
169#define STUSB1600_CC_CONNECTION_STATUS 0x0E
170
171/* STUSB1600_CC_CONNECTION_STATUS bitfields */
172#define STUSB1600_CC_ATTACH BIT(0)
173
174static int stusb1600_init(struct udevice **dev_stusb1600)
175{
176 ofnode node;
177 struct udevice *dev, *bus;
178 int ret;
179 u32 chip_addr;
180
181 *dev_stusb1600 = NULL;
182
183 /* if node stusb1600 is present, means DK1 or DK2 board */
184 node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
185 if (!ofnode_valid(node))
186 return -ENODEV;
187
188 ret = ofnode_read_u32(node, "reg", &chip_addr);
189 if (ret)
190 return -EINVAL;
191
192 ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
193 &bus);
194 if (ret) {
195 printf("bus for stusb1600 not found\n");
196 return -ENODEV;
197 }
198
199 ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
200 if (!ret)
201 *dev_stusb1600 = dev;
202
203 return ret;
204}
205
206static int stusb1600_cable_connected(struct udevice *dev)
207{
208 u8 status;
209
210 if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
211 return 0;
212
213 return status & STUSB1600_CC_ATTACH;
214}
215
216#include <usb/dwc2_udc.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100217int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200218{
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100219 struct udevice *stusb1600;
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100220 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200221 int ret;
222
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100223 if (!stusb1600_init(&stusb1600))
224 return stusb1600_cable_connected(stusb1600);
225
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100226 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
227 DM_GET_DRIVER(dwc2_udc_otg),
228 &dwc2_udc_otg);
229 if (!ret)
230 debug("dwc2_udc_otg init failed\n");
Patrice Chotard204079b2018-08-10 17:12:14 +0200231
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100232 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100233}
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100234#endif /* CONFIG_USB_GADGET */
Patrice Chotard879cde52019-02-12 16:50:40 +0100235
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200236#ifdef CONFIG_LED
Patrice Chotard879cde52019-02-12 16:50:40 +0100237static int get_led(struct udevice **dev, char *led_string)
238{
239 char *led_name;
240 int ret;
241
242 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
243 if (!led_name) {
244 pr_debug("%s: could not find %s config string\n",
245 __func__, led_string);
246 return -ENOENT;
247 }
248 ret = led_get_by_label(led_name, dev);
249 if (ret) {
250 debug("%s: get=%d\n", __func__, ret);
251 return ret;
252 }
253
254 return 0;
255}
256
257static int setup_led(enum led_state_t cmd)
258{
259 struct udevice *dev;
260 int ret;
261
262 ret = get_led(&dev, "u-boot,boot-led");
263 if (ret)
264 return ret;
265
266 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200267 return ret;
268}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200269#endif
270
271static void __maybe_unused led_error_blink(u32 nb_blink)
272{
273#ifdef CONFIG_LED
274 int ret;
275 struct udevice *led;
276 u32 i;
277#endif
278
279 if (!nb_blink)
280 return;
281
282#ifdef CONFIG_LED
283 ret = get_led(&led, "u-boot,error-led");
284 if (!ret) {
285 /* make u-boot,error-led blinking */
286 /* if U32_MAX and 125ms interval, for 17.02 years */
287 for (i = 0; i < 2 * nb_blink; i++) {
288 led_set_state(led, LEDST_TOGGLE);
289 mdelay(125);
290 WATCHDOG_RESET();
291 }
292 }
293#endif
294
295 /* infinite: the boot process must be stopped */
296 if (nb_blink == U32_MAX)
297 hang();
298}
Patrice Chotard204079b2018-08-10 17:12:14 +0200299
Patrice Chotard879cde52019-02-12 16:50:40 +0100300static int board_check_usb_power(void)
301{
302 struct ofnode_phandle_args adc_args;
303 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100304 ofnode node;
305 unsigned int raw;
306 int max_uV = 0;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200307 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100308 int ret, uV, adc_count;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200309 u32 nb_blink;
310 u8 i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100311 node = ofnode_path("/config");
312 if (!ofnode_valid(node)) {
313 debug("%s: no /config node?\n", __func__);
314 return -ENOENT;
315 }
316
317 /*
318 * Retrieve the ADC channels devices and get measurement
319 * for each of them
320 */
321 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
322 "#io-channel-cells");
323 if (adc_count < 0) {
324 if (adc_count == -ENOENT)
325 return 0;
326
327 pr_err("%s: can't find adc channel (%d)\n", __func__,
328 adc_count);
329
330 return adc_count;
331 }
332
333 for (i = 0; i < adc_count; i++) {
334 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
335 "#io-channel-cells", 0, i,
336 &adc_args)) {
337 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
338 __func__);
339 return 0;
340 }
341
342 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
343 &adc);
344
345 if (ret) {
346 pr_err("%s: Can't get adc device(%d)\n", __func__,
347 ret);
348 return ret;
349 }
350
351 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
352 &raw);
353 if (ret) {
354 pr_err("%s: single shot failed for %s[%d]!\n",
355 __func__, adc->name, adc_args.args[0]);
356 return ret;
357 }
358 /* Convert to uV */
359 if (!adc_raw_to_uV(adc, raw, &uV)) {
360 if (uV > max_uV)
361 max_uV = uV;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200362 if (uV < min_uV)
363 min_uV = uV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100364 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
365 adc->name, adc_args.args[0], raw, uV);
366 } else {
367 pr_err("%s: Can't get uV value for %s[%d]\n",
368 __func__, adc->name, adc_args.args[0]);
369 }
370 }
371
372 /*
373 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
374 * board is plugged on an USB-C 3A power supply and boot process can
375 * continue.
376 */
377 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotardcded32f2019-04-30 18:09:38 +0200378 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
379 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100380 return 0;
381
Patrice Chotardcded32f2019-04-30 18:09:38 +0200382 pr_err("****************************************************\n");
383
384 /*
385 * If highest and lowest value are either both below
386 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
387 * means USB TYPE-C is in unattached mode, this is an issue, make
388 * u-boot,error-led blinking and stop boot process.
389 */
390 if ((max_uV > USB_LOW_THRESHOLD_UV &&
391 min_uV > USB_LOW_THRESHOLD_UV) ||
392 (max_uV <= USB_LOW_THRESHOLD_UV &&
393 min_uV <= USB_LOW_THRESHOLD_UV)) {
394 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
395 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
396 /* with 125ms interval, led will blink for 17.02 years ....*/
397 nb_blink = U32_MAX;
398 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100399
Patrice Chotardcded32f2019-04-30 18:09:38 +0200400 if (max_uV > USB_LOW_THRESHOLD_UV &&
401 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
402 min_uV <= USB_LOW_THRESHOLD_UV) {
403 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100404 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200405 }
406
407 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
408 max_uV <= USB_START_LOW_THRESHOLD_UV &&
409 min_uV <= USB_LOW_THRESHOLD_UV) {
410 pr_err("* WARNING 1.5mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100411 nb_blink = 3;
412 }
413
Patrice Chotardcded32f2019-04-30 18:09:38 +0200414 /*
415 * If highest value is above 2.15 Volts that means that the USB TypeC
416 * supplies more than 3 Amp, this is not compliant with TypeC specification
417 */
418 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
419 pr_err("* USB TYPE-C charger not compliant with *\n");
420 pr_err("* specification *\n");
421 pr_err("****************************************************\n\n");
422 /* with 125ms interval, led will blink for 17.02 years ....*/
423 nb_blink = U32_MAX;
424 } else {
425 pr_err("* Current too low, use a 3A power supply! *\n");
426 pr_err("****************************************************\n\n");
427 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100428
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200429 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100430
431 return 0;
432}
433
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100434static void sysconf_init(void)
435{
436#ifndef CONFIG_STM32MP1_TRUSTED
437 u8 *syscfg;
438#ifdef CONFIG_DM_REGULATOR
439 struct udevice *pwr_dev;
440 struct udevice *pwr_reg;
441 struct udevice *dev;
442 int ret;
443 u32 otp = 0;
444#endif
445 u32 bootr;
446
447 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
448
449 /* interconnect update : select master using the port 1 */
450 /* LTDC = AXI_M9 */
451 /* GPU = AXI_M8 */
452 /* today information is hardcoded in U-Boot */
453 writel(BIT(9), syscfg + SYSCFG_ICNR);
454
455 /* disable Pull-Down for boot pin connected to VDD */
456 bootr = readl(syscfg + SYSCFG_BOOTR);
457 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
458 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
459 writel(bootr, syscfg + SYSCFG_BOOTR);
460
461#ifdef CONFIG_DM_REGULATOR
462 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
463 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
464 * The customer will have to disable this for low frequencies
465 * or if AFMUX is selected but the function not used, typically for
466 * TRACE. Otherwise, impact on power consumption.
467 *
468 * WARNING:
469 * enabling High Speed mode while VDD>2.7V
470 * with the OTP product_below_2v5 (OTP 18, BIT 13)
471 * erroneously set to 1 can damage the IC!
472 * => U-Boot set the register only if VDD < 2.7V (in DT)
473 * but this value need to be consistent with board design
474 */
475 ret = syscon_get_by_driver_data(STM32MP_SYSCON_PWR, &pwr_dev);
476 if (!ret) {
477 ret = uclass_get_device_by_driver(UCLASS_MISC,
478 DM_GET_DRIVER(stm32mp_bsec),
479 &dev);
480 if (ret) {
481 pr_err("Can't find stm32mp_bsec driver\n");
482 return;
483 }
484
485 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
486 if (!ret)
487 otp = otp & BIT(13);
488
489 /* get VDD = pwr-supply */
490 ret = device_get_supply_regulator(pwr_dev, "pwr-supply",
491 &pwr_reg);
492
493 /* check if VDD is Low Voltage */
494 if (!ret) {
495 if (regulator_get_value(pwr_reg) < 2700000) {
496 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
497 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
498 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
499 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
500 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
501 syscfg + SYSCFG_IOCTRLSETR);
502
503 if (!otp)
504 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
505 } else {
506 if (otp)
507 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
508 }
509 } else {
510 debug("VDD unknown");
511 }
512 }
513#endif
514
515 /* activate automatic I/O compensation
516 * warning: need to ensure CSI enabled and ready in clock driver
517 */
518 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
519
520 while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
521 ;
522 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
523#endif
524}
525
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200526#ifdef CONFIG_DM_REGULATOR
527/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
528static int dk2_i2c1_fix(void)
529{
530 ofnode node;
531 struct gpio_desc hdmi, audio;
532 int ret = 0;
533
534 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
535 if (!ofnode_valid(node)) {
536 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
537 return -ENOENT;
538 }
539
540 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
541 &hdmi, GPIOD_IS_OUT)) {
542 pr_debug("%s: could not find reset-gpios\n",
543 __func__);
544 return -ENOENT;
545 }
546
547 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
548 if (!ofnode_valid(node)) {
549 pr_debug("%s: no cs42l51@4a ?\n", __func__);
550 return -ENOENT;
551 }
552
553 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
554 &audio, GPIOD_IS_OUT)) {
555 pr_debug("%s: could not find reset-gpios\n",
556 __func__);
557 return -ENOENT;
558 }
559
560 /* before power up, insure that HDMI and AUDIO IC is under reset */
561 ret = dm_gpio_set_value(&hdmi, 1);
562 if (ret) {
563 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
564 goto error;
565 }
566 ret = dm_gpio_set_value(&audio, 1);
567 if (ret) {
568 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
569 goto error;
570 }
571
572 /* power-up audio IC */
573 regulator_autoset_by_name("v1v8_audio", NULL);
574
575 /* power-up HDMI IC */
576 regulator_autoset_by_name("v1v2_hdmi", NULL);
577 regulator_autoset_by_name("v3v3_hdmi", NULL);
578
579error:
580 return ret;
581}
582
583static bool board_is_dk2(void)
584{
585 if (CONFIG_IS_ENABLED(TARGET_STM32MP157C_DK2) &&
586 of_machine_is_compatible("st,stm32mp157c-dk2"))
587 return true;
588
589 return false;
590}
591#endif
592
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100593/* board dependent setup after realloc */
594int board_init(void)
595{
Patrice Chotard972723a2019-03-11 11:13:17 +0100596 struct udevice *dev;
597
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100598 /* address of boot parameters */
599 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
600
Patrice Chotard972723a2019-03-11 11:13:17 +0100601 /* probe all PINCTRL for hog */
602 for (uclass_first_device(UCLASS_PINCTRL, &dev);
603 dev;
604 uclass_next_device(&dev)) {
605 pr_debug("probe pincontrol = %s\n", dev->name);
606 }
607
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100608 board_key_check();
609
Patrick Delaunay6519e442019-07-05 17:20:09 +0200610#ifdef CONFIG_DM_REGULATOR
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200611 if (board_is_dk2())
612 dk2_i2c1_fix();
613
Patrick Delaunay6519e442019-07-05 17:20:09 +0200614 regulators_enable_boot_on(_DEBUG);
615#endif
616
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100617 sysconf_init();
618
Patrick Delaunay7a3e4422019-07-30 19:16:40 +0200619 if (CONFIG_IS_ENABLED(CONFIG_LED))
Patrick Delaunay36e3d112018-07-27 16:37:08 +0200620 led_default_state();
621
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100622 return 0;
623}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100624
625int board_late_init(void)
626{
627#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
628 const void *fdt_compat;
629 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200630 int ret;
631 u32 otp;
632 struct udevice *dev;
633 char buf[10];
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100634
635 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
636 &fdt_compat_len);
637 if (fdt_compat && fdt_compat_len) {
638 if (strncmp(fdt_compat, "st,", 3) != 0)
639 env_set("board_name", fdt_compat);
640 else
641 env_set("board_name", fdt_compat + 3);
642 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200643 ret = uclass_get_device_by_driver(UCLASS_MISC,
644 DM_GET_DRIVER(stm32mp_bsec),
645 &dev);
646
647 if (!ret)
648 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
649 &otp, sizeof(otp));
650 if (!ret && otp) {
651 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
652 env_set("board_id", buf);
653
654 snprintf(buf, sizeof(buf), "0x%04x",
655 ((otp >> 8) & 0xF) - 1 + 0xA);
656 env_set("board_rev", buf);
657 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100658#endif
659
Patrice Chotard879cde52019-02-12 16:50:40 +0100660 /* for DK1/DK2 boards */
661 board_check_usb_power();
662
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100663 return 0;
664}
Patrice Chotard879cde52019-02-12 16:50:40 +0100665
666void board_quiesce_devices(void)
667{
Patrick Delaunay7a3e4422019-07-30 19:16:40 +0200668#ifdef CONFIG_LED
Patrice Chotard879cde52019-02-12 16:50:40 +0100669 setup_led(LEDST_OFF);
Patrick Delaunay7a3e4422019-07-30 19:16:40 +0200670#endif
Patrice Chotard879cde52019-02-12 16:50:40 +0100671}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200672
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200673/* board interface eth init */
674/* this is a weak define that we are overriding */
675int board_interface_eth_init(phy_interface_t interface_type,
676 bool eth_clk_sel_reg, bool eth_ref_clk_sel_reg)
677{
678 u8 *syscfg;
679 u32 value;
680
681 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
682
683 if (!syscfg)
684 return -ENODEV;
685
686 switch (interface_type) {
687 case PHY_INTERFACE_MODE_MII:
688 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
689 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
690 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
691 break;
692 case PHY_INTERFACE_MODE_GMII:
693 if (eth_clk_sel_reg)
694 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
695 SYSCFG_PMCSETR_ETH_CLK_SEL;
696 else
697 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
698 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
699 break;
700 case PHY_INTERFACE_MODE_RMII:
701 if (eth_ref_clk_sel_reg)
702 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
703 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
704 else
705 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
706 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
707 break;
708 case PHY_INTERFACE_MODE_RGMII:
709 case PHY_INTERFACE_MODE_RGMII_ID:
710 case PHY_INTERFACE_MODE_RGMII_RXID:
711 case PHY_INTERFACE_MODE_RGMII_TXID:
712 if (eth_clk_sel_reg)
713 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
714 SYSCFG_PMCSETR_ETH_CLK_SEL;
715 else
716 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
717 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
718 break;
719 default:
720 debug("%s: Do not manage %d interface\n",
721 __func__, interface_type);
722 /* Do not manage others interfaces */
723 return -EINVAL;
724 }
725
726 /* clear and set ETH configuration bits */
727 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
728 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
729 syscfg + SYSCFG_PMCCLRR);
730 writel(value, syscfg + SYSCFG_PMCSETR);
731
732 return 0;
733}
734
Patrice Chotard34320372019-05-02 18:28:05 +0200735enum env_location env_get_location(enum env_operation op, int prio)
736{
737 u32 bootmode = get_bootmode();
738
739 if (prio)
740 return ENVL_UNKNOWN;
741
742 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
743#ifdef CONFIG_ENV_IS_IN_EXT4
744 case BOOT_FLASH_SD:
745 case BOOT_FLASH_EMMC:
746 return ENVL_EXT4;
747#endif
748#ifdef CONFIG_ENV_IS_IN_UBI
749 case BOOT_FLASH_NAND:
750 return ENVL_UBI;
751#endif
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200752#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
753 case BOOT_FLASH_NOR:
754 return ENVL_SPI_FLASH;
755#endif
Patrice Chotard34320372019-05-02 18:28:05 +0200756 default:
757 return ENVL_NOWHERE;
758 }
759}
760
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200761#if defined(CONFIG_ENV_IS_IN_EXT4)
762const char *env_ext4_get_intf(void)
763{
764 u32 bootmode = get_bootmode();
765
766 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
767 case BOOT_FLASH_SD:
768 case BOOT_FLASH_EMMC:
769 return "mmc";
770 default:
771 return "";
772 }
773}
774
775const char *env_ext4_get_dev_part(void)
776{
777 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
778 u32 bootmode = get_bootmode();
779
780 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
781}
782#endif
783
Patrice Chotard41443cf2019-05-02 18:07:14 +0200784#ifdef CONFIG_SYS_MTDPARTS_RUNTIME
785
786#define MTDPARTS_LEN 256
787#define MTDIDS_LEN 128
788
789/**
790 * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
791 * If we need to access it before the env is relocated, then we need
792 * to use our own stack buffer. gd->env_buf will be too small.
793 *
794 * @param buf temporary buffer pointer MTDPARTS_LEN long
795 * @return mtdparts variable string, NULL if not found
796 */
797static const char *env_get_mtdparts(const char *str, char *buf)
798{
799 if (gd->flags & GD_FLG_ENV_READY)
800 return env_get(str);
801 if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
802 return buf;
803
804 return NULL;
805}
806
807/**
808 * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
809 */
810static void board_get_mtdparts(const char *dev,
811 char *mtdids,
812 char *mtdparts)
813{
814 char env_name[32] = "mtdparts_";
815 char tmp_mtdparts[MTDPARTS_LEN];
816 const char *tmp;
817
818 /* name of env variable to read = mtdparts_<dev> */
819 strcat(env_name, dev);
820 tmp = env_get_mtdparts(env_name, tmp_mtdparts);
821 if (tmp) {
822 /* mtdids: "<dev>=<dev>, ...." */
823 if (mtdids[0] != '\0')
824 strcat(mtdids, ",");
825 strcat(mtdids, dev);
826 strcat(mtdids, "=");
827 strcat(mtdids, dev);
828
829 /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
830 if (mtdparts[0] != '\0')
831 strncat(mtdparts, ";", MTDPARTS_LEN);
832 else
833 strcat(mtdparts, "mtdparts=");
834 strncat(mtdparts, dev, MTDPARTS_LEN);
835 strncat(mtdparts, ":", MTDPARTS_LEN);
836 strncat(mtdparts, tmp, MTDPARTS_LEN);
837 }
838}
839
840void board_mtdparts_default(const char **mtdids, const char **mtdparts)
841{
842 struct udevice *dev;
843 static char parts[2 * MTDPARTS_LEN + 1];
844 static char ids[MTDIDS_LEN + 1];
845 static bool mtd_initialized;
846
847 if (mtd_initialized) {
848 *mtdids = ids;
849 *mtdparts = parts;
850 return;
851 }
852
853 memset(parts, 0, sizeof(parts));
854 memset(ids, 0, sizeof(ids));
855
856 if (!uclass_get_device(UCLASS_MTD, 0, &dev))
857 board_get_mtdparts("nand0", ids, parts);
858
859 if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
860 board_get_mtdparts("nor0", ids, parts);
861
862 mtd_initialized = true;
863 *mtdids = ids;
864 *mtdparts = parts;
865 debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
866}
867#endif
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200868
869#if defined(CONFIG_OF_BOARD_SETUP)
870int ft_board_setup(void *blob, bd_t *bd)
871{
872#ifdef CONFIG_FDT_FIXUP_PARTITIONS
873 struct node_info nodes[] = {
874 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
875 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
876 };
877 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
878#endif
879
880 return 0;
881}
882#endif