blob: 84592677e4af563bc3a3bc58e48a10350891c33d [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrick Delaunayf7b2a842020-11-06 19:01:59 +01005
6#define LOG_CATEGORY LOGC_BOARD
7
Patrice Chotard879cde52019-02-12 16:50:40 +01008#include <common.h>
9#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +020010#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020011#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +020012#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020013#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060014#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060015#include <env_internal.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060016#include <fdt_support.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010017#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020018#include <generic-phy.h>
Simon Glassf11478f2019-12-28 10:45:07 -070019#include <hang.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010020#include <i2c.h>
Simon Glassa7b51302019-11-14 12:57:46 -070021#include <init.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010022#include <led.h>
Simon Glass0f2af882020-05-10 11:40:05 -060023#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070024#include <malloc.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010025#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020026#include <mtd_node.h>
Simon Glass274e0b02020-05-10 11:39:56 -060027#include <net.h>
Patrick Delaunaybff66f92019-08-01 11:29:03 +020028#include <netdev.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020029#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020030#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020031#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010032#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010033#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020034#include <watchdog.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060035#include <asm/global_data.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020036#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010037#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010038#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020039#include <asm/arch/sys_proto.h>
Simon Glass0034d962021-08-07 07:24:01 -060040#include <dm/ofnode.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020041#include <jffs2/load_kernel.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060042#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060043#include <linux/delay.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070044#include <linux/err.h>
Patrick Delaunay181298e2020-04-22 14:29:16 +020045#include <linux/iopoll.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020046#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010047#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010048
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +020049#include "../../st/common/stusb160x.h"
50
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010051/* SYSCFG registers */
52#define SYSCFG_BOOTR 0x00
53#define SYSCFG_PMCSETR 0x04
54#define SYSCFG_IOCTRLSETR 0x18
55#define SYSCFG_ICNR 0x1C
56#define SYSCFG_CMPCR 0x20
57#define SYSCFG_CMPENSETR 0x24
58#define SYSCFG_PMCCLRR 0x44
59
60#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
61#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
62
63#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
64#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
65#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
66#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
67#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
68
69#define SYSCFG_CMPCR_SW_CTRL BIT(1)
70#define SYSCFG_CMPCR_READY BIT(8)
71
72#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
73
74#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
75#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
76
77#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
78
79#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020080#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
81#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
82#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010083
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010084/*
85 * Get a global data pointer
86 */
87DECLARE_GLOBAL_DATA_PTR;
88
Patrice Chotardcded32f2019-04-30 18:09:38 +020089#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010090#define USB_WARNING_LOW_THRESHOLD_UV 660000
91#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020092#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010093
Patrick Delaunayf2f25c32020-05-25 12:19:46 +020094int board_early_init_f(void)
95{
96 /* nothing to do, only used in SPL */
97 return 0;
98}
99
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100100int checkboard(void)
101{
102 int ret;
103 char *mode;
104 u32 otp;
105 struct udevice *dev;
106 const char *fdt_compat;
107 int fdt_compat_len;
108
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200109 if (IS_ENABLED(CONFIG_TFABOOT)) {
110 if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE))
111 mode = "trusted - stm32image";
112 else
113 mode = "trusted";
114 } else {
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100115 mode = "basic";
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200116 }
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100117
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100118 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
119 &fdt_compat_len);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100120
121 log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
122 fdt_compat && fdt_compat_len ? fdt_compat : "");
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100123
Patrick Delaunay52163d92020-03-24 09:05:00 +0100124 /* display the STMicroelectronics board identification */
Patrick Delaunay0885c232020-02-12 19:37:42 +0100125 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
126 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700127 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay0885c232020-02-12 19:37:42 +0100128 &dev);
129 if (!ret)
130 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
131 &otp, sizeof(otp));
132 if (ret > 0 && otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100133 log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
134 otp >> 16,
135 (otp >> 12) & 0xF,
136 (otp >> 4) & 0xF,
137 ((otp >> 8) & 0xF) - 1 + 'A',
138 otp & 0xF);
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100139 }
140
141 return 0;
142}
143
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100144static void board_key_check(void)
145{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100146 ofnode node;
147 struct gpio_desc gpio;
148 enum forced_boot_mode boot_mode = BOOT_NORMAL;
149
Patrick Delaunayf6604852020-07-31 16:31:42 +0200150 if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
151 return;
152
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100153 node = ofnode_path("/config");
154 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100155 log_debug("no /config node?\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100156 return;
157 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200158 if (IS_ENABLED(CONFIG_FASTBOOT)) {
159 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
160 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100161 log_debug("could not find a /config/st,fastboot-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200162 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200163 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200164 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100165 log_notice("Fastboot key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200166 boot_mode = BOOT_FASTBOOT;
167 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100168
Patrick Delaunayf6604852020-07-31 16:31:42 +0200169 dm_gpio_free(NULL, &gpio);
170 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100171 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200172 if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
173 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
174 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100175 log_debug("could not find a /config/st,stm32prog-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200176 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200177 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200178 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100179 log_notice("STM32Programmer key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200180 boot_mode = BOOT_STM32PROG;
181 }
182 dm_gpio_free(NULL, &gpio);
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100183 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100184 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100185 if (boot_mode != BOOT_NORMAL) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100186 log_notice("entering download mode...\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100187 clrsetbits_le32(TAMP_BOOT_CONTEXT,
188 TAMP_BOOT_FORCED_MASK,
189 boot_mode);
190 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100191}
192
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100193int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200194{
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100195 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200196 int ret;
197
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200198 if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
199 return -ENODEV;
200
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +0200201 /* if typec stusb160x is present, means DK1 or DK2 board */
202 ret = stusb160x_cable_connected();
203 if (ret >= 0)
204 return ret;
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100205
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100206 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700207 DM_DRIVER_GET(dwc2_udc_otg),
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100208 &dwc2_udc_otg);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100209 if (ret) {
210 log_debug("dwc2_udc_otg init failed\n");
211 return ret;
212 }
Patrice Chotard204079b2018-08-10 17:12:14 +0200213
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100214 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100215}
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200216
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200217#ifdef CONFIG_USB_GADGET_DOWNLOAD
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200218#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
219#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
220
221int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
222{
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200223 if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
224 !strcmp(name, "usb_dnl_dfu"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200225 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200226 else if (IS_ENABLED(CONFIG_FASTBOOT) &&
227 !strcmp(name, "usb_dnl_fastboot"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200228 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
229 &dev->idProduct);
230 else
231 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
232
233 return 0;
234}
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200235#endif /* CONFIG_USB_GADGET_DOWNLOAD */
Patrice Chotard879cde52019-02-12 16:50:40 +0100236
237static int get_led(struct udevice **dev, char *led_string)
238{
Simon Glass0034d962021-08-07 07:24:01 -0600239 const char *led_name;
Patrice Chotard879cde52019-02-12 16:50:40 +0100240 int ret;
241
Simon Glass0034d962021-08-07 07:24:01 -0600242 led_name = ofnode_conf_read_str(led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100243 if (!led_name) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100244 log_debug("could not find %s config string\n", led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100245 return -ENOENT;
246 }
247 ret = led_get_by_label(led_name, dev);
248 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100249 log_debug("get=%d\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100250 return ret;
251 }
252
253 return 0;
254}
255
256static int setup_led(enum led_state_t cmd)
257{
258 struct udevice *dev;
259 int ret;
260
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200261 if (!CONFIG_IS_ENABLED(LED))
262 return 0;
263
Patrice Chotard879cde52019-02-12 16:50:40 +0100264 ret = get_led(&dev, "u-boot,boot-led");
265 if (ret)
266 return ret;
267
268 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200269 return ret;
270}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200271
272static void __maybe_unused led_error_blink(u32 nb_blink)
273{
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200274 int ret;
275 struct udevice *led;
276 u32 i;
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200277
278 if (!nb_blink)
279 return;
280
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200281 if (CONFIG_IS_ENABLED(LED)) {
282 ret = get_led(&led, "u-boot,error-led");
283 if (!ret) {
284 /* make u-boot,error-led blinking */
285 /* if U32_MAX and 125ms interval, for 17.02 years */
286 for (i = 0; i < 2 * nb_blink; i++) {
287 led_set_state(led, LEDST_TOGGLE);
288 mdelay(125);
289 WATCHDOG_RESET();
290 }
291 led_set_state(led, LEDST_ON);
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200292 }
293 }
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200294
295 /* infinite: the boot process must be stopped */
296 if (nb_blink == U32_MAX)
297 hang();
298}
Patrice Chotard204079b2018-08-10 17:12:14 +0200299
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200300static int adc_measurement(ofnode node, int adc_count, int *min_uV, int *max_uV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100301{
302 struct ofnode_phandle_args adc_args;
303 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100304 unsigned int raw;
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200305 int ret, uV;
306 int i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100307
308 for (i = 0; i < adc_count; i++) {
309 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
310 "#io-channel-cells", 0, i,
311 &adc_args)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100312 log_debug("can't find /config/st,adc_usb_pd\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100313 return 0;
314 }
315
316 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
317 &adc);
318
319 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100320 log_err("Can't get adc device(%d)\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100321 return ret;
322 }
323
324 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
325 &raw);
326 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100327 log_err("single shot failed for %s[%d]!\n",
328 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100329 return ret;
330 }
331 /* Convert to uV */
332 if (!adc_raw_to_uV(adc, raw, &uV)) {
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200333 if (uV > *max_uV)
334 *max_uV = uV;
335 if (uV < *min_uV)
336 *min_uV = uV;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100337 log_debug("%s[%02d] = %u, %d uV\n",
338 adc->name, adc_args.args[0], raw, uV);
Patrice Chotard879cde52019-02-12 16:50:40 +0100339 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100340 log_err("Can't get uV value for %s[%d]\n",
341 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100342 }
343 }
344
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200345 return 0;
346}
347
348static int board_check_usb_power(void)
349{
350 ofnode node;
351 int max_uV = 0;
352 int min_uV = USB_START_HIGH_THRESHOLD_UV;
353 int adc_count, ret;
354 u32 nb_blink;
355 u8 i;
356
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200357 if (!IS_ENABLED(CONFIG_ADC))
358 return -ENODEV;
359
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200360 node = ofnode_path("/config");
361 if (!ofnode_valid(node)) {
362 log_debug("no /config node?\n");
363 return -ENOENT;
364 }
365
Patrice Chotard879cde52019-02-12 16:50:40 +0100366 /*
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200367 * Retrieve the ADC channels devices and get measurement
368 * for each of them
Patrice Chotard879cde52019-02-12 16:50:40 +0100369 */
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200370 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
371 "#io-channel-cells", 0);
372 if (adc_count < 0) {
373 if (adc_count == -ENOENT)
374 return 0;
Patrice Chotard879cde52019-02-12 16:50:40 +0100375
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200376 log_err("Can't find adc channel (%d)\n", adc_count);
377
378 return adc_count;
379 }
Patrice Chotardcded32f2019-04-30 18:09:38 +0200380
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200381 /* perform maximum of 2 ADC measurements to detect power supply current */
382 for (i = 0; i < 2; i++) {
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200383 ret = adc_measurement(node, adc_count, &min_uV, &max_uV);
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200384 if (ret)
385 return ret;
386
387 /*
388 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
389 * board is plugged on an USB-C 3A power supply and boot process can
390 * continue.
391 */
392 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
393 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
394 min_uV <= USB_LOW_THRESHOLD_UV)
395 return 0;
396
397 if (i == 0) {
398 log_err("Previous ADC measurements was not the one expected, retry in 20ms\n");
399 mdelay(20); /* equal to max tPDDebounce duration (min 10ms - max 20ms) */
400 }
401 }
402
403 log_notice("****************************************************\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200404 /*
405 * If highest and lowest value are either both below
406 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
407 * means USB TYPE-C is in unattached mode, this is an issue, make
408 * u-boot,error-led blinking and stop boot process.
409 */
410 if ((max_uV > USB_LOW_THRESHOLD_UV &&
411 min_uV > USB_LOW_THRESHOLD_UV) ||
412 (max_uV <= USB_LOW_THRESHOLD_UV &&
413 min_uV <= USB_LOW_THRESHOLD_UV)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100414 log_notice("* ERROR USB TYPE-C connection in unattached mode *\n");
415 log_notice("* Check that USB TYPE-C cable is correctly plugged *\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200416 /* with 125ms interval, led will blink for 17.02 years ....*/
417 nb_blink = U32_MAX;
418 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100419
Patrice Chotardcded32f2019-04-30 18:09:38 +0200420 if (max_uV > USB_LOW_THRESHOLD_UV &&
421 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
422 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100423 log_notice("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100424 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200425 }
426
427 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
428 max_uV <= USB_START_LOW_THRESHOLD_UV &&
429 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100430 log_notice("* WARNING 1.5A power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100431 nb_blink = 3;
432 }
433
Patrice Chotardcded32f2019-04-30 18:09:38 +0200434 /*
435 * If highest value is above 2.15 Volts that means that the USB TypeC
436 * supplies more than 3 Amp, this is not compliant with TypeC specification
437 */
438 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100439 log_notice("* USB TYPE-C charger not compliant with *\n");
440 log_notice("* specification *\n");
441 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200442 /* with 125ms interval, led will blink for 17.02 years ....*/
443 nb_blink = U32_MAX;
444 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100445 log_notice("* Current too low, use a 3A power supply! *\n");
446 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200447 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100448
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200449 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100450
451 return 0;
452}
453
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100454static void sysconf_init(void)
455{
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100456 u8 *syscfg;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100457 struct udevice *pwr_dev;
458 struct udevice *pwr_reg;
459 struct udevice *dev;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100460 u32 otp = 0;
Patrick Delaunay181298e2020-04-22 14:29:16 +0200461 int ret;
462 u32 bootr, val;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100463
464 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
465
466 /* interconnect update : select master using the port 1 */
467 /* LTDC = AXI_M9 */
468 /* GPU = AXI_M8 */
469 /* today information is hardcoded in U-Boot */
470 writel(BIT(9), syscfg + SYSCFG_ICNR);
471
472 /* disable Pull-Down for boot pin connected to VDD */
473 bootr = readl(syscfg + SYSCFG_BOOTR);
474 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
475 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
476 writel(bootr, syscfg + SYSCFG_BOOTR);
477
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100478 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
479 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
480 * The customer will have to disable this for low frequencies
481 * or if AFMUX is selected but the function not used, typically for
482 * TRACE. Otherwise, impact on power consumption.
483 *
484 * WARNING:
485 * enabling High Speed mode while VDD>2.7V
486 * with the OTP product_below_2v5 (OTP 18, BIT 13)
487 * erroneously set to 1 can damage the IC!
488 * => U-Boot set the register only if VDD < 2.7V (in DT)
489 * but this value need to be consistent with board design
490 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200491 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700492 DM_DRIVER_GET(stm32mp_pwr_pmic),
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200493 &pwr_dev);
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200494 if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100495 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700496 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100497 &dev);
498 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100499 log_err("Can't find stm32mp_bsec driver\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100500 return;
501 }
502
503 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200504 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100505 otp = otp & BIT(13);
506
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200507 /* get VDD = vdd-supply */
508 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100509 &pwr_reg);
510
511 /* check if VDD is Low Voltage */
512 if (!ret) {
513 if (regulator_get_value(pwr_reg) < 2700000) {
514 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
515 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
516 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
517 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
518 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
519 syscfg + SYSCFG_IOCTRLSETR);
520
521 if (!otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100522 log_err("product_below_2v5=0: HSLVEN protected by HW\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100523 } else {
524 if (otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100525 log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100526 }
527 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100528 log_debug("VDD unknown");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100529 }
530 }
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100531
532 /* activate automatic I/O compensation
533 * warning: need to ensure CSI enabled and ready in clock driver
534 */
535 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
536
Patrick Delaunay181298e2020-04-22 14:29:16 +0200537 /* poll until ready (1s timeout) */
538 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
539 val & SYSCFG_CMPCR_READY,
540 1000000);
541 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100542 log_err("SYSCFG: I/O compensation failed, timeout.\n");
Patrick Delaunay181298e2020-04-22 14:29:16 +0200543 led_error_blink(10);
544 }
545
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100546 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100547}
548
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200549/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
550static int dk2_i2c1_fix(void)
551{
552 ofnode node;
553 struct gpio_desc hdmi, audio;
554 int ret = 0;
555
Patrick Delaunayc75bc6a2020-07-31 16:31:47 +0200556 if (!IS_ENABLED(CONFIG_DM_REGULATOR))
557 return -ENODEV;
558
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200559 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
560 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100561 log_debug("no hdmi-transmitter@39 ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200562 return -ENOENT;
563 }
564
565 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
566 &hdmi, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100567 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200568 return -ENOENT;
569 }
570
571 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
572 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100573 log_debug("no cs42l51@4a ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200574 return -ENOENT;
575 }
576
577 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
578 &audio, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100579 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200580 return -ENOENT;
581 }
582
583 /* before power up, insure that HDMI and AUDIO IC is under reset */
584 ret = dm_gpio_set_value(&hdmi, 1);
585 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100586 log_err("can't set_value for hdmi_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200587 goto error;
588 }
589 ret = dm_gpio_set_value(&audio, 1);
590 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100591 log_err("can't set_value for audio_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200592 goto error;
593 }
594
595 /* power-up audio IC */
596 regulator_autoset_by_name("v1v8_audio", NULL);
597
598 /* power-up HDMI IC */
599 regulator_autoset_by_name("v1v2_hdmi", NULL);
600 regulator_autoset_by_name("v3v3_hdmi", NULL);
601
602error:
603 return ret;
604}
605
606static bool board_is_dk2(void)
607{
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100608 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200609 of_machine_is_compatible("st,stm32mp157c-dk2"))
610 return true;
611
612 return false;
613}
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200614
Patrick Delaunay486ae962020-04-22 14:29:13 +0200615static bool board_is_ev1(void)
616{
617 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
618 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
619 of_machine_is_compatible("st,stm32mp157c-ev1") ||
620 of_machine_is_compatible("st,stm32mp157d-ev1") ||
621 of_machine_is_compatible("st,stm32mp157f-ev1")))
622 return true;
623
624 return false;
625}
626
627/* touchscreen driver: only used for pincontrol configuration */
628static const struct udevice_id goodix_ids[] = {
629 { .compatible = "goodix,gt9147", },
630 { }
631};
632
633U_BOOT_DRIVER(goodix) = {
634 .name = "goodix",
635 .id = UCLASS_NOP,
636 .of_match = goodix_ids,
637};
638
639static void board_ev1_init(void)
640{
641 struct udevice *dev;
642
643 /* configure IRQ line on EV1 for touchscreen before LCD reset */
Simon Glass65130cd2020-12-28 20:34:56 -0700644 uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev);
Patrick Delaunay486ae962020-04-22 14:29:13 +0200645}
646
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100647/* board dependent setup after realloc */
648int board_init(void)
649{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100650 board_key_check();
651
Patrick Delaunay486ae962020-04-22 14:29:13 +0200652 if (board_is_ev1())
653 board_ev1_init();
654
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200655 if (board_is_dk2())
656 dk2_i2c1_fix();
657
Patrick Delaunayc75bc6a2020-07-31 16:31:47 +0200658 if (IS_ENABLED(CONFIG_DM_REGULATOR))
659 regulators_enable_boot_on(_DEBUG);
Patrick Delaunay6519e442019-07-05 17:20:09 +0200660
Patrick Delaunay72a57622021-10-11 09:52:50 +0200661 /*
662 * sysconf initialisation done only when U-Boot is running in secure
663 * done in TF-A for TFABOOT.
664 */
665 if (IS_ENABLED(CONFIG_ARMV7_NONSEC))
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200666 sysconf_init();
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100667
Patrick Delaunay78f68f22020-04-10 19:14:01 +0200668 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay36e3d112018-07-27 16:37:08 +0200669 led_default_state();
670
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200671 setup_led(LEDST_ON);
672
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100673 return 0;
674}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100675
676int board_late_init(void)
677{
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100678 const void *fdt_compat;
679 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200680 int ret;
681 u32 otp;
682 struct udevice *dev;
683 char buf[10];
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200684 char dtb_name[256];
685 int buf_len;
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100686
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200687 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
688 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
689 &fdt_compat_len);
690 if (fdt_compat && fdt_compat_len) {
691 if (strncmp(fdt_compat, "st,", 3) != 0) {
692 env_set("board_name", fdt_compat);
693 } else {
694 env_set("board_name", fdt_compat + 3);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200695
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200696 buf_len = sizeof(dtb_name);
697 strncpy(dtb_name, fdt_compat + 3, buf_len);
698 buf_len -= strlen(fdt_compat + 3);
699 strncat(dtb_name, ".dtb", buf_len);
700 env_set("fdtfile", dtb_name);
701 }
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200702 }
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200703 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700704 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200705 &dev);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200706
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200707 if (!ret)
708 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
709 &otp, sizeof(otp));
710 if (ret > 0 && otp) {
711 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
712 env_set("board_id", buf);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200713
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200714 snprintf(buf, sizeof(buf), "0x%04x",
715 ((otp >> 8) & 0xF) - 1 + 0xA);
716 env_set("board_rev", buf);
717 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200718 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100719
Patrice Chotard879cde52019-02-12 16:50:40 +0100720 /* for DK1/DK2 boards */
721 board_check_usb_power();
722
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100723 return 0;
724}
Patrice Chotard879cde52019-02-12 16:50:40 +0100725
726void board_quiesce_devices(void)
727{
728 setup_led(LEDST_OFF);
729}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200730
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200731/* eth init function : weak called in eqos driver */
732int board_interface_eth_init(struct udevice *dev,
733 phy_interface_t interface_type)
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200734{
735 u8 *syscfg;
736 u32 value;
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200737 bool eth_clk_sel_reg = false;
738 bool eth_ref_clk_sel_reg = false;
739
740 /* Gigabit Ethernet 125MHz clock selection. */
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200741 eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200742
743 /* Ethernet 50Mhz RMII clock selection */
744 eth_ref_clk_sel_reg =
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200745 dev_read_bool(dev, "st,eth-ref-clk-sel");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200746
747 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
748
749 if (!syscfg)
750 return -ENODEV;
751
752 switch (interface_type) {
753 case PHY_INTERFACE_MODE_MII:
754 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
755 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100756 log_debug("PHY_INTERFACE_MODE_MII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200757 break;
758 case PHY_INTERFACE_MODE_GMII:
759 if (eth_clk_sel_reg)
760 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
761 SYSCFG_PMCSETR_ETH_CLK_SEL;
762 else
763 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100764 log_debug("PHY_INTERFACE_MODE_GMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200765 break;
766 case PHY_INTERFACE_MODE_RMII:
767 if (eth_ref_clk_sel_reg)
768 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
769 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
770 else
771 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100772 log_debug("PHY_INTERFACE_MODE_RMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200773 break;
774 case PHY_INTERFACE_MODE_RGMII:
775 case PHY_INTERFACE_MODE_RGMII_ID:
776 case PHY_INTERFACE_MODE_RGMII_RXID:
777 case PHY_INTERFACE_MODE_RGMII_TXID:
778 if (eth_clk_sel_reg)
779 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
780 SYSCFG_PMCSETR_ETH_CLK_SEL;
781 else
782 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100783 log_debug("PHY_INTERFACE_MODE_RGMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200784 break;
785 default:
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100786 log_debug("Do not manage %d interface\n",
787 interface_type);
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200788 /* Do not manage others interfaces */
789 return -EINVAL;
790 }
791
792 /* clear and set ETH configuration bits */
793 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
794 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
795 syscfg + SYSCFG_PMCCLRR);
796 writel(value, syscfg + SYSCFG_PMCSETR);
797
798 return 0;
799}
800
Patrice Chotard34320372019-05-02 18:28:05 +0200801enum env_location env_get_location(enum env_operation op, int prio)
802{
803 u32 bootmode = get_bootmode();
804
805 if (prio)
806 return ENVL_UNKNOWN;
807
808 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
Patrick Delaunay455b0652020-06-15 11:18:22 +0200809 case BOOT_FLASH_SD:
810 case BOOT_FLASH_EMMC:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200811 if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
812 return ENVL_MMC;
813 else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
814 return ENVL_EXT4;
815 else
816 return ENVL_NOWHERE;
817
Patrice Chotard34320372019-05-02 18:28:05 +0200818 case BOOT_FLASH_NAND:
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100819 case BOOT_FLASH_SPINAND:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200820 if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
821 return ENVL_UBI;
822 else
823 return ENVL_NOWHERE;
824
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200825 case BOOT_FLASH_NOR:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200826 if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
827 return ENVL_SPI_FLASH;
828 else
829 return ENVL_NOWHERE;
830
Patrice Chotard34320372019-05-02 18:28:05 +0200831 default:
832 return ENVL_NOWHERE;
833 }
834}
835
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200836const char *env_ext4_get_intf(void)
837{
838 u32 bootmode = get_bootmode();
839
840 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
841 case BOOT_FLASH_SD:
842 case BOOT_FLASH_EMMC:
843 return "mmc";
844 default:
845 return "";
846 }
847}
848
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200849int mmc_get_boot(void)
850{
851 struct udevice *dev;
852 u32 boot_mode = get_bootmode();
853 unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
854 char cmd[20];
855 const u32 sdmmc_addr[] = {
856 STM32_SDMMC1_BASE,
857 STM32_SDMMC2_BASE,
858 STM32_SDMMC3_BASE
859 };
860
861 if (instance > ARRAY_SIZE(sdmmc_addr))
862 return 0;
863
864 /* search associated sdmmc node in devicetree */
865 snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]);
866 if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) {
867 log_err("mmc%d = %s not found in device tree!\n", instance, cmd);
868 return 0;
869 }
870
871 return dev_seq(dev);
872};
873
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200874const char *env_ext4_get_dev_part(void)
875{
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000876 static char *const env_dev_part =
877#ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
878 CONFIG_ENV_EXT4_DEVICE_AND_PART;
879#else
880 "";
881#endif
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200882 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000883
884 if (strlen(env_dev_part) > 0)
885 return env_dev_part;
886
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200887 return dev_part[mmc_get_boot()];
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200888}
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000889
Patrick Delaunay455b0652020-06-15 11:18:22 +0200890int mmc_get_env_dev(void)
891{
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100892 if (CONFIG_SYS_MMC_ENV_DEV >= 0)
893 return CONFIG_SYS_MMC_ENV_DEV;
894
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100895 /* use boot instance to select the correct mmc device identifier */
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200896 return mmc_get_boot();
Patrick Delaunay455b0652020-06-15 11:18:22 +0200897}
Patrick Delaunay455b0652020-06-15 11:18:22 +0200898
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200899#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900900int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200901{
Patrick Delaunaya8a67ed2020-07-29 13:24:52 +0200902 static const struct node_info nodes[] = {
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200903 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100904 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200905 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
Christophe Kerello15359e42020-07-31 09:53:42 +0200906 { "st,stm32mp1-fmc2-nfc", MTD_DEV_TYPE_NAND, },
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200907 };
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200908 char *boot_device;
Patrick Delaunay9d96e902020-07-31 16:31:50 +0200909
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200910 /* Check the boot-source and don't update MTD for serial or usb boot */
911 boot_device = env_get("boot_device");
912 if (!boot_device ||
913 (strcmp(boot_device, "serial") && strcmp(boot_device, "usb")))
914 if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
915 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200916
917 return 0;
918}
919#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200920
921static void board_copro_image_process(ulong fw_image, size_t fw_size)
922{
923 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
924
925 if (!rproc_is_initialized())
926 if (rproc_init()) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100927 log_err("Remote Processor %d initialization failed\n",
928 id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200929 return;
930 }
931
932 ret = rproc_load(id, fw_image, fw_size);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100933 log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
934 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200935
Fabien Dessennead6cc942019-10-30 14:38:32 +0100936 if (!ret)
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200937 rproc_start(id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200938}
939
940U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);