blob: 8c162b42a59435d179192dcdf814a19923364ce4 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrick Delaunayf7b2a842020-11-06 19:01:59 +01005
6#define LOG_CATEGORY LOGC_BOARD
7
Patrice Chotard879cde52019-02-12 16:50:40 +01008#include <common.h>
9#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +020010#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020011#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +020012#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020013#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060014#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060015#include <env_internal.h>
Patrick Delaunay028fddd2021-11-15 16:32:23 +010016#include <fdt_simplefb.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060017#include <fdt_support.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010018#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020019#include <generic-phy.h>
Simon Glassf11478f2019-12-28 10:45:07 -070020#include <hang.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010021#include <i2c.h>
Simon Glassa7b51302019-11-14 12:57:46 -070022#include <init.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010023#include <led.h>
Simon Glass0f2af882020-05-10 11:40:05 -060024#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070025#include <malloc.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010026#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020027#include <mtd_node.h>
Simon Glass274e0b02020-05-10 11:39:56 -060028#include <net.h>
Patrick Delaunaybff66f92019-08-01 11:29:03 +020029#include <netdev.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020030#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020031#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020032#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010033#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010034#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020035#include <watchdog.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060036#include <asm/global_data.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020037#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010038#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010039#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020040#include <asm/arch/sys_proto.h>
Simon Glass0034d962021-08-07 07:24:01 -060041#include <dm/ofnode.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020042#include <jffs2/load_kernel.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060043#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060044#include <linux/delay.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070045#include <linux/err.h>
Patrick Delaunay181298e2020-04-22 14:29:16 +020046#include <linux/iopoll.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020047#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010048#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010049
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +020050#include "../../st/common/stusb160x.h"
51
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010052/* SYSCFG registers */
53#define SYSCFG_BOOTR 0x00
54#define SYSCFG_PMCSETR 0x04
55#define SYSCFG_IOCTRLSETR 0x18
56#define SYSCFG_ICNR 0x1C
57#define SYSCFG_CMPCR 0x20
58#define SYSCFG_CMPENSETR 0x24
59#define SYSCFG_PMCCLRR 0x44
60
61#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
62#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
63
64#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
65#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
66#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
67#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
68#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
69
70#define SYSCFG_CMPCR_SW_CTRL BIT(1)
71#define SYSCFG_CMPCR_READY BIT(8)
72
73#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
74
75#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
76#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
77
78#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
79
80#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020081#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
82#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
83#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010084
Patrice Chotardcded32f2019-04-30 18:09:38 +020085#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010086#define USB_WARNING_LOW_THRESHOLD_UV 660000
87#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020088#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010089
Patrick Delaunayf2f25c32020-05-25 12:19:46 +020090int board_early_init_f(void)
91{
92 /* nothing to do, only used in SPL */
93 return 0;
94}
95
Patrick Delaunay92dc1022019-02-12 11:44:41 +010096int checkboard(void)
97{
98 int ret;
99 char *mode;
100 u32 otp;
101 struct udevice *dev;
102 const char *fdt_compat;
103 int fdt_compat_len;
104
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200105 if (IS_ENABLED(CONFIG_TFABOOT)) {
106 if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE))
107 mode = "trusted - stm32image";
108 else
109 mode = "trusted";
110 } else {
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100111 mode = "basic";
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200112 }
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100113
Patrick Delaunay4e506b02022-05-19 09:07:29 +0200114 fdt_compat = ofnode_get_property(ofnode_root(), "compatible",
115 &fdt_compat_len);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100116
117 log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
118 fdt_compat && fdt_compat_len ? fdt_compat : "");
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100119
Patrick Delaunay52163d92020-03-24 09:05:00 +0100120 /* display the STMicroelectronics board identification */
Patrick Delaunay0885c232020-02-12 19:37:42 +0100121 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
122 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700123 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay0885c232020-02-12 19:37:42 +0100124 &dev);
125 if (!ret)
126 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
127 &otp, sizeof(otp));
128 if (ret > 0 && otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100129 log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
130 otp >> 16,
131 (otp >> 12) & 0xF,
132 (otp >> 4) & 0xF,
133 ((otp >> 8) & 0xF) - 1 + 'A',
134 otp & 0xF);
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100135 }
136
137 return 0;
138}
139
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100140static void board_key_check(void)
141{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100142 ofnode node;
143 struct gpio_desc gpio;
144 enum forced_boot_mode boot_mode = BOOT_NORMAL;
145
Patrick Delaunayf6604852020-07-31 16:31:42 +0200146 if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
147 return;
148
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100149 node = ofnode_path("/config");
150 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100151 log_debug("no /config node?\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100152 return;
153 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200154 if (IS_ENABLED(CONFIG_FASTBOOT)) {
155 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
156 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100157 log_debug("could not find a /config/st,fastboot-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200158 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200159 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200160 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100161 log_notice("Fastboot key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200162 boot_mode = BOOT_FASTBOOT;
163 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100164
Patrick Delaunayf6604852020-07-31 16:31:42 +0200165 dm_gpio_free(NULL, &gpio);
166 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100167 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200168 if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
169 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
170 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100171 log_debug("could not find a /config/st,stm32prog-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200172 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200173 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200174 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100175 log_notice("STM32Programmer key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200176 boot_mode = BOOT_STM32PROG;
177 }
178 dm_gpio_free(NULL, &gpio);
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100179 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100180 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100181 if (boot_mode != BOOT_NORMAL) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100182 log_notice("entering download mode...\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100183 clrsetbits_le32(TAMP_BOOT_CONTEXT,
184 TAMP_BOOT_FORCED_MASK,
185 boot_mode);
186 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100187}
188
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100189int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200190{
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100191 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200192 int ret;
193
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200194 if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
195 return -ENODEV;
196
Patrice Chotardaef7c182022-04-22 09:39:18 +0200197 /*
198 * In case of USB boot device is detected, consider USB cable is
199 * connected
200 */
201 if ((get_bootmode() & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_USB)
202 return true;
203
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +0200204 /* if typec stusb160x is present, means DK1 or DK2 board */
205 ret = stusb160x_cable_connected();
206 if (ret >= 0)
207 return ret;
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100208
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100209 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700210 DM_DRIVER_GET(dwc2_udc_otg),
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100211 &dwc2_udc_otg);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100212 if (ret) {
213 log_debug("dwc2_udc_otg init failed\n");
214 return ret;
215 }
Patrice Chotard204079b2018-08-10 17:12:14 +0200216
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100217 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100218}
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200219
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200220#ifdef CONFIG_USB_GADGET_DOWNLOAD
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200221#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
222#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
223
224int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
225{
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200226 if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
227 !strcmp(name, "usb_dnl_dfu"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200228 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200229 else if (IS_ENABLED(CONFIG_FASTBOOT) &&
230 !strcmp(name, "usb_dnl_fastboot"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200231 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
232 &dev->idProduct);
233 else
234 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
235
236 return 0;
237}
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200238#endif /* CONFIG_USB_GADGET_DOWNLOAD */
Patrice Chotard879cde52019-02-12 16:50:40 +0100239
240static int get_led(struct udevice **dev, char *led_string)
241{
Simon Glass0034d962021-08-07 07:24:01 -0600242 const char *led_name;
Patrice Chotard879cde52019-02-12 16:50:40 +0100243 int ret;
244
Simon Glass0034d962021-08-07 07:24:01 -0600245 led_name = ofnode_conf_read_str(led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100246 if (!led_name) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100247 log_debug("could not find %s config string\n", led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100248 return -ENOENT;
249 }
250 ret = led_get_by_label(led_name, dev);
251 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100252 log_debug("get=%d\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100253 return ret;
254 }
255
256 return 0;
257}
258
259static int setup_led(enum led_state_t cmd)
260{
261 struct udevice *dev;
262 int ret;
263
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200264 if (!CONFIG_IS_ENABLED(LED))
265 return 0;
266
Patrice Chotard879cde52019-02-12 16:50:40 +0100267 ret = get_led(&dev, "u-boot,boot-led");
268 if (ret)
269 return ret;
270
271 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200272 return ret;
273}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200274
275static void __maybe_unused led_error_blink(u32 nb_blink)
276{
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200277 int ret;
278 struct udevice *led;
279 u32 i;
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200280
281 if (!nb_blink)
282 return;
283
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200284 if (CONFIG_IS_ENABLED(LED)) {
285 ret = get_led(&led, "u-boot,error-led");
286 if (!ret) {
287 /* make u-boot,error-led blinking */
288 /* if U32_MAX and 125ms interval, for 17.02 years */
289 for (i = 0; i < 2 * nb_blink; i++) {
290 led_set_state(led, LEDST_TOGGLE);
291 mdelay(125);
292 WATCHDOG_RESET();
293 }
294 led_set_state(led, LEDST_ON);
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200295 }
296 }
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200297
298 /* infinite: the boot process must be stopped */
299 if (nb_blink == U32_MAX)
300 hang();
301}
Patrice Chotard204079b2018-08-10 17:12:14 +0200302
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200303static int adc_measurement(ofnode node, int adc_count, int *min_uV, int *max_uV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100304{
305 struct ofnode_phandle_args adc_args;
306 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100307 unsigned int raw;
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200308 int ret, uV;
309 int i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100310
311 for (i = 0; i < adc_count; i++) {
312 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
313 "#io-channel-cells", 0, i,
314 &adc_args)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100315 log_debug("can't find /config/st,adc_usb_pd\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100316 return 0;
317 }
318
319 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
320 &adc);
321
322 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100323 log_err("Can't get adc device(%d)\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100324 return ret;
325 }
326
327 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
328 &raw);
329 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100330 log_err("single shot failed for %s[%d]!\n",
331 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100332 return ret;
333 }
334 /* Convert to uV */
335 if (!adc_raw_to_uV(adc, raw, &uV)) {
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200336 if (uV > *max_uV)
337 *max_uV = uV;
338 if (uV < *min_uV)
339 *min_uV = uV;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100340 log_debug("%s[%02d] = %u, %d uV\n",
341 adc->name, adc_args.args[0], raw, uV);
Patrice Chotard879cde52019-02-12 16:50:40 +0100342 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100343 log_err("Can't get uV value for %s[%d]\n",
344 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100345 }
346 }
347
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200348 return 0;
349}
350
351static int board_check_usb_power(void)
352{
353 ofnode node;
354 int max_uV = 0;
355 int min_uV = USB_START_HIGH_THRESHOLD_UV;
356 int adc_count, ret;
357 u32 nb_blink;
358 u8 i;
359
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200360 if (!IS_ENABLED(CONFIG_ADC))
361 return -ENODEV;
362
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200363 node = ofnode_path("/config");
364 if (!ofnode_valid(node)) {
365 log_debug("no /config node?\n");
366 return -ENOENT;
367 }
368
Patrice Chotard879cde52019-02-12 16:50:40 +0100369 /*
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200370 * Retrieve the ADC channels devices and get measurement
371 * for each of them
Patrice Chotard879cde52019-02-12 16:50:40 +0100372 */
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200373 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
374 "#io-channel-cells", 0);
375 if (adc_count < 0) {
376 if (adc_count == -ENOENT)
377 return 0;
Patrice Chotard879cde52019-02-12 16:50:40 +0100378
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200379 log_err("Can't find adc channel (%d)\n", adc_count);
380
381 return adc_count;
382 }
Patrice Chotardcded32f2019-04-30 18:09:38 +0200383
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200384 /* perform maximum of 2 ADC measurements to detect power supply current */
385 for (i = 0; i < 2; i++) {
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200386 ret = adc_measurement(node, adc_count, &min_uV, &max_uV);
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200387 if (ret)
388 return ret;
389
390 /*
391 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
392 * board is plugged on an USB-C 3A power supply and boot process can
393 * continue.
394 */
395 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
396 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
397 min_uV <= USB_LOW_THRESHOLD_UV)
398 return 0;
399
400 if (i == 0) {
401 log_err("Previous ADC measurements was not the one expected, retry in 20ms\n");
402 mdelay(20); /* equal to max tPDDebounce duration (min 10ms - max 20ms) */
403 }
404 }
405
406 log_notice("****************************************************\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200407 /*
408 * If highest and lowest value are either both below
409 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
410 * means USB TYPE-C is in unattached mode, this is an issue, make
411 * u-boot,error-led blinking and stop boot process.
412 */
413 if ((max_uV > USB_LOW_THRESHOLD_UV &&
414 min_uV > USB_LOW_THRESHOLD_UV) ||
415 (max_uV <= USB_LOW_THRESHOLD_UV &&
416 min_uV <= USB_LOW_THRESHOLD_UV)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100417 log_notice("* ERROR USB TYPE-C connection in unattached mode *\n");
418 log_notice("* Check that USB TYPE-C cable is correctly plugged *\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200419 /* with 125ms interval, led will blink for 17.02 years ....*/
420 nb_blink = U32_MAX;
421 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100422
Patrice Chotardcded32f2019-04-30 18:09:38 +0200423 if (max_uV > USB_LOW_THRESHOLD_UV &&
424 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
425 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100426 log_notice("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100427 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200428 }
429
430 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
431 max_uV <= USB_START_LOW_THRESHOLD_UV &&
432 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100433 log_notice("* WARNING 1.5A power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100434 nb_blink = 3;
435 }
436
Patrice Chotardcded32f2019-04-30 18:09:38 +0200437 /*
438 * If highest value is above 2.15 Volts that means that the USB TypeC
439 * supplies more than 3 Amp, this is not compliant with TypeC specification
440 */
441 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100442 log_notice("* USB TYPE-C charger not compliant with *\n");
443 log_notice("* specification *\n");
444 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200445 /* with 125ms interval, led will blink for 17.02 years ....*/
446 nb_blink = U32_MAX;
447 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100448 log_notice("* Current too low, use a 3A power supply! *\n");
449 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200450 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100451
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200452 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100453
454 return 0;
455}
456
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100457static void sysconf_init(void)
458{
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100459 u8 *syscfg;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100460 struct udevice *pwr_dev;
461 struct udevice *pwr_reg;
462 struct udevice *dev;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100463 u32 otp = 0;
Patrick Delaunay181298e2020-04-22 14:29:16 +0200464 int ret;
465 u32 bootr, val;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100466
467 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
468
469 /* interconnect update : select master using the port 1 */
470 /* LTDC = AXI_M9 */
471 /* GPU = AXI_M8 */
472 /* today information is hardcoded in U-Boot */
473 writel(BIT(9), syscfg + SYSCFG_ICNR);
474
475 /* disable Pull-Down for boot pin connected to VDD */
476 bootr = readl(syscfg + SYSCFG_BOOTR);
477 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
478 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
479 writel(bootr, syscfg + SYSCFG_BOOTR);
480
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100481 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
482 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
483 * The customer will have to disable this for low frequencies
484 * or if AFMUX is selected but the function not used, typically for
485 * TRACE. Otherwise, impact on power consumption.
486 *
487 * WARNING:
488 * enabling High Speed mode while VDD>2.7V
489 * with the OTP product_below_2v5 (OTP 18, BIT 13)
490 * erroneously set to 1 can damage the IC!
491 * => U-Boot set the register only if VDD < 2.7V (in DT)
492 * but this value need to be consistent with board design
493 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200494 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700495 DM_DRIVER_GET(stm32mp_pwr_pmic),
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200496 &pwr_dev);
Patrick Delaunay7c104822022-06-20 12:36:10 +0200497 if (!ret) {
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100498 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700499 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100500 &dev);
501 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100502 log_err("Can't find stm32mp_bsec driver\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100503 return;
504 }
505
506 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200507 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100508 otp = otp & BIT(13);
509
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200510 /* get VDD = vdd-supply */
511 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100512 &pwr_reg);
513
514 /* check if VDD is Low Voltage */
515 if (!ret) {
516 if (regulator_get_value(pwr_reg) < 2700000) {
517 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
518 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
519 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
520 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
521 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
522 syscfg + SYSCFG_IOCTRLSETR);
523
524 if (!otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100525 log_err("product_below_2v5=0: HSLVEN protected by HW\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100526 } else {
527 if (otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100528 log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100529 }
530 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100531 log_debug("VDD unknown");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100532 }
533 }
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100534
535 /* activate automatic I/O compensation
536 * warning: need to ensure CSI enabled and ready in clock driver
537 */
538 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
539
Patrick Delaunay181298e2020-04-22 14:29:16 +0200540 /* poll until ready (1s timeout) */
541 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
542 val & SYSCFG_CMPCR_READY,
543 1000000);
544 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100545 log_err("SYSCFG: I/O compensation failed, timeout.\n");
Patrick Delaunay181298e2020-04-22 14:29:16 +0200546 led_error_blink(10);
547 }
548
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100549 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100550}
551
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200552static int board_stm32mp15x_dk2_init(void)
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200553{
554 ofnode node;
555 struct gpio_desc hdmi, audio;
556 int ret = 0;
557
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200558 /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200559 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
560 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100561 log_debug("no hdmi-transmitter@39 ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200562 return -ENOENT;
563 }
564
565 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
566 &hdmi, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100567 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200568 return -ENOENT;
569 }
570
571 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
572 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100573 log_debug("no cs42l51@4a ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200574 return -ENOENT;
575 }
576
577 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
578 &audio, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100579 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200580 return -ENOENT;
581 }
582
583 /* before power up, insure that HDMI and AUDIO IC is under reset */
584 ret = dm_gpio_set_value(&hdmi, 1);
585 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100586 log_err("can't set_value for hdmi_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200587 goto error;
588 }
589 ret = dm_gpio_set_value(&audio, 1);
590 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100591 log_err("can't set_value for audio_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200592 goto error;
593 }
594
595 /* power-up audio IC */
596 regulator_autoset_by_name("v1v8_audio", NULL);
597
598 /* power-up HDMI IC */
599 regulator_autoset_by_name("v1v2_hdmi", NULL);
600 regulator_autoset_by_name("v3v3_hdmi", NULL);
601
602error:
603 return ret;
604}
605
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200606static bool board_is_stm32mp15x_dk2(void)
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200607{
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100608 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200609 of_machine_is_compatible("st,stm32mp157c-dk2"))
610 return true;
611
612 return false;
613}
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200614
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200615static bool board_is_stm32mp15x_ev1(void)
Patrick Delaunay486ae962020-04-22 14:29:13 +0200616{
617 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
618 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
619 of_machine_is_compatible("st,stm32mp157c-ev1") ||
620 of_machine_is_compatible("st,stm32mp157d-ev1") ||
621 of_machine_is_compatible("st,stm32mp157f-ev1")))
622 return true;
623
624 return false;
625}
626
627/* touchscreen driver: only used for pincontrol configuration */
628static const struct udevice_id goodix_ids[] = {
629 { .compatible = "goodix,gt9147", },
630 { }
631};
632
633U_BOOT_DRIVER(goodix) = {
634 .name = "goodix",
635 .id = UCLASS_NOP,
636 .of_match = goodix_ids,
637};
638
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200639static void board_stm32mp15x_ev1_init(void)
Patrick Delaunay486ae962020-04-22 14:29:13 +0200640{
641 struct udevice *dev;
642
643 /* configure IRQ line on EV1 for touchscreen before LCD reset */
Simon Glass65130cd2020-12-28 20:34:56 -0700644 uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev);
Patrick Delaunay486ae962020-04-22 14:29:13 +0200645}
646
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100647/* board dependent setup after realloc */
648int board_init(void)
649{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100650 board_key_check();
651
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200652 if (board_is_stm32mp15x_ev1())
653 board_stm32mp15x_ev1_init();
Patrick Delaunay486ae962020-04-22 14:29:13 +0200654
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200655 if (board_is_stm32mp15x_dk2())
656 board_stm32mp15x_dk2_init();
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200657
Patrick Delaunay7c104822022-06-20 12:36:10 +0200658 regulators_enable_boot_on(_DEBUG);
Patrick Delaunay6519e442019-07-05 17:20:09 +0200659
Patrick Delaunay72a57622021-10-11 09:52:50 +0200660 /*
661 * sysconf initialisation done only when U-Boot is running in secure
662 * done in TF-A for TFABOOT.
663 */
664 if (IS_ENABLED(CONFIG_ARMV7_NONSEC))
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200665 sysconf_init();
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100666
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200667 setup_led(LEDST_ON);
668
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100669 return 0;
670}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100671
672int board_late_init(void)
673{
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100674 const void *fdt_compat;
675 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200676 int ret;
677 u32 otp;
678 struct udevice *dev;
679 char buf[10];
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200680 char dtb_name[256];
681 int buf_len;
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100682
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200683 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
Patrick Delaunay4e506b02022-05-19 09:07:29 +0200684 fdt_compat = ofnode_get_property(ofnode_root(), "compatible",
685 &fdt_compat_len);
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200686 if (fdt_compat && fdt_compat_len) {
687 if (strncmp(fdt_compat, "st,", 3) != 0) {
688 env_set("board_name", fdt_compat);
689 } else {
690 env_set("board_name", fdt_compat + 3);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200691
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200692 buf_len = sizeof(dtb_name);
693 strncpy(dtb_name, fdt_compat + 3, buf_len);
694 buf_len -= strlen(fdt_compat + 3);
695 strncat(dtb_name, ".dtb", buf_len);
696 env_set("fdtfile", dtb_name);
697 }
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200698 }
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200699 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700700 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200701 &dev);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200702
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200703 if (!ret)
704 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
705 &otp, sizeof(otp));
706 if (ret > 0 && otp) {
707 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
708 env_set("board_id", buf);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200709
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200710 snprintf(buf, sizeof(buf), "0x%04x",
711 ((otp >> 8) & 0xF) - 1 + 0xA);
712 env_set("board_rev", buf);
713 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200714 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100715
Patrice Chotard879cde52019-02-12 16:50:40 +0100716 /* for DK1/DK2 boards */
717 board_check_usb_power();
718
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100719 return 0;
720}
Patrice Chotard879cde52019-02-12 16:50:40 +0100721
722void board_quiesce_devices(void)
723{
724 setup_led(LEDST_OFF);
725}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200726
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200727/* eth init function : weak called in eqos driver */
728int board_interface_eth_init(struct udevice *dev,
729 phy_interface_t interface_type)
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200730{
731 u8 *syscfg;
732 u32 value;
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200733 bool eth_clk_sel_reg = false;
734 bool eth_ref_clk_sel_reg = false;
735
736 /* Gigabit Ethernet 125MHz clock selection. */
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200737 eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200738
739 /* Ethernet 50Mhz RMII clock selection */
740 eth_ref_clk_sel_reg =
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200741 dev_read_bool(dev, "st,eth-ref-clk-sel");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200742
743 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
744
745 if (!syscfg)
746 return -ENODEV;
747
748 switch (interface_type) {
749 case PHY_INTERFACE_MODE_MII:
750 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
751 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100752 log_debug("PHY_INTERFACE_MODE_MII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200753 break;
754 case PHY_INTERFACE_MODE_GMII:
755 if (eth_clk_sel_reg)
756 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
757 SYSCFG_PMCSETR_ETH_CLK_SEL;
758 else
759 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100760 log_debug("PHY_INTERFACE_MODE_GMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200761 break;
762 case PHY_INTERFACE_MODE_RMII:
763 if (eth_ref_clk_sel_reg)
764 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
765 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
766 else
767 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100768 log_debug("PHY_INTERFACE_MODE_RMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200769 break;
770 case PHY_INTERFACE_MODE_RGMII:
771 case PHY_INTERFACE_MODE_RGMII_ID:
772 case PHY_INTERFACE_MODE_RGMII_RXID:
773 case PHY_INTERFACE_MODE_RGMII_TXID:
774 if (eth_clk_sel_reg)
775 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
776 SYSCFG_PMCSETR_ETH_CLK_SEL;
777 else
778 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100779 log_debug("PHY_INTERFACE_MODE_RGMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200780 break;
781 default:
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100782 log_debug("Do not manage %d interface\n",
783 interface_type);
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200784 /* Do not manage others interfaces */
785 return -EINVAL;
786 }
787
788 /* clear and set ETH configuration bits */
789 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
790 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
791 syscfg + SYSCFG_PMCCLRR);
792 writel(value, syscfg + SYSCFG_PMCSETR);
793
794 return 0;
795}
796
Patrice Chotard34320372019-05-02 18:28:05 +0200797enum env_location env_get_location(enum env_operation op, int prio)
798{
799 u32 bootmode = get_bootmode();
800
801 if (prio)
802 return ENVL_UNKNOWN;
803
804 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
Patrick Delaunay455b0652020-06-15 11:18:22 +0200805 case BOOT_FLASH_SD:
806 case BOOT_FLASH_EMMC:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200807 if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
808 return ENVL_MMC;
809 else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
810 return ENVL_EXT4;
811 else
812 return ENVL_NOWHERE;
813
Patrice Chotard34320372019-05-02 18:28:05 +0200814 case BOOT_FLASH_NAND:
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100815 case BOOT_FLASH_SPINAND:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200816 if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI))
817 return ENVL_UBI;
818 else
819 return ENVL_NOWHERE;
820
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200821 case BOOT_FLASH_NOR:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200822 if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
823 return ENVL_SPI_FLASH;
824 else
825 return ENVL_NOWHERE;
826
Patrice Chotard34320372019-05-02 18:28:05 +0200827 default:
828 return ENVL_NOWHERE;
829 }
830}
831
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200832const char *env_ext4_get_intf(void)
833{
834 u32 bootmode = get_bootmode();
835
836 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
837 case BOOT_FLASH_SD:
838 case BOOT_FLASH_EMMC:
839 return "mmc";
840 default:
841 return "";
842 }
843}
844
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200845int mmc_get_boot(void)
846{
847 struct udevice *dev;
848 u32 boot_mode = get_bootmode();
849 unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
850 char cmd[20];
851 const u32 sdmmc_addr[] = {
852 STM32_SDMMC1_BASE,
853 STM32_SDMMC2_BASE,
854 STM32_SDMMC3_BASE
855 };
856
857 if (instance > ARRAY_SIZE(sdmmc_addr))
858 return 0;
859
860 /* search associated sdmmc node in devicetree */
861 snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]);
862 if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) {
863 log_err("mmc%d = %s not found in device tree!\n", instance, cmd);
864 return 0;
865 }
866
867 return dev_seq(dev);
868};
869
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200870const char *env_ext4_get_dev_part(void)
871{
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000872 static char *const env_dev_part =
873#ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
874 CONFIG_ENV_EXT4_DEVICE_AND_PART;
875#else
876 "";
877#endif
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200878 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000879
880 if (strlen(env_dev_part) > 0)
881 return env_dev_part;
882
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200883 return dev_part[mmc_get_boot()];
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200884}
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000885
Patrick Delaunay455b0652020-06-15 11:18:22 +0200886int mmc_get_env_dev(void)
887{
Patrick Delaunay520e2992022-01-11 16:37:21 +0100888 const int mmc_env_dev = CONFIG_IS_ENABLED(ENV_IS_IN_MMC, (CONFIG_SYS_MMC_ENV_DEV), (-1));
889
890 if (mmc_env_dev >= 0)
891 return mmc_env_dev;
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100892
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100893 /* use boot instance to select the correct mmc device identifier */
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200894 return mmc_get_boot();
Patrick Delaunay455b0652020-06-15 11:18:22 +0200895}
Patrick Delaunay455b0652020-06-15 11:18:22 +0200896
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200897#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900898int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200899{
Patrick Delaunaya8a67ed2020-07-29 13:24:52 +0200900 static const struct node_info nodes[] = {
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200901 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100902 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200903 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
Christophe Kerello15359e42020-07-31 09:53:42 +0200904 { "st,stm32mp1-fmc2-nfc", MTD_DEV_TYPE_NAND, },
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200905 };
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200906 char *boot_device;
Patrick Delaunay9d96e902020-07-31 16:31:50 +0200907
Patrick Delaunay1b5cd0b2020-10-15 14:52:30 +0200908 /* Check the boot-source and don't update MTD for serial or usb boot */
909 boot_device = env_get("boot_device");
910 if (!boot_device ||
911 (strcmp(boot_device, "serial") && strcmp(boot_device, "usb")))
912 if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
913 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200914
Patrick Delaunay028fddd2021-11-15 16:32:23 +0100915 if (CONFIG_IS_ENABLED(FDT_SIMPLEFB))
916 fdt_simplefb_enable_and_mem_rsv(blob);
917
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200918 return 0;
919}
920#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200921
922static void board_copro_image_process(ulong fw_image, size_t fw_size)
923{
924 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
925
926 if (!rproc_is_initialized())
927 if (rproc_init()) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100928 log_err("Remote Processor %d initialization failed\n",
929 id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200930 return;
931 }
932
933 ret = rproc_load(id, fw_image, fw_size);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100934 log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
935 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200936
Fabien Dessennead6cc942019-10-30 14:38:32 +0100937 if (!ret)
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200938 rproc_start(id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200939}
940
941U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);