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e0af907cfd892a8b811181dd165a51190d9ee79f
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plat
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intel
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soc
4282690
Merge "fix(intel): add in JTAG ID for Linux FCS" into integration
by Mark Dykes
· Mon Oct 28 23:12:04 2024 +0100
2c3e07d
Merge "feat(intel): add build option for boot source" into integration
by Mark Dykes
· Mon Oct 28 23:08:07 2024 +0100
4df60a9
Merge "fix(intel): refactor SDMMC driver for Altera products" into integration
by Mark Dykes
· Mon Oct 28 23:03:29 2024 +0100
17c45d7
Merge "feat(intel): clock manager PLL configuration for Agilex5 platform" into integration
by Mark Dykes
· Fri Oct 25 16:35:21 2024 +0200
c1b6a87
Merge "fix(intel): update Agilex5 warm reset subroutines" into integration
by Mark Dykes
· Fri Oct 25 16:33:33 2024 +0200
3146405
fix(intel): refactor SDMMC driver for Altera products
by Sieu Mun Tang
· Fri Oct 25 09:37:42 2024 +0800
81410d3
feat(intel): clock manager PLL configuration for Agilex5 platform
by Sieu Mun Tang
· Fri Oct 25 09:22:00 2024 +0800
2e60a3b
Merge "feat(intel): update BL2 platform specific functions" into integration
by Mark Dykes
· Thu Oct 24 22:18:49 2024 +0200
a09363c
fix(intel): update Agilex5 warm reset subroutines
by Sieu Mun Tang
· Thu Oct 24 23:41:02 2024 +0800
2561369
fix(intel): add in JTAG ID for Linux FCS
by Sieu Mun Tang
· Fri Oct 04 18:38:21 2024 +0800
f5ab836
feat(intel): update BL2 platform specific functions
by Sieu Mun Tang
· Thu Oct 24 19:23:42 2024 +0800
d52f248
feat(intel): add build option for boot source
by Sieu Mun Tang
· Thu Oct 24 22:16:50 2024 +0800
a3abd32
Merge "fix(intel): correct macro naming" into integration
by Mark Dykes
· Thu Oct 24 16:59:57 2024 +0200
969d6e2
Merge "feat(intel): pinmux and power manager config for Agilex5 platform" into integration
by Mark Dykes
· Thu Oct 24 16:51:43 2024 +0200
05ab39d
fix(intel): correct macro naming
by Sieu Mun Tang
· Mon Oct 07 16:43:35 2024 +0800
d04e1f3
feat(intel): pinmux and power manager config for Agilex5 platform
by Sieu Mun Tang
· Thu Oct 24 15:23:43 2024 +0800
58382b8
fix(intel): update all the platforms hand-off data offset value
by Sieu Mun Tang
· Thu Oct 24 12:52:18 2024 +0800
79fe561
Merge "fix(intel): fix CCU for cache maintenance" into integration
by Mark Dykes
· Tue Oct 22 17:33:08 2024 +0200
8fc1168
Merge "fix(intel): flush L1/L2/L3/Sys cache before HPS cold reset" into integration
by Mark Dykes
· Tue Oct 22 17:30:32 2024 +0200
82254ee
fix(intel): fix CCU for cache maintenance
by Sieu Mun Tang
· Tue Oct 22 00:52:09 2024 +0800
7b347f4
fix(intel): update preloaded_bl33_base for legacy product
by Sieu Mun Tang
· Tue Oct 22 00:31:02 2024 +0800
9dd2c18
fix(intel): flush L1/L2/L3/Sys cache before HPS cold reset
by Sieu Mun Tang
· Tue Oct 22 01:00:45 2024 +0800
7c14cea
feat(intel): direct boot from TF-A to Linux for Agilex
by Sieu Mun Tang
· Fri Feb 02 23:23:12 2024 +0800
1ddb25f
Merge "fix(intel): implement soc and lwsoc bridge control for burst speed" into integration
by Mark Dykes
· Fri Oct 18 00:37:34 2024 +0200
5c03415
fix(intel): implement soc and lwsoc bridge control for burst speed
by Sieu Mun Tang
· Fri Oct 04 16:13:11 2024 +0800
b632284
feat(intel): update hand-off data to include agilex5 params
by Girisha Dengi
· Thu Apr 04 15:52:37 2024 +0800
5a48393
Merge "fix(intel): update mailbox SDM printout message" into integration
by Mark Dykes
· Thu Oct 17 23:02:41 2024 +0200
178c421
Merge "fix(intel): update the size with addition 0x8000 0000 base" into integration
by Mark Dykes
· Thu Oct 17 22:57:38 2024 +0200
3ccf9c8
Merge "fix(intel): fix bridge enable and disable function" into integration
by Mark Dykes
· Thu Oct 17 00:46:06 2024 +0200
6ebd7b7
Merge "fix(intel): update outdated code for Linux direct boot" into integration
by Mark Dykes
· Thu Oct 17 00:45:35 2024 +0200
c549276
fix(intel): update the size with addition 0x8000 0000 base
by Sieu Mun Tang
· Wed Sep 25 13:56:38 2024 +0800
87d5ce7
fix(intel): fix bridge enable and disable function
by Sieu Mun Tang
· Sun Jun 09 23:47:53 2024 +0800
d9489b1
fix(intel): update outdated code for Linux direct boot
by Sieu Mun Tang
· Fri Oct 04 14:27:18 2024 +0800
8560672
fix(intel): update Agilex5 BL2 init flow and other misc changes
by Sieu Mun Tang
· Tue Aug 27 00:01:51 2024 +0800
7bb345c
feat(intel): update Agilex5 DDR and IOSSM driver
by Sieu Mun Tang
· Mon Aug 26 22:51:16 2024 +0800
0bd8373
fix(intel): update mailbox SDM printout message
by Jit Loon Lim
· Tue May 07 16:46:12 2024 +0800
62ebbfe
fix(intel): update CCU configuration for Agilex5 platform
by Sieu Mun Tang
· Tue Apr 30 16:10:15 2024 +0800
d22ff66
fix(intel): add cache invalidation during BL31 initialization
by Tanmay Kathpalia
· Fri May 31 10:40:22 2024 +0000
11a5bf0
fix(intel): bridge ack timing issue causing fpga config hung
by Jit Loon Lim
· Tue Jun 11 21:47:41 2024 +0800
5a77020
Merge "fix(intel): update memcpy to memcpy_s" into integration
by Mark Dykes
· Fri Aug 30 20:09:24 2024 +0200
765cf2d
Merge "fix(intel): software workaround for bridge timeout" into integration
by Olivier Deprez
· Wed Aug 28 08:37:23 2024 +0200
ebca515
fix(intel): update memcpy to memcpy_s
by Sieu Mun Tang
· Mon Aug 26 07:59:10 2024 +0800
d9144ec
fix(intel): add in missing ECC register
by Jit Loon Lim
· Thu Aug 22 21:53:03 2024 +0800
f62e8ff
Merge changes I23bdbbe1,Ic22ab741 into integration
by Mark Dykes
· Thu Aug 22 17:15:53 2024 +0200
6848bd6
feat(intel): enable VAB support for Intel products
by Sieu Mun Tang
· Sat Jul 20 00:43:43 2024 +0800
d80c3d3
feat(intel): add in SHA384 authentication
by Jit Loon Lim
· Thu Oct 26 23:46:01 2023 +0800
c957c2a
fix(intel): update sip smc config addr for agilex5
by Jit Loon Lim
· Thu Apr 04 11:16:09 2024 +0800
c2f06aa
fix(intel): software workaround for bridge timeout
by Jit Loon Lim
· Mon Apr 15 14:48:05 2024 +0800
2738fbc
Merge "fix(intel): f2sdram bridge quick write thru failed" into integration
by Manish Pandey
· Fri Jul 19 15:53:17 2024 +0200
cc10e38
Merge "feat(intel): add QSPI get devinfo mailbox cmd" into integration
by Manish Pandey
· Fri Jul 19 15:51:01 2024 +0200
a995834
fix(intel): add in watchdog for QSPI driver
by Sieu Mun Tang
· Tue Mar 26 08:15:45 2024 +0800
60f0b58
feat(intel): add QSPI get devinfo mailbox cmd
by Kah Jing Lee
· Sun Jan 07 20:34:39 2024 +0800
2626a4e
fix(intel): f2sdram bridge quick write thru failed
by Jit Loon Lim
· Wed Mar 20 21:43:58 2024 +0800
53aa28c
refactor: fix common misspelling of init*
by Harrison Mutai
· Wed Mar 20 11:38:07 2024 +0000
5436c68
fix(intel): update nand driver to match GHRD design
by Girisha Dengi
· Wed Nov 15 13:39:10 2023 +0800
d6cede3
Merge "feat(intel): enable SDMMC frontdoor load for ATF->Linux" into integration
by Sandrine Bailleux
· Fri Jan 19 11:08:14 2024 +0100
c271599
feat(intel): enable query of fip offset on RSU
by Mahesh Rao
· Tue Aug 22 17:26:23 2023 +0800
01c564b
feat(intel): support query of fip offset using RSU
by Mahesh Rao
· Tue Aug 22 17:22:24 2023 +0800
961f7f1
Merge "feat(intel): support wipe DDR after calibration" into integration
by Sandrine Bailleux
· Wed Jan 10 14:49:27 2024 +0100
0360c62
Merge "fix(intel): update from INFO to VERBOSE when print debug message" into integration
by Sandrine Bailleux
· Wed Jan 10 14:45:59 2024 +0100
7a22863
Merge changes Id85b2541,I4d253e2f into integration
by Sandrine Bailleux
· Wed Jan 10 13:54:11 2024 +0100
d20b9d6
Merge "fix(intel): update fcs crypto init code to check for mode" into integration
by Sandrine Bailleux
· Wed Jan 10 13:41:44 2024 +0100
c697fd5
Merge changes I548e3034,I65c7fd1b,I1cdacc0f,If9ac35af into integration
by Sandrine Bailleux (on vacation)
· Wed Dec 27 11:21:09 2023 +0100
76c51fd
fix(intel): update from INFO to VERBOSE when print debug message
by Sieu Mun Tang
· Fri Nov 17 14:02:54 2023 +0800
477aef4
feat(intel): support wipe DDR after calibration
by Jit Loon Lim
· Mon Aug 14 13:12:01 2023 +0800
6e0e1b5
fix(intel): update system counter back to 400MHz
by Sieu Mun Tang
· Fri Dec 22 11:30:46 2023 +0800
60f7fb8
fix(intel): revert back to use L4 clock
by Sieu Mun Tang
· Fri Dec 22 11:12:17 2023 +0800
334ea37
feat(intel): support QSPI ECC Linux for Agilex
by Sieu Mun Tang
· Fri Dec 22 00:43:57 2023 +0800
fe91ca3
feat(intel): support QSPI ECC Linux for N5X
by Jit Loon Lim
· Wed Oct 18 16:19:18 2023 +0800
0cd0954
feat(intel): support QSPI ECC Linux for Stratix10
by Jit Loon Lim
· Wed Oct 18 16:19:27 2023 +0800
6e42279
feat(intel): add in QSPI ECC for Linux
by Jit Loon Lim
· Thu Sep 07 16:44:07 2023 +0800
eede099
fix(intel): add HPS remapper to remap base address for SDM
by Sieu Mun Tang
· Fri Dec 22 00:26:42 2023 +0800
e7ab132
Merge "fix(intel): fix hardcoded mpu frequency ticks" into integration
by Sandrine Bailleux
· Tue Dec 19 16:12:59 2023 +0100
8995426
Merge "fix(intel): bl31 overwrite OCRAM configuration" into integration
by Sandrine Bailleux
· Tue Dec 19 16:07:22 2023 +0100
1bb0ee0
Merge "fix(intel): update DDR range checking for Agilex5" into integration
by Sandrine Bailleux
· Tue Dec 19 15:32:06 2023 +0100
deb053c
Merge "fix(intel): update fcs functions to check ddr range" into integration
by Sandrine Bailleux
· Tue Dec 19 14:26:28 2023 +0100
f72b96d
Merge "feat(intel): support SDM mailbox safe inject seu error for Linux" into integration
by Manish Pandey
· Mon Dec 18 18:39:10 2023 +0100
c5a3e3a
feat(intel): enable SDMMC frontdoor load for ATF->Linux
by Jit Loon Lim
· Mon Oct 16 00:19:34 2023 +0800
ffa06e7
fix(intel): fix hardcoded mpu frequency ticks
by Jit Loon Lim
· Fri Jul 07 17:15:26 2023 +0800
b46c869
feat(intel): support SDM mailbox safe inject seu error for Linux
by Jit Loon Lim
· Wed Sep 20 14:00:41 2023 +0800
fc4a017
fix(intel): update DDR range checking for Agilex5
by Sieu Mun Tang
· Mon Sep 25 22:30:34 2023 +0800
c0dc40e
fix(intel): update fcs functions to check ddr range
by Jit Loon Lim
· Fri Nov 17 10:36:30 2023 +0800
231ca5c
fix(intel): update fcs crypto init code to check for mode
by Jit Loon Lim
· Wed Sep 13 09:25:59 2023 +0800
05a020f
Merge "fix(intel): update HPS bridges for Agilex5 SoC FPGA" into integration
by Sandrine Bailleux
· Wed Dec 06 11:36:05 2023 +0100
e3eb943
Merge "fix(intel): read QSPI bank buffer data in bytes" into integration
by Manish Pandey
· Tue Nov 28 22:46:29 2023 +0100
612eeb0
Merge "fix(intel): temporarily workaround for Zephyr SMP" into integration
by Manish Pandey
· Tue Nov 28 22:46:04 2023 +0100
94f4418
Merge "feat(intel): restructure watchdog" into integration
by Manish Pandey
· Tue Nov 28 22:45:38 2023 +0100
ed27523
Merge "fix(intel): update individual return result for hps and fpga bridges" into integration
by Manish Pandey
· Mon Nov 27 16:39:04 2023 +0100
e8bffd9
Merge "feat(intel): increase bl2 size limit" into integration
by Manish Pandey
· Mon Nov 27 16:38:45 2023 +0100
c199e0a
Merge "fix(intel): update stream id to non-secure for SDM" into integration
by Manish Pandey
· Mon Nov 27 16:38:24 2023 +0100
c74c9f7
Merge "fix(intel): revert sys counter to 400MHz" into integration
by Manish Pandey
· Mon Nov 27 16:37:55 2023 +0100
07101ec
fix(intel): read QSPI bank buffer data in bytes
by Girisha Dengi
· Thu Oct 12 21:27:23 2023 +0800
d5f8a23
fix(intel): bl31 overwrite OCRAM configuration
by Jit Loon Lim
· Thu Oct 19 11:04:51 2023 +0800
0c054e5
fix(intel): update individual return result for hps and fpga bridges
by Jit Loon Lim
· Mon Oct 16 07:57:58 2023 +0800
f6186b2
feat(intel): increase bl2 size limit
by Jit Loon Lim
· Wed Sep 27 11:02:45 2023 +0800
5dac95d
fix(intel): update stream id to non-secure for SDM
by Sieu Mun Tang
· Fri Sep 15 15:13:46 2023 +0800
6be3c34
fix(intel): revert sys counter to 400MHz
by Jit Loon Lim
· Mon Sep 04 14:44:29 2023 +0800
b35f68a
fix(intel): update HPS bridges for Agilex5 SoC FPGA
by Sieu Mun Tang
· Mon Oct 16 00:15:38 2023 +0800
33a0de7
fix(intel): temporarily workaround for Zephyr SMP
by Sieu Mun Tang
· Tue Aug 01 13:43:26 2023 +0800
9da7620
fix(intel): update boot scratch cold register to use cold 8
by Jit Loon Lim
· Sat Jun 10 00:04:49 2023 +0800
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