| commit | 87d5ce745a7191dc4dd746c1ef6877ed89bef28a | [log] [tgz] |
|---|---|---|
| author | Sieu Mun Tang <sieu.mun.tang@intel.com> | Sun Jun 09 23:47:53 2024 +0800 |
| committer | jit.loon.lim <jit.loon.lim@intel.com> | Wed Oct 16 23:38:25 2024 +0200 |
| tree | cfd186d8e39edfe5da4a94ebba2923bdca024558 | |
| parent | e12f4673c8fb8b480a81a75906b33b54b363a543 [diff] |
fix(intel): fix bridge enable and disable function 1. hps reset and reboot spec is missing ack clear status step 2. software workaround for bridge timeout 3. f2sdram bridge quick write thru failed 4. bridge timeout workaround for F2SOC and F2SDRAM Change-Id: Ide4210ff862531f82e083633af385b559ffbe16b Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>