| commit | 11a5bf0ec4ceefdb2cf7c3acec8e87787b7b3025 | [log] [tgz] |
|---|---|---|
| author | Jit Loon Lim <jit.loon.lim@intel.com> | Tue Jun 11 21:47:41 2024 +0800 |
| committer | jit.loon.lim <jit.loon.lim@intel.com> | Mon Sep 23 17:21:46 2024 +0200 |
| tree | 08154e46ab58fa234a1456e181427f4a21d36efc | |
| parent | 5431c7f28b9311b38e829c178422c1ce392c7567 [diff] |
fix(intel): bridge ack timing issue causing fpga config hung Increase the timeout of waiting for bridge ack to solve the fpga config hung. Change-Id: I967af02b336c296206b4947be718953ff8ca30cf Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>