1. 958a0b1 Rename Neoverse Zeus to Neoverse V1 by Jimmy Brisson · Wed Sep 30 15:28:03 2020 -0500
  2. 7cc90c4 Rename Cortex Hercules AE to Cortex 78 AE by Jimmy Brisson · Wed Sep 30 15:34:51 2020 -0500
  3. 3671d6f Merge "Workaround for Cortex A77 erratum 1508412" into integration by Madhukar Pappireddy · Tue Sep 29 18:43:00 2020 +0000
  4. e867a90 Merge changes I1ecbe5a1,Ib5945c37,Ic6b79648 into integration by Manish Pandey · Tue Sep 29 12:17:21 2020 +0000
  5. 9b4e3d7 lib/cpus: add support for Morello Rainier CPUs by Manoj Kumar · Thu Jul 09 09:56:02 2020 +0100
  6. 99ad976 Workaround for Cortex A77 erratum 1508412 by laurenw-arm · Tue Jul 14 14:18:34 2020 -0500
  7. e1ecd23 arm_fpga: Add support for unknown MPIDs by Javier Almansa Sobrino · Thu Aug 20 18:48:09 2020 +0100
  8. 2b010ea Merge "lib: cpu: Check SCU presence in DSU before accessing DSU registers" into integration by Manish Pandey · Thu Sep 03 21:16:17 2020 +0000
  9. f01ea60 lib: cpu: Check SCU presence in DSU before accessing DSU registers by Pramod Kumar · Wed Feb 05 11:27:57 2020 +0530
  10. 96e081d lib: cpus: denver: add MIDR PN9 variant by Hemant Nigam · Tue Dec 17 14:21:38 2019 -0800
  11. 5f68fa7 lib: cpus: denver: add some MIDR values by Alex Van Brunt · Tue Jul 23 10:00:42 2019 -0700
  12. eb8d429 Revert workaround for Neoverse N1 erratum 1800710 by johpow01 · Thu Jul 23 13:05:45 2020 -0500
  13. 6d9b5ee Workaround for Neoverse N1 erratum 1800710 by johpow01 · Tue Jun 02 13:14:11 2020 -0500
  14. 68aedc7 Workaround for Cortex A77 erratum 1800714 by johpow01 · Wed Jun 03 15:23:31 2020 -0500
  15. 5c9ed08 Workaround for Cortex A76 erratum 1800710 by johpow01 · Tue Jun 02 15:02:28 2020 -0500
  16. 9603f98 Workaround for Cortex A76 erratum 1791580 by johpow01 · Fri May 29 14:17:38 2020 -0500
  17. 3571fb9 Rename Cortex-Hercules to Cortex-A78 by Jimmy Brisson · Mon Jun 01 10:18:22 2020 -0500
  18. 7ec175e Rename Cortex Hercules Files to Cortex A78 by Jimmy Brisson · Mon Jun 01 16:49:34 2020 -0500
  19. f144157 Pass more -D options to BL*_CPPFLAGS instead of BL*_CFLAGS by Masahiro Yamada · Wed Apr 01 14:20:58 2020 +0900
  20. fcd1e88 Tegra194: enable dual execution for EL2 and EL3 by Kalyani Chidambaram · Wed Sep 12 14:59:08 2018 -0700
  21. 0fc5403 Merge "Add Matterhorn CPU lib" into integration by joanna.farley · Fri Feb 21 17:51:10 2020 +0000
  22. c9a45ed Merge "Add CPULib for Klein Core" into integration by joanna.farley · Fri Feb 21 17:50:01 2020 +0000
  23. 5ee3abc cpus: higher performance non-cacheable load forwarding by Varun Wadekar · Tue Jun 12 16:49:12 2018 -0700
  24. d904ac1 Add Matterhorn CPU lib by Jimmy Brisson · Wed Jan 08 13:52:51 2020 -0600
  25. 2463f9d Add CPULib for Klein Core by Jimmy Brisson · Mon Dec 09 14:02:22 2019 -0600
  26. 3880a36 Neovers N1: added support to update presence of External LLC by Manish Pandey · Fri Jan 24 11:54:44 2020 +0000
  27. c74aa31 Merge "Workaround for Hercules erratum 1688305" into integration by Manish Pandey · Mon Dec 30 15:52:32 2019 +0000
  28. 4efede7 Workaround for Hercules erratum 1688305 by Madhukar Pappireddy · Wed Dec 18 15:56:27 2019 -0600
  29. 9ab98aa lib: cpu: Add additional field definition for A72 L2 control by Sheetal Tigadoli · Fri Apr 12 15:28:44 2019 +0530
  30. b669361 Replace deprecated __ASSEMBLY__ macro with __ASSEMBLER__ by Balint Dobszay · Fri Oct 11 14:01:43 2019 +0200
  31. 2fbce24 Merge "Neoverse N1 Errata Workaround 1542419" into integration by Soby Mathew · Mon Oct 07 12:05:26 2019 +0000
  32. 94accd3 Neoverse N1 Errata Workaround 1542419 by laurenw-arm · Tue Aug 20 15:51:24 2019 -0500
  33. 584410e Introducing support for Cortex-A65AE by Imre Kis · Mon Jul 22 14:36:30 2019 +0200
  34. 05e4d22 Introducing support for Cortex-A65 by Imre Kis · Thu Jul 18 14:30:03 2019 +0200
  35. fea97f7 Cortex_hercules: Add support for Hercules-AE by Artsem Artsemenka · Mon Sep 16 15:11:21 2019 +0100
  36. a21d47e mediatek: mt8183: support CPU hotplug by developer · Thu May 02 19:29:25 2019 +0800
  37. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · Tue Jul 09 13:49:11 2019 -0700
  38. db2ec85 Enable AMU for Cortex-Hercules by Balint Dobszay · Mon Jul 15 11:46:20 2019 +0200
  39. f57f108 Cortex_hercules: Introduce preliminary cpu support by Louis Mayencourt · Tue May 14 11:00:45 2019 +0100
  40. cc94264 Rename Cortex-Deimos to Cortex-A77 by Balint Dobszay · Wed Jul 03 13:02:56 2019 +0200
  41. 00396bf Workaround for Neoverse N1 erratum 1262888 by lauwal01 · Mon Jun 24 11:47:30 2019 -0500
  42. 42771af Workaround for Neoverse N1 erratum 1262606 by lauwal01 · Mon Jun 24 11:44:58 2019 -0500
  43. 07c2a23 Workaround for Neoverse N1 erratum 1257314 by lauwal01 · Mon Jun 24 11:42:02 2019 -0500
  44. 197f14c Workaround for Neoverse N1 erratum 1220197 by lauwal01 · Mon Jun 24 11:38:53 2019 -0500
  45. e159044 Workaround for Neoverse N1 erratum 1207823 by lauwal01 · Mon Jun 24 11:35:37 2019 -0500
  46. f2adb13 Workaround for Neoverse N1 erratum 1165347 by lauwal01 · Mon Jun 24 11:32:40 2019 -0500
  47. 363ee3c Workaround for Neoverse N1 erratum 1130799 by lauwal01 · Mon Jun 24 11:28:34 2019 -0500
  48. bd555f4 Workaround for Neoverse N1 erratum 1073348 by lauwal01 · Mon Jun 24 11:23:50 2019 -0500
  49. b934740 Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703 by Andre Przywara · Mon May 20 14:57:06 2019 +0100
  50. b72fe7a Cortex-A55: workarounds for errata 1221012 by Ambroise Vincent · Tue May 28 09:52:48 2019 +0100
  51. 1d3ba1c Cortex-A76: workarounds for errata 1257314, 1262606, 1262888, 1275112 by Soby Mathew · Wed May 01 09:43:18 2019 +0100
  52. b58142b Neoverse N1: Forces cacheable atomic to near by Louis Mayencourt · Thu Apr 18 14:34:11 2019 +0100
  53. 4498b15 DSU: Implement workaround for errata 798953 by Louis Mayencourt · Tue Apr 09 16:29:01 2019 +0100
  54. 254f6f0 DSU: Small fix and reformat on errata framework by Louis Mayencourt · Tue Apr 09 14:11:06 2019 +0100
  55. 8a06127 Cortex-A35: Implement workaround for errata 855472 by Louis Mayencourt · Fri Apr 05 16:25:25 2019 +0100
  56. 1601a15 Merge "cpus: Fix Cortex-A12 MIDR mask" into integration by Antonio Niño Díaz · Tue Apr 09 10:50:52 2019 +0000
  57. 4800943 Add support for Cortex-A76AE CPU by Alexei Fedorov · Thu Apr 04 16:26:34 2019 +0100
  58. 68a8d2b cpus: Fix Cortex-A12 MIDR mask by Heiko Stuebner · Fri Apr 05 14:44:33 2019 +0200
  59. 987c20a Merge pull request #1894 from jts-arm/e1_midr by Soby Mathew · Mon Mar 18 16:15:12 2019 +0000
  60. a5447ec Fix wrong MIDR_EL1 value for Neoverse E1 by John Tsichritzis · Fri Mar 15 15:40:27 2019 +0000
  61. 6deaf9c Introduce preliminary support for Neoverse Zeus by John Tsichritzis · Mon Oct 08 17:09:43 2018 +0100
  62. 8cf9eef Cortex-A17: Implement workaround for errata 852421 by Ambroise Vincent · Thu Feb 28 16:23:53 2019 +0000
  63. 68b3812 Cortex-A15: Implement workaround for errata 827671 by Ambroise Vincent · Tue Mar 05 09:54:21 2019 +0000
  64. cd5a55e Merge pull request #1849 from loumay-arm/lm/a73_errata by Antonio Niño Díaz · Fri Mar 01 11:23:48 2019 +0000
  65. f6505a7 Merge pull request #1845 from ambroise-arm/av/errata by Antonio Niño Díaz · Fri Mar 01 09:17:27 2019 +0000
  66. d69722c Cortex-A73: Implement workaround for errata 852427 by Louis Mayencourt · Wed Feb 27 14:24:16 2019 +0000
  67. 1b0db76 Cortex-A57: Implement workaround for erratum 814670 by Ambroise Vincent · Thu Feb 21 16:35:07 2019 +0000
  68. 6a77f05 Cortex-A55: Implement workaround for erratum 798797 by Ambroise Vincent · Thu Feb 21 16:27:34 2019 +0000
  69. 6f31960 Cortex-A55: Implement workaround for erratum 778703 by Ambroise Vincent · Thu Feb 21 16:25:37 2019 +0000
  70. 7927fa0 Cortex-A55: Implement workaround for erratum 768277 by Ambroise Vincent · Thu Feb 21 16:20:43 2019 +0000
  71. 59fa218 Add workaround for errata 1073348 for Cortex-A76 by Louis Mayencourt · Mon Feb 25 15:17:44 2019 +0000
  72. adda9d4 Add workaround for errata 1220197 for Cortex-A76 by Louis Mayencourt · Mon Feb 25 11:37:38 2019 +0000
  73. 4405de6 Add workaround for errata 855423 of Cortex-A73 by Louis Mayencourt · Thu Feb 21 16:38:16 2019 +0000
  74. 947fea0 Merge pull request #1835 from jts-arm/rename by Antonio Niño Díaz · Fri Feb 22 13:05:37 2019 +0000
  75. 16e6d9f Rename Cortex-Helios to Neoverse E1 by John Tsichritzis · Tue Feb 19 14:01:55 2019 +0000
  76. 3d417ac Rename Cortex-Helios filenames to Neoverse E1 by John Tsichritzis · Tue Feb 19 13:54:21 2019 +0000
  77. 56369c1 Rename Cortex-Ares to Neoverse N1 by John Tsichritzis · Tue Feb 19 13:49:06 2019 +0000
  78. 97ff6d0 Rename Cortex-Ares filenames to Neoverse N1 by John Tsichritzis · Tue Feb 19 13:48:44 2019 +0000
  79. a904487 Update macro to check need for CVE-2017-5715 mitigation by Antonio Nino Diaz · Tue Feb 12 11:25:02 2019 +0000
  80. 5e79cfe cpus: Add casts to all definitions in CPU headers by Antonio Nino Diaz · Mon Feb 11 13:34:15 2019 +0000
  81. 96f1631 cpus: Fix some incorrect definitions in CPU headers by Antonio Nino Diaz · Mon Feb 11 13:34:54 2019 +0000
  82. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  83. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  84. 9fe40fd Fix MISRA defects in workaround and errata framework by Antonio Nino Diaz · Thu Oct 25 17:11:02 2018 +0100
  85. 033b4bb Fix MISRA defects in extension libs by Antonio Nino Diaz · Thu Oct 25 16:52:26 2018 +0100
  86. 0980dce Make errata reporting mandatory for CPU files by Soby Mathew · Mon Sep 17 04:34:35 2018 +0100
  87. b561536 plat/arm: relocate the jump_if_cpu_midr macro. by Deepak Pandey · Thu Oct 11 13:44:43 2018 +0530
  88. dc9fab1 Remove all other deprecated interfaces and files by Antonio Nino Diaz · Tue Sep 25 09:39:51 2018 +0100
  89. cd38e6e cpus: denver: Implement static workaround for CVE-2018-3639 by Varun Wadekar · Tue Aug 28 09:11:30 2018 -0700
  90. 2b91412 cpus: denver: reset power state to 'C1' on boot by Varun Wadekar · Mon Jun 25 11:36:47 2018 -0700
  91. 4daa1de DSU erratum 936184 workaround by John Tsichritzis · Mon Jul 23 09:11:59 2018 +0100
  92. f7f6041 Merge pull request #1450 from MISL-EBU-System-SW/marvell-support-v6 by danh-arm · Thu Jul 19 17:11:32 2018 +0100
  93. 9eb5cf4 lib: cpu: Add L2 cache aux control register definition to CA72 by Konstantin Porotchkin · Thu Jul 05 11:28:02 2018 +0300
  94. a7c4687 Add initial CPU support for Cortex-Helios by Joel Hutton · Wed Jan 10 16:06:07 2018 +0000
  95. 9463cae Add initial CPU support for Cortex-Deimos by Joel Hutton · Fri May 04 15:09:47 2018 +0100
  96. 26b8589 Remove integrity check in declare_cpu_ops_base by Roberto Vargas · Fri May 04 10:54:33 2018 +0100
  97. 67762d9 Remove .struct directive by Roberto Vargas · Tue May 01 09:54:54 2018 +0100
  98. 312e17e Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76 by Dimitris Papastamos · Wed May 16 09:59:54 2018 +0100
  99. 7ca21db Implement Cortex-Ares 1043202 erratum workaround by Dimitris Papastamos · Mon Mar 26 16:46:01 2018 +0100
  100. 89736dd Add AMU support for Cortex-Ares by Dimitris Papastamos · Tue Feb 13 11:28:02 2018 +0000