| commit | 9eb5cf4b9f1701eef1e2e0e1e2807184474718a4 | [log] [tgz] |
|---|---|---|
| author | Konstantin Porotchkin <kostap@marvell.com> | Thu Jul 05 11:28:02 2018 +0300 |
| committer | Konstantin Porotchkin <kostap@marvell.com> | Wed Jul 18 18:48:30 2018 +0300 |
| tree | 52dc5c19e397b7dcb4b94874c9e279d00b084585 | |
| parent | 01c84d40c26a5ad19f77333ee87202f0fc4b8f2d [diff] |
lib: cpu: Add L2 cache aux control register definition to CA72 Add definition of EL1 L2 Auxilary Control register to Cortex A72 library headers. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>