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09db921c39cedf4828451537653fbc1bf8555b55
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aarch64
c74aa31
Merge "Workaround for Hercules erratum 1688305" into integration
by Manish Pandey
· Mon Dec 30 15:52:32 2019 +0000
4efede7
Workaround for Hercules erratum 1688305
by Madhukar Pappireddy
· Wed Dec 18 15:56:27 2019 -0600
9ab98aa
lib: cpu: Add additional field definition for A72 L2 control
by Sheetal Tigadoli
· Fri Apr 12 15:28:44 2019 +0530
b669361
Replace deprecated __ASSEMBLY__ macro with __ASSEMBLER__
by Balint Dobszay
· Fri Oct 11 14:01:43 2019 +0200
2fbce24
Merge "Neoverse N1 Errata Workaround 1542419" into integration
by Soby Mathew
· Mon Oct 07 12:05:26 2019 +0000
94accd3
Neoverse N1 Errata Workaround 1542419
by laurenw-arm
· Tue Aug 20 15:51:24 2019 -0500
584410e
Introducing support for Cortex-A65AE
by Imre Kis
· Mon Jul 22 14:36:30 2019 +0200
05e4d22
Introducing support for Cortex-A65
by Imre Kis
· Thu Jul 18 14:30:03 2019 +0200
fea97f7
Cortex_hercules: Add support for Hercules-AE
by Artsem Artsemenka
· Mon Sep 16 15:11:21 2019 +0100
a21d47e
mediatek: mt8183: support CPU hotplug
by developer
· Thu May 02 19:29:25 2019 +0800
53456fc
Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
by Julius Werner
· Tue Jul 09 13:49:11 2019 -0700
db2ec85
Enable AMU for Cortex-Hercules
by Balint Dobszay
· Mon Jul 15 11:46:20 2019 +0200
f57f108
Cortex_hercules: Introduce preliminary cpu support
by Louis Mayencourt
· Tue May 14 11:00:45 2019 +0100
cc94264
Rename Cortex-Deimos to Cortex-A77
by Balint Dobszay
· Wed Jul 03 13:02:56 2019 +0200
00396bf
Workaround for Neoverse N1 erratum 1262888
by lauwal01
· Mon Jun 24 11:47:30 2019 -0500
42771af
Workaround for Neoverse N1 erratum 1262606
by lauwal01
· Mon Jun 24 11:44:58 2019 -0500
07c2a23
Workaround for Neoverse N1 erratum 1257314
by lauwal01
· Mon Jun 24 11:42:02 2019 -0500
197f14c
Workaround for Neoverse N1 erratum 1220197
by lauwal01
· Mon Jun 24 11:38:53 2019 -0500
e159044
Workaround for Neoverse N1 erratum 1207823
by lauwal01
· Mon Jun 24 11:35:37 2019 -0500
f2adb13
Workaround for Neoverse N1 erratum 1165347
by lauwal01
· Mon Jun 24 11:32:40 2019 -0500
363ee3c
Workaround for Neoverse N1 erratum 1130799
by lauwal01
· Mon Jun 24 11:28:34 2019 -0500
bd555f4
Workaround for Neoverse N1 erratum 1073348
by lauwal01
· Mon Jun 24 11:23:50 2019 -0500
b934740
Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703
by Andre Przywara
· Mon May 20 14:57:06 2019 +0100
b72fe7a
Cortex-A55: workarounds for errata 1221012
by Ambroise Vincent
· Tue May 28 09:52:48 2019 +0100
1d3ba1c
Cortex-A76: workarounds for errata 1257314, 1262606, 1262888, 1275112
by Soby Mathew
· Wed May 01 09:43:18 2019 +0100
b58142b
Neoverse N1: Forces cacheable atomic to near
by Louis Mayencourt
· Thu Apr 18 14:34:11 2019 +0100
4498b15
DSU: Implement workaround for errata 798953
by Louis Mayencourt
· Tue Apr 09 16:29:01 2019 +0100
254f6f0
DSU: Small fix and reformat on errata framework
by Louis Mayencourt
· Tue Apr 09 14:11:06 2019 +0100
8a06127
Cortex-A35: Implement workaround for errata 855472
by Louis Mayencourt
· Fri Apr 05 16:25:25 2019 +0100
4800943
Add support for Cortex-A76AE CPU
by Alexei Fedorov
· Thu Apr 04 16:26:34 2019 +0100
987c20a
Merge pull request #1894 from jts-arm/e1_midr
by Soby Mathew
· Mon Mar 18 16:15:12 2019 +0000
a5447ec
Fix wrong MIDR_EL1 value for Neoverse E1
by John Tsichritzis
· Fri Mar 15 15:40:27 2019 +0000
6deaf9c
Introduce preliminary support for Neoverse Zeus
by John Tsichritzis
· Mon Oct 08 17:09:43 2018 +0100
cd5a55e
Merge pull request #1849 from loumay-arm/lm/a73_errata
by Antonio Niño Díaz
· Fri Mar 01 11:23:48 2019 +0000
f6505a7
Merge pull request #1845 from ambroise-arm/av/errata
by Antonio Niño Díaz
· Fri Mar 01 09:17:27 2019 +0000
d69722c
Cortex-A73: Implement workaround for errata 852427
by Louis Mayencourt
· Wed Feb 27 14:24:16 2019 +0000
1b0db76
Cortex-A57: Implement workaround for erratum 814670
by Ambroise Vincent
· Thu Feb 21 16:35:07 2019 +0000
6a77f05
Cortex-A55: Implement workaround for erratum 798797
by Ambroise Vincent
· Thu Feb 21 16:27:34 2019 +0000
6f31960
Cortex-A55: Implement workaround for erratum 778703
by Ambroise Vincent
· Thu Feb 21 16:25:37 2019 +0000
7927fa0
Cortex-A55: Implement workaround for erratum 768277
by Ambroise Vincent
· Thu Feb 21 16:20:43 2019 +0000
59fa218
Add workaround for errata 1073348 for Cortex-A76
by Louis Mayencourt
· Mon Feb 25 15:17:44 2019 +0000
adda9d4
Add workaround for errata 1220197 for Cortex-A76
by Louis Mayencourt
· Mon Feb 25 11:37:38 2019 +0000
4405de6
Add workaround for errata 855423 of Cortex-A73
by Louis Mayencourt
· Thu Feb 21 16:38:16 2019 +0000
947fea0
Merge pull request #1835 from jts-arm/rename
by Antonio Niño Díaz
· Fri Feb 22 13:05:37 2019 +0000
16e6d9f
Rename Cortex-Helios to Neoverse E1
by John Tsichritzis
· Tue Feb 19 14:01:55 2019 +0000
3d417ac
Rename Cortex-Helios filenames to Neoverse E1
by John Tsichritzis
· Tue Feb 19 13:54:21 2019 +0000
56369c1
Rename Cortex-Ares to Neoverse N1
by John Tsichritzis
· Tue Feb 19 13:49:06 2019 +0000
97ff6d0
Rename Cortex-Ares filenames to Neoverse N1
by John Tsichritzis
· Tue Feb 19 13:48:44 2019 +0000
a904487
Update macro to check need for CVE-2017-5715 mitigation
by Antonio Nino Diaz
· Tue Feb 12 11:25:02 2019 +0000
5e79cfe
cpus: Add casts to all definitions in CPU headers
by Antonio Nino Diaz
· Mon Feb 11 13:34:15 2019 +0000
96f1631
cpus: Fix some incorrect definitions in CPU headers
by Antonio Nino Diaz
· Mon Feb 11 13:34:54 2019 +0000
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· Fri Dec 14 00:18:21 2018 +0000
5eb8837
Standardise header guards across codebase
by Antonio Nino Diaz
· Thu Nov 08 10:20:19 2018 +0000
9fe40fd
Fix MISRA defects in workaround and errata framework
by Antonio Nino Diaz
· Thu Oct 25 17:11:02 2018 +0100
033b4bb
Fix MISRA defects in extension libs
by Antonio Nino Diaz
· Thu Oct 25 16:52:26 2018 +0100
0980dce
Make errata reporting mandatory for CPU files
by Soby Mathew
· Mon Sep 17 04:34:35 2018 +0100
b561536
plat/arm: relocate the jump_if_cpu_midr macro.
by Deepak Pandey
· Thu Oct 11 13:44:43 2018 +0530
dc9fab1
Remove all other deprecated interfaces and files
by Antonio Nino Diaz
· Tue Sep 25 09:39:51 2018 +0100
cd38e6e
cpus: denver: Implement static workaround for CVE-2018-3639
by Varun Wadekar
· Tue Aug 28 09:11:30 2018 -0700
2b91412
cpus: denver: reset power state to 'C1' on boot
by Varun Wadekar
· Mon Jun 25 11:36:47 2018 -0700
4daa1de
DSU erratum 936184 workaround
by John Tsichritzis
· Mon Jul 23 09:11:59 2018 +0100
f7f6041
Merge pull request #1450 from MISL-EBU-System-SW/marvell-support-v6
by danh-arm
· Thu Jul 19 17:11:32 2018 +0100
9eb5cf4
lib: cpu: Add L2 cache aux control register definition to CA72
by Konstantin Porotchkin
· Thu Jul 05 11:28:02 2018 +0300
a7c4687
Add initial CPU support for Cortex-Helios
by Joel Hutton
· Wed Jan 10 16:06:07 2018 +0000
9463cae
Add initial CPU support for Cortex-Deimos
by Joel Hutton
· Fri May 04 15:09:47 2018 +0100
26b8589
Remove integrity check in declare_cpu_ops_base
by Roberto Vargas
· Fri May 04 10:54:33 2018 +0100
67762d9
Remove .struct directive
by Roberto Vargas
· Tue May 01 09:54:54 2018 +0100
312e17e
Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76
by Dimitris Papastamos
· Wed May 16 09:59:54 2018 +0100
7ca21db
Implement Cortex-Ares 1043202 erratum workaround
by Dimitris Papastamos
· Mon Mar 26 16:46:01 2018 +0100
89736dd
Add AMU support for Cortex-Ares
by Dimitris Papastamos
· Tue Feb 13 11:28:02 2018 +0000
ea84d6b
Add support for Cortex-Ares and Cortex-A76 CPUs
by Isla Mitchell
· Thu Aug 03 16:04:46 2017 +0100
ba51d9e
Add support for dynamic mitigation for CVE-2018-3639
by Dimitris Papastamos
· Wed May 16 11:36:14 2018 +0100
e6625ec
Implement static workaround for CVE-2018-3639
by Dimitris Papastamos
· Thu Apr 05 14:38:26 2018 +0100
efb1f33
Check presence of fix for errata 843419 in Cortex-A53
by Jonathan Wright
· Wed Mar 28 15:52:03 2018 +0100
914757c
Fixup `SMCCC_ARCH_FEATURES` semantics
by Dimitris Papastamos
· Mon Mar 12 14:47:09 2018 +0000
780cc95
Use PFR0 to identify need for mitigation of CVE-2017-5715
by Dimitris Papastamos
· Mon Mar 12 13:27:02 2018 +0000
864364a
MISRA fixes for Cortex A75 AMU implementation
by Dimitris Papastamos
· Tue Feb 27 10:55:39 2018 +0000
1be747f
Refactor AMU support for Cortex A75
by Dimitris Papastamos
· Wed Feb 14 10:28:36 2018 +0000
0b00f8a
Factor out CPU AMU helpers
by Dimitris Papastamos
· Wed Feb 14 10:00:06 2018 +0000
b5d1f8e
Merge pull request #1200 from robertovargas-arm/bl2-el3
by davidcunado-arm
· Fri Jan 19 13:40:12 2018 +0000
e0e9946
bl2-el3: Add BL2_EL3 image
by Roberto Vargas
· Mon Oct 30 14:43:43 2017 +0000
d7e2e9e
Add hooks to save/restore AMU context for Cortex A75
by Dimitris Papastamos
· Mon Dec 11 11:45:35 2017 +0000
fcedb69
Implement support for the Activity Monitor Unit on Cortex A75
by Dimitris Papastamos
· Mon Oct 16 11:40:10 2017 +0100
c3b4ca1
Cortex-A72: Implement workaround for erratum 859971
by Eleanor Bonnici
· Wed Aug 02 18:33:41 2017 +0100
0c9bd27
Cortex-A57: Implement workaround for erratum 859972
by Eleanor Bonnici
· Wed Aug 02 16:35:04 2017 +0100
41b61be
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· Wed Aug 09 16:42:40 2017 +0100
b83e42b
CPU: Make shifted constants unsigned
by Eleanor Bonnici
· Wed Aug 09 10:36:08 2017 +0100
c6a11f6
include: add U()/ULL() macros for constants
by Varun Wadekar
· Thu May 25 18:04:48 2017 -0700
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· Mon Jun 05 14:54:46 2017 -0700
805c2c7
Add support for Cortex-A75 and Cortex-A55 CPUs
by David Wang
· Wed Nov 09 16:29:02 2016 +0000
9326b90
Cortex-A53: add some bit definitions
by Haojian Zhuang
· Wed May 24 08:48:57 2017 +0800
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
00eefd9
Add workaround for ARM Cortex-A53 erratum 855873
by Andre Przywara
· Thu Oct 06 16:54:53 2016 +0100
69ce101
Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
by Varun Wadekar
· Thu May 12 13:43:33 2016 -0700
d43583c
cpus: denver: disable DCO operations from platform code
by Varun Wadekar
· Mon Feb 22 11:09:41 2016 -0800
3c337a6
cpus: Add support for all Denver variants
by Varun Wadekar
· Thu Sep 03 17:15:06 2015 +0530
d5ec367
Report errata workaround status to console
by Jeenu Viswambharan
· Tue Jan 03 11:01:51 2017 +0000
441bfdd
Use #ifdef for IMAGE_BL* instead of #if
by Masahiro Yamada
· Sun Dec 25 23:36:24 2016 +0900
ee5eb80
Add provision to extend CPU operations at more levels
by Jeenu Viswambharan
· Fri Nov 18 12:58:28 2016 +0000
6a72a91
bl31: Add error reporting registers
by Naga Sureshkumar Relli
· Fri Jul 01 12:52:41 2016 +0530
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