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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
34#include <string.h>
Dan Handley714a0d22014-04-09 13:13:04 +010035#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010036
Andrew Thoelke2bc07852014-06-09 12:44:21 +010037typedef int (*afflvl_off_handler_t)(aff_map_node_t *);
Achin Gupta4f6ad662013-10-25 09:08:21 +010038
39/*******************************************************************************
40 * The next three functions implement a handler for each supported affinity
41 * level which is called when that affinity level is turned off.
42 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +010043static int psci_afflvl0_off(aff_map_node_t *cpu_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010044{
Andrew Thoelke4e126072014-06-04 21:10:52 +010045 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +010046
47 assert(cpu_node->level == MPIDR_AFFLVL0);
48
49 /*
Achin Gupta607084e2014-02-09 18:24:19 +000050 * Generic management: Get the index for clearing any lingering re-entry
51 * information and allow the secure world to switch itself off
52 */
53
54 /*
55 * Call the cpu off handler registered by the Secure Payload Dispatcher
56 * to let it do any bookeeping. Assume that the SPD always reports an
57 * E_DENIED error if SP refuse to power down
Achin Gupta4f6ad662013-10-25 09:08:21 +010058 */
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000059 if (psci_spd_pm && psci_spd_pm->svc_off) {
60 rc = psci_spd_pm->svc_off(0);
Achin Gupta607084e2014-02-09 18:24:19 +000061 if (rc)
62 return rc;
63 }
64
Achin Gupta4f6ad662013-10-25 09:08:21 +010065 /*
66 * Arch. management. Perform the necessary steps to flush all
67 * cpu caches.
Achin Gupta4f6ad662013-10-25 09:08:21 +010068 */
Achin Guptae1aa5162014-06-26 09:58:52 +010069 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL0);
Achin Gupta4f6ad662013-10-25 09:08:21 +010070
Achin Gupta56bcdc22014-07-28 00:15:23 +010071 if (!psci_plat_pm_ops->affinst_off)
72 return PSCI_E_SUCCESS;
73
Achin Gupta4f6ad662013-10-25 09:08:21 +010074 /*
75 * Plat. management: Perform platform specific actions to turn this
76 * cpu off e.g. exit cpu coherency, program the power controller etc.
77 */
Achin Gupta56bcdc22014-07-28 00:15:23 +010078 return psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
79 cpu_node->level,
80 psci_get_phys_state(cpu_node));
Achin Gupta4f6ad662013-10-25 09:08:21 +010081}
82
Andrew Thoelke2bc07852014-06-09 12:44:21 +010083static int psci_afflvl1_off(aff_map_node_t *cluster_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010084{
Achin Gupta4f6ad662013-10-25 09:08:21 +010085 /* Sanity check the cluster level */
86 assert(cluster_node->level == MPIDR_AFFLVL1);
87
88 /*
Achin Gupta4f6ad662013-10-25 09:08:21 +010089 * Arch. Management. Flush all levels of caches to PoC if
Achin Guptaf6b9e992014-07-31 11:19:11 +010090 * the cluster is to be shutdown.
Achin Gupta4f6ad662013-10-25 09:08:21 +010091 */
Achin Guptaf6b9e992014-07-31 11:19:11 +010092 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL1);
Achin Gupta4f6ad662013-10-25 09:08:21 +010093
Achin Gupta56bcdc22014-07-28 00:15:23 +010094 if (!psci_plat_pm_ops->affinst_off)
95 return PSCI_E_SUCCESS;
96
Achin Gupta4f6ad662013-10-25 09:08:21 +010097 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +000098 * Plat. Management. Allow the platform to do its cluster
Achin Gupta4f6ad662013-10-25 09:08:21 +010099 * specific bookeeping e.g. turn off interconnect coherency,
100 * program the power controller etc.
101 */
Achin Gupta56bcdc22014-07-28 00:15:23 +0100102 return psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
103 cluster_node->level,
104 psci_get_phys_state(cluster_node));
Achin Gupta4f6ad662013-10-25 09:08:21 +0100105}
106
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100107static int psci_afflvl2_off(aff_map_node_t *system_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100108{
Achin Gupta4f6ad662013-10-25 09:08:21 +0100109 /* Cannot go beyond this level */
110 assert(system_node->level == MPIDR_AFFLVL2);
111
112 /*
113 * Keep the physical state of the system handy to decide what
114 * action needs to be taken
115 */
Achin Gupta4f6ad662013-10-25 09:08:21 +0100116
Achin Guptaf6b9e992014-07-31 11:19:11 +0100117 /*
118 * Arch. Management. Flush all levels of caches to PoC if
119 * the system is to be shutdown.
120 */
121 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL2);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100122
Achin Gupta56bcdc22014-07-28 00:15:23 +0100123 if (!psci_plat_pm_ops->affinst_off)
124 return PSCI_E_SUCCESS;
125
Achin Gupta4f6ad662013-10-25 09:08:21 +0100126 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000127 * Plat. Management : Allow the platform to do its bookeeping
Achin Gupta4f6ad662013-10-25 09:08:21 +0100128 * at this affinity level
129 */
Achin Gupta56bcdc22014-07-28 00:15:23 +0100130 return psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
131 system_node->level,
132 psci_get_phys_state(system_node));
Achin Gupta4f6ad662013-10-25 09:08:21 +0100133}
134
Dan Handleye2712bc2014-04-10 15:37:22 +0100135static const afflvl_off_handler_t psci_afflvl_off_handlers[] = {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100136 psci_afflvl0_off,
137 psci_afflvl1_off,
138 psci_afflvl2_off,
139};
140
141/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000142 * This function takes an array of pointers to affinity instance nodes in the
143 * topology tree and calls the off handler for the corresponding affinity
144 * levels
145 ******************************************************************************/
Achin Gupta56bcdc22014-07-28 00:15:23 +0100146static int psci_call_off_handlers(aff_map_node_t *mpidr_nodes[],
Achin Gupta0959db52013-12-02 17:33:04 +0000147 int start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100148 int end_afflvl)
Achin Gupta0959db52013-12-02 17:33:04 +0000149{
150 int rc = PSCI_E_INVALID_PARAMS, level;
Dan Handleye2712bc2014-04-10 15:37:22 +0100151 aff_map_node_t *node;
Achin Gupta0959db52013-12-02 17:33:04 +0000152
153 for (level = start_afflvl; level <= end_afflvl; level++) {
154 node = mpidr_nodes[level];
155 if (node == NULL)
156 continue;
157
158 /*
159 * TODO: In case of an error should there be a way
160 * of restoring what we might have torn down at
161 * lower affinity levels.
162 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100163 rc = psci_afflvl_off_handlers[level](node);
Achin Gupta0959db52013-12-02 17:33:04 +0000164 if (rc != PSCI_E_SUCCESS)
165 break;
166 }
167
168 return rc;
169}
170
171/*******************************************************************************
172 * Top level handler which is called when a cpu wants to power itself down.
173 * It's assumed that along with turning the cpu off, higher affinity levels will
174 * be turned off as far as possible. It traverses through all the affinity
175 * levels performing generic, architectural, platform setup and state management
176 * e.g. for a cluster that's to be powered off, it will call the platform
177 * specific code which will disable coherency at the interconnect level if the
178 * cpu is the last in the cluster. For a cpu it could mean programming the power
179 * the power controller etc.
180 *
181 * The state of all the relevant affinity levels is changed prior to calling the
182 * affinity level specific handlers as their actions would depend upon the state
183 * the affinity level is about to enter.
184 *
185 * The affinity level specific handlers are called in ascending order i.e. from
186 * the lowest to the highest affinity level implemented by the platform because
187 * to turn off affinity level X it is neccesary to turn off affinity level X - 1
188 * first.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100189 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100190int psci_afflvl_off(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000191 int end_afflvl)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100192{
Achin Gupta0959db52013-12-02 17:33:04 +0000193 int rc = PSCI_E_SUCCESS;
Dan Handleye2712bc2014-04-10 15:37:22 +0100194 mpidr_aff_map_nodes_t mpidr_nodes;
Achin Guptaf6b9e992014-07-31 11:19:11 +0100195 unsigned int max_phys_off_afflvl;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100196
197 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000198 * Collect the pointers to the nodes in the topology tree for
199 * each affinity instance in the mpidr. If this function does
200 * not return successfully then either the mpidr or the affinity
201 * levels are incorrect. In either case, we cannot return back
202 * to the caller as it would not know what to do.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100203 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100204 rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
Achin Gupta0959db52013-12-02 17:33:04 +0000205 start_afflvl,
206 end_afflvl,
207 mpidr_nodes);
208 assert (rc == PSCI_E_SUCCESS);
209
Achin Gupta4f6ad662013-10-25 09:08:21 +0100210 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000211 * This function acquires the lock corresponding to each affinity
212 * level so that by the time all locks are taken, the system topology
213 * is snapshot and state management can be done safely.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100214 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100215 psci_acquire_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000216 end_afflvl,
217 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100218
Achin Guptacab78e42014-07-28 00:09:01 +0100219 /*
220 * This function updates the state of each affinity instance
221 * corresponding to the mpidr in the range of affinity levels
222 * specified.
223 */
224 psci_do_afflvl_state_mgmt(start_afflvl,
225 end_afflvl,
226 mpidr_nodes,
227 PSCI_STATE_OFF);
Achin Guptaf6b9e992014-07-31 11:19:11 +0100228
229 max_phys_off_afflvl = psci_find_max_phys_off_afflvl(start_afflvl,
230 end_afflvl,
231 mpidr_nodes);
232 assert(max_phys_off_afflvl != PSCI_INVALID_DATA);
233
234 /* Stash the highest affinity level that will enter the OFF state. */
235 psci_set_max_phys_off_afflvl(max_phys_off_afflvl);
236
Achin Gupta0959db52013-12-02 17:33:04 +0000237 /* Perform generic, architecture and platform specific handling */
238 rc = psci_call_off_handlers(mpidr_nodes,
239 start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100240 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100241
242 /*
Achin Guptaf6b9e992014-07-31 11:19:11 +0100243 * Invalidate the entry for the highest affinity level stashed earlier.
244 * This ensures that any reads of this variable outside the power
245 * up/down sequences return PSCI_INVALID_DATA.
246 *
247 */
248 psci_set_max_phys_off_afflvl(PSCI_INVALID_DATA);
249
250 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000251 * Release the locks corresponding to each affinity level in the
252 * reverse order to which they were acquired.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100253 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100254 psci_release_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000255 end_afflvl,
256 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100257
Achin Gupta4f6ad662013-10-25 09:08:21 +0100258 return rc;
259}