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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
34#include <string.h>
Dan Handley714a0d22014-04-09 13:13:04 +010035#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010036
Andrew Thoelke2bc07852014-06-09 12:44:21 +010037typedef int (*afflvl_off_handler_t)(aff_map_node_t *);
Achin Gupta4f6ad662013-10-25 09:08:21 +010038
39/*******************************************************************************
40 * The next three functions implement a handler for each supported affinity
41 * level which is called when that affinity level is turned off.
42 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +010043static int psci_afflvl0_off(aff_map_node_t *cpu_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010044{
Andrew Thoelke4e126072014-06-04 21:10:52 +010045 unsigned int plat_state;
46 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +010047
48 assert(cpu_node->level == MPIDR_AFFLVL0);
49
50 /*
Achin Gupta607084e2014-02-09 18:24:19 +000051 * Generic management: Get the index for clearing any lingering re-entry
52 * information and allow the secure world to switch itself off
53 */
54
55 /*
56 * Call the cpu off handler registered by the Secure Payload Dispatcher
57 * to let it do any bookeeping. Assume that the SPD always reports an
58 * E_DENIED error if SP refuse to power down
Achin Gupta4f6ad662013-10-25 09:08:21 +010059 */
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000060 if (psci_spd_pm && psci_spd_pm->svc_off) {
61 rc = psci_spd_pm->svc_off(0);
Achin Gupta607084e2014-02-09 18:24:19 +000062 if (rc)
63 return rc;
64 }
65
Achin Gupta4f6ad662013-10-25 09:08:21 +010066 /*
67 * Arch. management. Perform the necessary steps to flush all
68 * cpu caches.
Achin Gupta4f6ad662013-10-25 09:08:21 +010069 */
Achin Guptae1aa5162014-06-26 09:58:52 +010070 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL0);
Achin Gupta4f6ad662013-10-25 09:08:21 +010071
72 /*
73 * Plat. management: Perform platform specific actions to turn this
74 * cpu off e.g. exit cpu coherency, program the power controller etc.
75 */
Andrew Thoelke4e126072014-06-04 21:10:52 +010076 rc = PSCI_E_SUCCESS;
Achin Gupta4f6ad662013-10-25 09:08:21 +010077 if (psci_plat_pm_ops->affinst_off) {
78
79 /* Get the current physical state of this cpu */
Achin Gupta75f73672013-12-05 16:33:10 +000080 plat_state = psci_get_phys_state(cpu_node);
Andrew Thoelke2bc07852014-06-09 12:44:21 +010081 rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
Achin Gupta4f6ad662013-10-25 09:08:21 +010082 cpu_node->level,
83 plat_state);
84 }
85
Achin Gupta4f6ad662013-10-25 09:08:21 +010086 return rc;
87}
88
Andrew Thoelke2bc07852014-06-09 12:44:21 +010089static int psci_afflvl1_off(aff_map_node_t *cluster_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010090{
91 int rc = PSCI_E_SUCCESS;
92 unsigned int plat_state;
93
94 /* Sanity check the cluster level */
95 assert(cluster_node->level == MPIDR_AFFLVL1);
96
97 /*
98 * Keep the physical state of this cluster handy to decide
99 * what action needs to be taken
100 */
Achin Gupta75f73672013-12-05 16:33:10 +0000101 plat_state = psci_get_phys_state(cluster_node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100102
103 /*
104 * Arch. Management. Flush all levels of caches to PoC if
105 * the cluster is to be shutdown
106 */
107 if (plat_state == PSCI_STATE_OFF)
108 dcsw_op_all(DCCISW);
109
110 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000111 * Plat. Management. Allow the platform to do its cluster
Achin Gupta4f6ad662013-10-25 09:08:21 +0100112 * specific bookeeping e.g. turn off interconnect coherency,
113 * program the power controller etc.
114 */
115 if (psci_plat_pm_ops->affinst_off)
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100116 rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
Achin Gupta4f6ad662013-10-25 09:08:21 +0100117 cluster_node->level,
118 plat_state);
119
120 return rc;
121}
122
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100123static int psci_afflvl2_off(aff_map_node_t *system_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100124{
125 int rc = PSCI_E_SUCCESS;
126 unsigned int plat_state;
127
128 /* Cannot go beyond this level */
129 assert(system_node->level == MPIDR_AFFLVL2);
130
131 /*
132 * Keep the physical state of the system handy to decide what
133 * action needs to be taken
134 */
Achin Gupta75f73672013-12-05 16:33:10 +0000135 plat_state = psci_get_phys_state(system_node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100136
137 /* No arch. and generic bookeeping to do here currently */
138
139 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000140 * Plat. Management : Allow the platform to do its bookeeping
Achin Gupta4f6ad662013-10-25 09:08:21 +0100141 * at this affinity level
142 */
143 if (psci_plat_pm_ops->affinst_off)
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100144 rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
Achin Gupta4f6ad662013-10-25 09:08:21 +0100145 system_node->level,
146 plat_state);
147 return rc;
148}
149
Dan Handleye2712bc2014-04-10 15:37:22 +0100150static const afflvl_off_handler_t psci_afflvl_off_handlers[] = {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100151 psci_afflvl0_off,
152 psci_afflvl1_off,
153 psci_afflvl2_off,
154};
155
156/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000157 * This function takes an array of pointers to affinity instance nodes in the
158 * topology tree and calls the off handler for the corresponding affinity
159 * levels
160 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100161static int psci_call_off_handlers(mpidr_aff_map_nodes_t mpidr_nodes,
Achin Gupta0959db52013-12-02 17:33:04 +0000162 int start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100163 int end_afflvl)
Achin Gupta0959db52013-12-02 17:33:04 +0000164{
165 int rc = PSCI_E_INVALID_PARAMS, level;
Dan Handleye2712bc2014-04-10 15:37:22 +0100166 aff_map_node_t *node;
Achin Gupta0959db52013-12-02 17:33:04 +0000167
168 for (level = start_afflvl; level <= end_afflvl; level++) {
169 node = mpidr_nodes[level];
170 if (node == NULL)
171 continue;
172
173 /*
174 * TODO: In case of an error should there be a way
175 * of restoring what we might have torn down at
176 * lower affinity levels.
177 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100178 rc = psci_afflvl_off_handlers[level](node);
Achin Gupta0959db52013-12-02 17:33:04 +0000179 if (rc != PSCI_E_SUCCESS)
180 break;
181 }
182
183 return rc;
184}
185
186/*******************************************************************************
187 * Top level handler which is called when a cpu wants to power itself down.
188 * It's assumed that along with turning the cpu off, higher affinity levels will
189 * be turned off as far as possible. It traverses through all the affinity
190 * levels performing generic, architectural, platform setup and state management
191 * e.g. for a cluster that's to be powered off, it will call the platform
192 * specific code which will disable coherency at the interconnect level if the
193 * cpu is the last in the cluster. For a cpu it could mean programming the power
194 * the power controller etc.
195 *
196 * The state of all the relevant affinity levels is changed prior to calling the
197 * affinity level specific handlers as their actions would depend upon the state
198 * the affinity level is about to enter.
199 *
200 * The affinity level specific handlers are called in ascending order i.e. from
201 * the lowest to the highest affinity level implemented by the platform because
202 * to turn off affinity level X it is neccesary to turn off affinity level X - 1
203 * first.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100204 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100205int psci_afflvl_off(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000206 int end_afflvl)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100207{
Achin Gupta0959db52013-12-02 17:33:04 +0000208 int rc = PSCI_E_SUCCESS;
Dan Handleye2712bc2014-04-10 15:37:22 +0100209 mpidr_aff_map_nodes_t mpidr_nodes;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100210
Achin Gupta4f6ad662013-10-25 09:08:21 +0100211
212 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000213 * Collect the pointers to the nodes in the topology tree for
214 * each affinity instance in the mpidr. If this function does
215 * not return successfully then either the mpidr or the affinity
216 * levels are incorrect. In either case, we cannot return back
217 * to the caller as it would not know what to do.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100218 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100219 rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
Achin Gupta0959db52013-12-02 17:33:04 +0000220 start_afflvl,
221 end_afflvl,
222 mpidr_nodes);
223 assert (rc == PSCI_E_SUCCESS);
224
Achin Gupta4f6ad662013-10-25 09:08:21 +0100225 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000226 * This function acquires the lock corresponding to each affinity
227 * level so that by the time all locks are taken, the system topology
228 * is snapshot and state management can be done safely.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100229 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100230 psci_acquire_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000231 end_afflvl,
232 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100233
Achin Guptacab78e42014-07-28 00:09:01 +0100234 /*
235 * This function updates the state of each affinity instance
236 * corresponding to the mpidr in the range of affinity levels
237 * specified.
238 */
239 psci_do_afflvl_state_mgmt(start_afflvl,
240 end_afflvl,
241 mpidr_nodes,
242 PSCI_STATE_OFF);
Achin Gupta0959db52013-12-02 17:33:04 +0000243 /* Perform generic, architecture and platform specific handling */
244 rc = psci_call_off_handlers(mpidr_nodes,
245 start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100246 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100247
248 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000249 * Release the locks corresponding to each affinity level in the
250 * reverse order to which they were acquired.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100251 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100252 psci_release_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000253 end_afflvl,
254 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100255
Achin Gupta4f6ad662013-10-25 09:08:21 +0100256 return rc;
257}