blob: 231721e7179e3617165f24c8935eeb5225e046ee [file] [log] [blame]
Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
34#include <string.h>
Dan Handley714a0d22014-04-09 13:13:04 +010035#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010036
Andrew Thoelke2bc07852014-06-09 12:44:21 +010037typedef int (*afflvl_off_handler_t)(aff_map_node_t *);
Achin Gupta4f6ad662013-10-25 09:08:21 +010038
39/*******************************************************************************
40 * The next three functions implement a handler for each supported affinity
41 * level which is called when that affinity level is turned off.
42 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +010043static int psci_afflvl0_off(aff_map_node_t *cpu_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010044{
Andrew Thoelke4e126072014-06-04 21:10:52 +010045 unsigned int plat_state;
46 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +010047
48 assert(cpu_node->level == MPIDR_AFFLVL0);
49
50 /*
Achin Gupta607084e2014-02-09 18:24:19 +000051 * Generic management: Get the index for clearing any lingering re-entry
52 * information and allow the secure world to switch itself off
53 */
54
55 /*
56 * Call the cpu off handler registered by the Secure Payload Dispatcher
57 * to let it do any bookeeping. Assume that the SPD always reports an
58 * E_DENIED error if SP refuse to power down
Achin Gupta4f6ad662013-10-25 09:08:21 +010059 */
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000060 if (psci_spd_pm && psci_spd_pm->svc_off) {
61 rc = psci_spd_pm->svc_off(0);
Achin Gupta607084e2014-02-09 18:24:19 +000062 if (rc)
63 return rc;
64 }
65
Achin Gupta4f6ad662013-10-25 09:08:21 +010066 /*
67 * Arch. management. Perform the necessary steps to flush all
68 * cpu caches.
Achin Gupta4f6ad662013-10-25 09:08:21 +010069 */
Achin Guptae1aa5162014-06-26 09:58:52 +010070 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL0);
Achin Gupta4f6ad662013-10-25 09:08:21 +010071
72 /*
73 * Plat. management: Perform platform specific actions to turn this
74 * cpu off e.g. exit cpu coherency, program the power controller etc.
75 */
Andrew Thoelke4e126072014-06-04 21:10:52 +010076 rc = PSCI_E_SUCCESS;
Achin Gupta4f6ad662013-10-25 09:08:21 +010077 if (psci_plat_pm_ops->affinst_off) {
78
79 /* Get the current physical state of this cpu */
Achin Gupta75f73672013-12-05 16:33:10 +000080 plat_state = psci_get_phys_state(cpu_node);
Andrew Thoelke2bc07852014-06-09 12:44:21 +010081 rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
Achin Gupta4f6ad662013-10-25 09:08:21 +010082 cpu_node->level,
83 plat_state);
84 }
85
Achin Gupta4f6ad662013-10-25 09:08:21 +010086 return rc;
87}
88
Andrew Thoelke2bc07852014-06-09 12:44:21 +010089static int psci_afflvl1_off(aff_map_node_t *cluster_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010090{
91 int rc = PSCI_E_SUCCESS;
92 unsigned int plat_state;
93
94 /* Sanity check the cluster level */
95 assert(cluster_node->level == MPIDR_AFFLVL1);
96
97 /*
98 * Keep the physical state of this cluster handy to decide
99 * what action needs to be taken
100 */
Achin Gupta75f73672013-12-05 16:33:10 +0000101 plat_state = psci_get_phys_state(cluster_node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100102
103 /*
104 * Arch. Management. Flush all levels of caches to PoC if
Achin Guptaf6b9e992014-07-31 11:19:11 +0100105 * the cluster is to be shutdown.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100106 */
Achin Guptaf6b9e992014-07-31 11:19:11 +0100107 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL1);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100108
109 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000110 * Plat. Management. Allow the platform to do its cluster
Achin Gupta4f6ad662013-10-25 09:08:21 +0100111 * specific bookeeping e.g. turn off interconnect coherency,
112 * program the power controller etc.
113 */
114 if (psci_plat_pm_ops->affinst_off)
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100115 rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
Achin Gupta4f6ad662013-10-25 09:08:21 +0100116 cluster_node->level,
117 plat_state);
118
119 return rc;
120}
121
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100122static int psci_afflvl2_off(aff_map_node_t *system_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100123{
124 int rc = PSCI_E_SUCCESS;
125 unsigned int plat_state;
126
127 /* Cannot go beyond this level */
128 assert(system_node->level == MPIDR_AFFLVL2);
129
130 /*
131 * Keep the physical state of the system handy to decide what
132 * action needs to be taken
133 */
Achin Gupta75f73672013-12-05 16:33:10 +0000134 plat_state = psci_get_phys_state(system_node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100135
Achin Guptaf6b9e992014-07-31 11:19:11 +0100136 /*
137 * Arch. Management. Flush all levels of caches to PoC if
138 * the system is to be shutdown.
139 */
140 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL2);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100141
142 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000143 * Plat. Management : Allow the platform to do its bookeeping
Achin Gupta4f6ad662013-10-25 09:08:21 +0100144 * at this affinity level
145 */
146 if (psci_plat_pm_ops->affinst_off)
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100147 rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
Achin Gupta4f6ad662013-10-25 09:08:21 +0100148 system_node->level,
149 plat_state);
150 return rc;
151}
152
Dan Handleye2712bc2014-04-10 15:37:22 +0100153static const afflvl_off_handler_t psci_afflvl_off_handlers[] = {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100154 psci_afflvl0_off,
155 psci_afflvl1_off,
156 psci_afflvl2_off,
157};
158
159/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000160 * This function takes an array of pointers to affinity instance nodes in the
161 * topology tree and calls the off handler for the corresponding affinity
162 * levels
163 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100164static int psci_call_off_handlers(mpidr_aff_map_nodes_t mpidr_nodes,
Achin Gupta0959db52013-12-02 17:33:04 +0000165 int start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100166 int end_afflvl)
Achin Gupta0959db52013-12-02 17:33:04 +0000167{
168 int rc = PSCI_E_INVALID_PARAMS, level;
Dan Handleye2712bc2014-04-10 15:37:22 +0100169 aff_map_node_t *node;
Achin Gupta0959db52013-12-02 17:33:04 +0000170
171 for (level = start_afflvl; level <= end_afflvl; level++) {
172 node = mpidr_nodes[level];
173 if (node == NULL)
174 continue;
175
176 /*
177 * TODO: In case of an error should there be a way
178 * of restoring what we might have torn down at
179 * lower affinity levels.
180 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100181 rc = psci_afflvl_off_handlers[level](node);
Achin Gupta0959db52013-12-02 17:33:04 +0000182 if (rc != PSCI_E_SUCCESS)
183 break;
184 }
185
186 return rc;
187}
188
189/*******************************************************************************
190 * Top level handler which is called when a cpu wants to power itself down.
191 * It's assumed that along with turning the cpu off, higher affinity levels will
192 * be turned off as far as possible. It traverses through all the affinity
193 * levels performing generic, architectural, platform setup and state management
194 * e.g. for a cluster that's to be powered off, it will call the platform
195 * specific code which will disable coherency at the interconnect level if the
196 * cpu is the last in the cluster. For a cpu it could mean programming the power
197 * the power controller etc.
198 *
199 * The state of all the relevant affinity levels is changed prior to calling the
200 * affinity level specific handlers as their actions would depend upon the state
201 * the affinity level is about to enter.
202 *
203 * The affinity level specific handlers are called in ascending order i.e. from
204 * the lowest to the highest affinity level implemented by the platform because
205 * to turn off affinity level X it is neccesary to turn off affinity level X - 1
206 * first.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100207 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100208int psci_afflvl_off(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000209 int end_afflvl)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100210{
Achin Gupta0959db52013-12-02 17:33:04 +0000211 int rc = PSCI_E_SUCCESS;
Dan Handleye2712bc2014-04-10 15:37:22 +0100212 mpidr_aff_map_nodes_t mpidr_nodes;
Achin Guptaf6b9e992014-07-31 11:19:11 +0100213 unsigned int max_phys_off_afflvl;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100214
215 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000216 * Collect the pointers to the nodes in the topology tree for
217 * each affinity instance in the mpidr. If this function does
218 * not return successfully then either the mpidr or the affinity
219 * levels are incorrect. In either case, we cannot return back
220 * to the caller as it would not know what to do.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100221 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100222 rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
Achin Gupta0959db52013-12-02 17:33:04 +0000223 start_afflvl,
224 end_afflvl,
225 mpidr_nodes);
226 assert (rc == PSCI_E_SUCCESS);
227
Achin Gupta4f6ad662013-10-25 09:08:21 +0100228 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000229 * This function acquires the lock corresponding to each affinity
230 * level so that by the time all locks are taken, the system topology
231 * is snapshot and state management can be done safely.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100232 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100233 psci_acquire_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000234 end_afflvl,
235 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100236
Achin Guptacab78e42014-07-28 00:09:01 +0100237 /*
238 * This function updates the state of each affinity instance
239 * corresponding to the mpidr in the range of affinity levels
240 * specified.
241 */
242 psci_do_afflvl_state_mgmt(start_afflvl,
243 end_afflvl,
244 mpidr_nodes,
245 PSCI_STATE_OFF);
Achin Guptaf6b9e992014-07-31 11:19:11 +0100246
247 max_phys_off_afflvl = psci_find_max_phys_off_afflvl(start_afflvl,
248 end_afflvl,
249 mpidr_nodes);
250 assert(max_phys_off_afflvl != PSCI_INVALID_DATA);
251
252 /* Stash the highest affinity level that will enter the OFF state. */
253 psci_set_max_phys_off_afflvl(max_phys_off_afflvl);
254
Achin Gupta0959db52013-12-02 17:33:04 +0000255 /* Perform generic, architecture and platform specific handling */
256 rc = psci_call_off_handlers(mpidr_nodes,
257 start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100258 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100259
260 /*
Achin Guptaf6b9e992014-07-31 11:19:11 +0100261 * Invalidate the entry for the highest affinity level stashed earlier.
262 * This ensures that any reads of this variable outside the power
263 * up/down sequences return PSCI_INVALID_DATA.
264 *
265 */
266 psci_set_max_phys_off_afflvl(PSCI_INVALID_DATA);
267
268 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000269 * Release the locks corresponding to each affinity level in the
270 * reverse order to which they were acquired.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100271 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100272 psci_release_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000273 end_afflvl,
274 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100275
Achin Gupta4f6ad662013-10-25 09:08:21 +0100276 return rc;
277}