Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 1 | /* |
Abdul Halim, Muhammad Hadi Asyrafi | 461f544 | 2020-07-03 13:22:09 +0800 | [diff] [blame] | 2 | * Copyright (c) 2019-2022, ARM Limited and Contributors. All rights reserved. |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | #include <common/debug.h> |
| 9 | #include <common/runtime_svc.h> |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 10 | #include <lib/mmio.h> |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 11 | #include <tools_share/uuid.h> |
| 12 | |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 13 | #include "socfpga_fcs.h" |
Hadi Asyrafi | 6f8a2b2 | 2019-10-23 18:34:14 +0800 | [diff] [blame] | 14 | #include "socfpga_mailbox.h" |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 15 | #include "socfpga_reset_manager.h" |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 16 | #include "socfpga_sip_svc.h" |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 17 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 18 | |
| 19 | /* Total buffer the driver can hold */ |
| 20 | #define FPGA_CONFIG_BUFFER_SIZE 4 |
| 21 | |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 22 | static int current_block, current_buffer; |
Abdul Halim, Muhammad Hadi Asyrafi | b251c33 | 2020-05-29 12:13:17 +0800 | [diff] [blame] | 23 | static int read_block, max_blocks; |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 24 | static uint32_t send_id, rcv_id; |
| 25 | static uint32_t bytes_per_block, blocks_submitted; |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 26 | static bool bridge_disable; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 27 | |
Sieu Mun Tang | e6d5de9 | 2022-04-28 22:21:01 +0800 | [diff] [blame] | 28 | /* RSU static variables */ |
Chee Hong Ang | 2cfd8ec | 2020-05-13 11:44:04 +0800 | [diff] [blame] | 29 | static uint32_t rsu_dcmf_ver[4] = {0}; |
| 30 | |
Chee Hong Ang | 681631b | 2020-07-01 14:22:25 +0800 | [diff] [blame] | 31 | /* RSU Max Retry */ |
| 32 | static uint32_t rsu_max_retry; |
Sieu Mun Tang | e6d5de9 | 2022-04-28 22:21:01 +0800 | [diff] [blame] | 33 | static uint16_t rsu_dcmf_stat[4] = {0}; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 34 | |
| 35 | /* SiP Service UUID */ |
| 36 | DEFINE_SVC_UUID2(intl_svc_uid, |
| 37 | 0xa85273b0, 0xe85a, 0x4862, 0xa6, 0x2a, |
| 38 | 0xfa, 0x88, 0x88, 0x17, 0x68, 0x81); |
| 39 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 40 | static uint64_t socfpga_sip_handler(uint32_t smc_fid, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 41 | uint64_t x1, |
| 42 | uint64_t x2, |
| 43 | uint64_t x3, |
| 44 | uint64_t x4, |
| 45 | void *cookie, |
| 46 | void *handle, |
| 47 | uint64_t flags) |
| 48 | { |
| 49 | ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); |
| 50 | SMC_RET1(handle, SMC_UNK); |
| 51 | } |
| 52 | |
| 53 | struct fpga_config_info fpga_config_buffers[FPGA_CONFIG_BUFFER_SIZE]; |
| 54 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 55 | static int intel_fpga_sdm_write_buffer(struct fpga_config_info *buffer) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 56 | { |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 57 | uint32_t args[3]; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 58 | |
| 59 | while (max_blocks > 0 && buffer->size > buffer->size_written) { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 60 | args[0] = (1<<8); |
| 61 | args[1] = buffer->addr + buffer->size_written; |
| 62 | if (buffer->size - buffer->size_written <= bytes_per_block) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 63 | args[2] = buffer->size - buffer->size_written; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 64 | current_buffer++; |
| 65 | current_buffer %= FPGA_CONFIG_BUFFER_SIZE; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 66 | } else |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 67 | args[2] = bytes_per_block; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 68 | |
| 69 | buffer->size_written += args[2]; |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 70 | mailbox_send_cmd_async(&send_id, MBOX_RECONFIG_DATA, args, |
Abdul Halim, Muhammad Hadi Asyrafi | 118ab21 | 2020-10-15 15:27:18 +0800 | [diff] [blame] | 71 | 3U, CMD_INDIRECT); |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 72 | |
| 73 | buffer->subblocks_sent++; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 74 | max_blocks--; |
| 75 | } |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 76 | |
| 77 | return !max_blocks; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 78 | } |
| 79 | |
| 80 | static int intel_fpga_sdm_write_all(void) |
| 81 | { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 82 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) |
| 83 | if (intel_fpga_sdm_write_buffer( |
| 84 | &fpga_config_buffers[current_buffer])) |
| 85 | break; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 86 | return 0; |
| 87 | } |
| 88 | |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 89 | static uint32_t intel_mailbox_fpga_config_isdone(uint32_t query_type) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 90 | { |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 91 | uint32_t ret; |
| 92 | |
Kris Chaplin | e768dfa | 2021-06-25 11:31:52 +0100 | [diff] [blame] | 93 | if (query_type == 1U) { |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 94 | ret = intel_mailbox_get_config_status(MBOX_CONFIG_STATUS, false); |
Kris Chaplin | e768dfa | 2021-06-25 11:31:52 +0100 | [diff] [blame] | 95 | } else { |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 96 | ret = intel_mailbox_get_config_status(MBOX_RECONFIG_STATUS, true); |
Kris Chaplin | e768dfa | 2021-06-25 11:31:52 +0100 | [diff] [blame] | 97 | } |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 98 | |
Abdul Halim, Muhammad Hadi Asyrafi | 959143d | 2020-12-29 16:49:23 +0800 | [diff] [blame] | 99 | if (ret != 0U) { |
Kris Chaplin | e768dfa | 2021-06-25 11:31:52 +0100 | [diff] [blame] | 100 | if (ret == MBOX_CFGSTAT_STATE_CONFIG) { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 101 | return INTEL_SIP_SMC_STATUS_BUSY; |
Kris Chaplin | e768dfa | 2021-06-25 11:31:52 +0100 | [diff] [blame] | 102 | } else { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 103 | return INTEL_SIP_SMC_STATUS_ERROR; |
Kris Chaplin | e768dfa | 2021-06-25 11:31:52 +0100 | [diff] [blame] | 104 | } |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 105 | } |
| 106 | |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 107 | if (bridge_disable) { |
| 108 | socfpga_bridges_enable(); /* Enable bridge */ |
| 109 | bridge_disable = false; |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 110 | } |
| 111 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 112 | return INTEL_SIP_SMC_STATUS_OK; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 113 | } |
| 114 | |
| 115 | static int mark_last_buffer_xfer_completed(uint32_t *buffer_addr_completed) |
| 116 | { |
| 117 | int i; |
| 118 | |
| 119 | for (i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
| 120 | if (fpga_config_buffers[i].block_number == current_block) { |
| 121 | fpga_config_buffers[i].subblocks_sent--; |
| 122 | if (fpga_config_buffers[i].subblocks_sent == 0 |
| 123 | && fpga_config_buffers[i].size <= |
| 124 | fpga_config_buffers[i].size_written) { |
| 125 | fpga_config_buffers[i].write_requested = 0; |
| 126 | current_block++; |
| 127 | *buffer_addr_completed = |
| 128 | fpga_config_buffers[i].addr; |
| 129 | return 0; |
| 130 | } |
| 131 | } |
| 132 | } |
| 133 | |
| 134 | return -1; |
| 135 | } |
| 136 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 137 | static int intel_fpga_config_completed_write(uint32_t *completed_addr, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 138 | uint32_t *count, uint32_t *job_id) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 139 | { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 140 | uint32_t resp[5]; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 141 | unsigned int resp_len = ARRAY_SIZE(resp); |
| 142 | int status = INTEL_SIP_SMC_STATUS_OK; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 143 | int all_completed = 1; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 144 | *count = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 145 | |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 146 | while (*count < 3) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 147 | |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 148 | status = mailbox_read_response(job_id, |
| 149 | resp, &resp_len); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 150 | |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 151 | if (status < 0) { |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 152 | break; |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 153 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 154 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 155 | max_blocks++; |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 156 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 157 | if (mark_last_buffer_xfer_completed( |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 158 | &completed_addr[*count]) == 0) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 159 | *count = *count + 1; |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 160 | } else { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 161 | break; |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 162 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 163 | } |
| 164 | |
| 165 | if (*count <= 0) { |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 166 | if (status != MBOX_NO_RESPONSE && |
| 167 | status != MBOX_TIMEOUT && resp_len != 0) { |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 168 | mailbox_clear_response(); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 169 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 170 | } |
| 171 | |
| 172 | *count = 0; |
| 173 | } |
| 174 | |
| 175 | intel_fpga_sdm_write_all(); |
| 176 | |
| 177 | if (*count > 0) |
| 178 | status = INTEL_SIP_SMC_STATUS_OK; |
| 179 | else if (*count == 0) |
| 180 | status = INTEL_SIP_SMC_STATUS_BUSY; |
| 181 | |
| 182 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
| 183 | if (fpga_config_buffers[i].write_requested != 0) { |
| 184 | all_completed = 0; |
| 185 | break; |
| 186 | } |
| 187 | } |
| 188 | |
| 189 | if (all_completed == 1) |
| 190 | return INTEL_SIP_SMC_STATUS_OK; |
| 191 | |
| 192 | return status; |
| 193 | } |
| 194 | |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 195 | static int intel_fpga_config_start(uint32_t flag) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 196 | { |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 197 | uint32_t argument = 0x1; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 198 | uint32_t response[3]; |
| 199 | int status = 0; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 200 | unsigned int size = 0; |
| 201 | unsigned int resp_len = ARRAY_SIZE(response); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 202 | |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 203 | if (!CONFIG_TEST_FLAG(flag, PARTIAL_CONFIG)) { |
| 204 | bridge_disable = true; |
Abdul Halim, Muhammad Hadi Asyrafi | b251c33 | 2020-05-29 12:13:17 +0800 | [diff] [blame] | 205 | } |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 206 | |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 207 | if (CONFIG_TEST_FLAG(flag, AUTHENTICATION)) { |
| 208 | size = 1; |
| 209 | bridge_disable = false; |
| 210 | } |
| 211 | |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 212 | mailbox_clear_response(); |
| 213 | |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 214 | mailbox_send_cmd(MBOX_JOB_ID, MBOX_CMD_CANCEL, NULL, 0U, |
| 215 | CMD_CASUAL, NULL, NULL); |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 216 | |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 217 | status = mailbox_send_cmd(MBOX_JOB_ID, MBOX_RECONFIG, &argument, size, |
| 218 | CMD_CASUAL, response, &resp_len); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 219 | |
Abdul Halim, Muhammad Hadi Asyrafi | fbc3913 | 2020-11-20 11:06:00 +0800 | [diff] [blame] | 220 | if (status < 0) { |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 221 | bridge_disable = false; |
Abdul Halim, Muhammad Hadi Asyrafi | fbc3913 | 2020-11-20 11:06:00 +0800 | [diff] [blame] | 222 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 223 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 224 | |
| 225 | max_blocks = response[0]; |
| 226 | bytes_per_block = response[1]; |
| 227 | |
| 228 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
| 229 | fpga_config_buffers[i].size = 0; |
| 230 | fpga_config_buffers[i].size_written = 0; |
| 231 | fpga_config_buffers[i].addr = 0; |
| 232 | fpga_config_buffers[i].write_requested = 0; |
| 233 | fpga_config_buffers[i].block_number = 0; |
| 234 | fpga_config_buffers[i].subblocks_sent = 0; |
| 235 | } |
| 236 | |
| 237 | blocks_submitted = 0; |
| 238 | current_block = 0; |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 239 | read_block = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 240 | current_buffer = 0; |
| 241 | |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 242 | /* Disable bridge on full reconfiguration */ |
| 243 | if (bridge_disable) { |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 244 | socfpga_bridges_disable(); |
| 245 | } |
| 246 | |
Abdul Halim, Muhammad Hadi Asyrafi | fbc3913 | 2020-11-20 11:06:00 +0800 | [diff] [blame] | 247 | return INTEL_SIP_SMC_STATUS_OK; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 248 | } |
| 249 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 250 | static bool is_fpga_config_buffer_full(void) |
| 251 | { |
| 252 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) |
| 253 | if (!fpga_config_buffers[i].write_requested) |
| 254 | return false; |
| 255 | return true; |
| 256 | } |
| 257 | |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 258 | bool is_address_in_ddr_range(uint64_t addr, uint64_t size) |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 259 | { |
Abdul Halim, Muhammad Hadi Asyrafi | 461f544 | 2020-07-03 13:22:09 +0800 | [diff] [blame] | 260 | if (!addr && !size) { |
| 261 | return true; |
| 262 | } |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 263 | if (size > (UINT64_MAX - addr)) |
| 264 | return false; |
Abdul Halim, Muhammad Hadi Asyrafi | e59b999 | 2020-02-11 20:17:05 +0800 | [diff] [blame] | 265 | if (addr < BL31_LIMIT) |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 266 | return false; |
| 267 | if (addr + size > DRAM_BASE + DRAM_SIZE) |
| 268 | return false; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 269 | |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 270 | return true; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 271 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 272 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 273 | static uint32_t intel_fpga_config_write(uint64_t mem, uint64_t size) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 274 | { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 275 | int i; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 276 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 277 | intel_fpga_sdm_write_all(); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 278 | |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 279 | if (!is_address_in_ddr_range(mem, size) || |
Abdul Halim, Muhammad Hadi Asyrafi | 351e884 | 2020-11-05 18:00:03 +0800 | [diff] [blame] | 280 | is_fpga_config_buffer_full()) { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 281 | return INTEL_SIP_SMC_STATUS_REJECTED; |
Abdul Halim, Muhammad Hadi Asyrafi | 351e884 | 2020-11-05 18:00:03 +0800 | [diff] [blame] | 282 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 283 | |
| 284 | for (i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 285 | int j = (i + current_buffer) % FPGA_CONFIG_BUFFER_SIZE; |
| 286 | |
| 287 | if (!fpga_config_buffers[j].write_requested) { |
| 288 | fpga_config_buffers[j].addr = mem; |
| 289 | fpga_config_buffers[j].size = size; |
| 290 | fpga_config_buffers[j].size_written = 0; |
| 291 | fpga_config_buffers[j].write_requested = 1; |
| 292 | fpga_config_buffers[j].block_number = |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 293 | blocks_submitted++; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 294 | fpga_config_buffers[j].subblocks_sent = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 295 | break; |
| 296 | } |
| 297 | } |
| 298 | |
Abdul Halim, Muhammad Hadi Asyrafi | 351e884 | 2020-11-05 18:00:03 +0800 | [diff] [blame] | 299 | if (is_fpga_config_buffer_full()) { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 300 | return INTEL_SIP_SMC_STATUS_BUSY; |
Abdul Halim, Muhammad Hadi Asyrafi | 351e884 | 2020-11-05 18:00:03 +0800 | [diff] [blame] | 301 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 302 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 303 | return INTEL_SIP_SMC_STATUS_OK; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 304 | } |
| 305 | |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 306 | static int is_out_of_sec_range(uint64_t reg_addr) |
| 307 | { |
Siew Chin Lim | 869d4f5 | 2021-05-11 21:12:22 +0800 | [diff] [blame] | 308 | #if DEBUG |
| 309 | return 0; |
| 310 | #endif |
| 311 | |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 312 | switch (reg_addr) { |
| 313 | case(0xF8011100): /* ECCCTRL1 */ |
| 314 | case(0xF8011104): /* ECCCTRL2 */ |
| 315 | case(0xF8011110): /* ERRINTEN */ |
| 316 | case(0xF8011114): /* ERRINTENS */ |
| 317 | case(0xF8011118): /* ERRINTENR */ |
| 318 | case(0xF801111C): /* INTMODE */ |
| 319 | case(0xF8011120): /* INTSTAT */ |
| 320 | case(0xF8011124): /* DIAGINTTEST */ |
| 321 | case(0xF801112C): /* DERRADDRA */ |
| 322 | case(0xFFD12028): /* SDMMCGRP_CTRL */ |
| 323 | case(0xFFD12044): /* EMAC0 */ |
| 324 | case(0xFFD12048): /* EMAC1 */ |
| 325 | case(0xFFD1204C): /* EMAC2 */ |
| 326 | case(0xFFD12090): /* ECC_INT_MASK_VALUE */ |
| 327 | case(0xFFD12094): /* ECC_INT_MASK_SET */ |
| 328 | case(0xFFD12098): /* ECC_INT_MASK_CLEAR */ |
| 329 | case(0xFFD1209C): /* ECC_INTSTATUS_SERR */ |
| 330 | case(0xFFD120A0): /* ECC_INTSTATUS_DERR */ |
| 331 | case(0xFFD120C0): /* NOC_TIMEOUT */ |
| 332 | case(0xFFD120C4): /* NOC_IDLEREQ_SET */ |
| 333 | case(0xFFD120C8): /* NOC_IDLEREQ_CLR */ |
| 334 | case(0xFFD120D0): /* NOC_IDLEACK */ |
| 335 | case(0xFFD120D4): /* NOC_IDLESTATUS */ |
| 336 | case(0xFFD12200): /* BOOT_SCRATCH_COLD0 */ |
| 337 | case(0xFFD12204): /* BOOT_SCRATCH_COLD1 */ |
| 338 | case(0xFFD12220): /* BOOT_SCRATCH_COLD8 */ |
| 339 | case(0xFFD12224): /* BOOT_SCRATCH_COLD9 */ |
| 340 | return 0; |
| 341 | |
| 342 | default: |
| 343 | break; |
| 344 | } |
| 345 | |
| 346 | return -1; |
| 347 | } |
| 348 | |
| 349 | /* Secure register access */ |
| 350 | uint32_t intel_secure_reg_read(uint64_t reg_addr, uint32_t *retval) |
| 351 | { |
| 352 | if (is_out_of_sec_range(reg_addr)) |
| 353 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 354 | |
| 355 | *retval = mmio_read_32(reg_addr); |
| 356 | |
| 357 | return INTEL_SIP_SMC_STATUS_OK; |
| 358 | } |
| 359 | |
| 360 | uint32_t intel_secure_reg_write(uint64_t reg_addr, uint32_t val, |
| 361 | uint32_t *retval) |
| 362 | { |
| 363 | if (is_out_of_sec_range(reg_addr)) |
| 364 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 365 | |
| 366 | mmio_write_32(reg_addr, val); |
| 367 | |
| 368 | return intel_secure_reg_read(reg_addr, retval); |
| 369 | } |
| 370 | |
| 371 | uint32_t intel_secure_reg_update(uint64_t reg_addr, uint32_t mask, |
| 372 | uint32_t val, uint32_t *retval) |
| 373 | { |
| 374 | if (!intel_secure_reg_read(reg_addr, retval)) { |
| 375 | *retval &= ~mask; |
Siew Chin Lim | a076315 | 2021-07-10 00:55:35 +0800 | [diff] [blame] | 376 | *retval |= val & mask; |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 377 | return intel_secure_reg_write(reg_addr, *retval, retval); |
| 378 | } |
| 379 | |
| 380 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 381 | } |
| 382 | |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 383 | /* Intel Remote System Update (RSU) services */ |
| 384 | uint64_t intel_rsu_update_address; |
| 385 | |
Abdul Halim, Muhammad Hadi Asyrafi | 118ab21 | 2020-10-15 15:27:18 +0800 | [diff] [blame] | 386 | static uint32_t intel_rsu_status(uint64_t *respbuf, unsigned int respbuf_sz) |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 387 | { |
| 388 | if (mailbox_rsu_status((uint32_t *)respbuf, respbuf_sz) < 0) |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 389 | return INTEL_SIP_SMC_RSU_ERROR; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 390 | |
| 391 | return INTEL_SIP_SMC_STATUS_OK; |
| 392 | } |
| 393 | |
| 394 | static uint32_t intel_rsu_update(uint64_t update_address) |
| 395 | { |
| 396 | intel_rsu_update_address = update_address; |
| 397 | return INTEL_SIP_SMC_STATUS_OK; |
| 398 | } |
| 399 | |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 400 | static uint32_t intel_rsu_notify(uint32_t execution_stage) |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 401 | { |
Abdul Halim, Muhammad Hadi Asyrafi | e59b999 | 2020-02-11 20:17:05 +0800 | [diff] [blame] | 402 | if (mailbox_hps_stage_notify(execution_stage) < 0) |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 403 | return INTEL_SIP_SMC_RSU_ERROR; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 404 | |
| 405 | return INTEL_SIP_SMC_STATUS_OK; |
| 406 | } |
| 407 | |
| 408 | static uint32_t intel_rsu_retry_counter(uint32_t *respbuf, uint32_t respbuf_sz, |
| 409 | uint32_t *ret_stat) |
| 410 | { |
| 411 | if (mailbox_rsu_status((uint32_t *)respbuf, respbuf_sz) < 0) |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 412 | return INTEL_SIP_SMC_RSU_ERROR; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 413 | |
| 414 | *ret_stat = respbuf[8]; |
| 415 | return INTEL_SIP_SMC_STATUS_OK; |
| 416 | } |
| 417 | |
Chee Hong Ang | 2cfd8ec | 2020-05-13 11:44:04 +0800 | [diff] [blame] | 418 | static uint32_t intel_rsu_copy_dcmf_version(uint64_t dcmf_ver_1_0, |
| 419 | uint64_t dcmf_ver_3_2) |
| 420 | { |
| 421 | rsu_dcmf_ver[0] = dcmf_ver_1_0; |
| 422 | rsu_dcmf_ver[1] = dcmf_ver_1_0 >> 32; |
| 423 | rsu_dcmf_ver[2] = dcmf_ver_3_2; |
| 424 | rsu_dcmf_ver[3] = dcmf_ver_3_2 >> 32; |
| 425 | |
| 426 | return INTEL_SIP_SMC_STATUS_OK; |
| 427 | } |
| 428 | |
Sieu Mun Tang | e6d5de9 | 2022-04-28 22:21:01 +0800 | [diff] [blame] | 429 | static uint32_t intel_rsu_copy_dcmf_status(uint64_t dcmf_stat) |
| 430 | { |
| 431 | rsu_dcmf_stat[0] = 0xFFFF & (dcmf_stat >> (0 * 16)); |
| 432 | rsu_dcmf_stat[1] = 0xFFFF & (dcmf_stat >> (1 * 16)); |
| 433 | rsu_dcmf_stat[2] = 0xFFFF & (dcmf_stat >> (2 * 16)); |
| 434 | rsu_dcmf_stat[3] = 0xFFFF & (dcmf_stat >> (3 * 16)); |
| 435 | |
| 436 | return INTEL_SIP_SMC_STATUS_OK; |
| 437 | } |
| 438 | |
Kris Chaplin | e768dfa | 2021-06-25 11:31:52 +0100 | [diff] [blame] | 439 | /* Intel HWMON services */ |
| 440 | static uint32_t intel_hwmon_readtemp(uint32_t chan, uint32_t *retval) |
| 441 | { |
| 442 | if (chan > TEMP_CHANNEL_MAX) { |
| 443 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 444 | } |
| 445 | |
| 446 | if (mailbox_hwmon_readtemp(chan, retval) < 0) { |
| 447 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 448 | } |
| 449 | |
| 450 | return INTEL_SIP_SMC_STATUS_OK; |
| 451 | } |
| 452 | |
| 453 | static uint32_t intel_hwmon_readvolt(uint32_t chan, uint32_t *retval) |
| 454 | { |
| 455 | if (chan > VOLT_CHANNEL_MAX) { |
| 456 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 457 | } |
| 458 | |
| 459 | if (mailbox_hwmon_readvolt(chan, retval) < 0) { |
| 460 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 461 | } |
| 462 | |
| 463 | return INTEL_SIP_SMC_STATUS_OK; |
| 464 | } |
| 465 | |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 466 | /* Mailbox services */ |
Abdul Halim, Muhammad Hadi Asyrafi | d9006fc | 2021-02-05 11:50:58 +0800 | [diff] [blame] | 467 | static uint32_t intel_smc_fw_version(uint32_t *fw_version) |
| 468 | { |
Sieu Mun Tang | bfda95a | 2022-04-27 18:54:10 +0800 | [diff] [blame] | 469 | int status; |
| 470 | unsigned int resp_len = CONFIG_STATUS_WORD_SIZE; |
| 471 | uint32_t resp_data[CONFIG_STATUS_WORD_SIZE] = {0U}; |
| 472 | |
| 473 | status = mailbox_send_cmd(MBOX_JOB_ID, MBOX_CONFIG_STATUS, NULL, 0U, |
| 474 | CMD_CASUAL, resp_data, &resp_len); |
| 475 | |
| 476 | if (status < 0) { |
| 477 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 478 | } |
| 479 | |
| 480 | if (resp_len <= CONFIG_STATUS_FW_VER_OFFSET) { |
| 481 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 482 | } |
| 483 | |
| 484 | *fw_version = resp_data[CONFIG_STATUS_FW_VER_OFFSET] & CONFIG_STATUS_FW_VER_MASK; |
Abdul Halim, Muhammad Hadi Asyrafi | d9006fc | 2021-02-05 11:50:58 +0800 | [diff] [blame] | 485 | |
| 486 | return INTEL_SIP_SMC_STATUS_OK; |
| 487 | } |
| 488 | |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 489 | static uint32_t intel_mbox_send_cmd(uint32_t cmd, uint32_t *args, |
| 490 | unsigned int len, |
| 491 | uint32_t urgent, uint32_t *response, |
| 492 | unsigned int resp_len, int *mbox_status, |
| 493 | unsigned int *len_in_resp) |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 494 | { |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 495 | *len_in_resp = 0; |
| 496 | *mbox_status = 0; |
| 497 | |
| 498 | if (!is_address_in_ddr_range((uint64_t)args, sizeof(uint32_t) * len)) |
| 499 | return INTEL_SIP_SMC_STATUS_REJECTED; |
| 500 | |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 501 | int status = mailbox_send_cmd(MBOX_JOB_ID, cmd, args, len, urgent, |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 502 | response, &resp_len); |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 503 | |
| 504 | if (status < 0) { |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 505 | *mbox_status = -status; |
| 506 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 507 | } |
| 508 | |
| 509 | *mbox_status = 0; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 510 | *len_in_resp = resp_len; |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 511 | return INTEL_SIP_SMC_STATUS_OK; |
| 512 | } |
| 513 | |
Sieu Mun Tang | 2b8e005 | 2022-04-27 18:57:29 +0800 | [diff] [blame] | 514 | static int intel_smc_get_usercode(uint32_t *user_code) |
| 515 | { |
| 516 | int status; |
| 517 | unsigned int resp_len = sizeof(user_code) / MBOX_WORD_BYTE; |
| 518 | |
| 519 | status = mailbox_send_cmd(MBOX_JOB_ID, MBOX_CMD_GET_USERCODE, NULL, |
| 520 | 0U, CMD_CASUAL, user_code, &resp_len); |
| 521 | |
| 522 | if (status < 0) { |
| 523 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 524 | } |
| 525 | |
| 526 | return INTEL_SIP_SMC_STATUS_OK; |
| 527 | } |
| 528 | |
Abdul Halim, Muhammad Hadi Asyrafi | b30ce3f | 2020-06-18 16:21:29 +0800 | [diff] [blame] | 529 | /* Miscellaneous HPS services */ |
| 530 | static uint32_t intel_hps_set_bridges(uint64_t enable) |
| 531 | { |
| 532 | if (enable != 0U) { |
| 533 | socfpga_bridges_enable(); |
| 534 | } else { |
| 535 | socfpga_bridges_disable(); |
| 536 | } |
| 537 | |
| 538 | return INTEL_SIP_SMC_STATUS_OK; |
| 539 | } |
| 540 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 541 | /* |
| 542 | * This function is responsible for handling all SiP calls from the NS world |
| 543 | */ |
| 544 | |
| 545 | uintptr_t sip_smc_handler(uint32_t smc_fid, |
| 546 | u_register_t x1, |
| 547 | u_register_t x2, |
| 548 | u_register_t x3, |
| 549 | u_register_t x4, |
| 550 | void *cookie, |
| 551 | void *handle, |
| 552 | u_register_t flags) |
| 553 | { |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 554 | uint32_t retval = 0; |
Sieu Mun Tang | a34b881 | 2022-03-17 03:11:55 +0800 | [diff] [blame] | 555 | uint32_t mbox_error = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 556 | uint32_t completed_addr[3]; |
Sieu Mun Tang | a34b881 | 2022-03-17 03:11:55 +0800 | [diff] [blame] | 557 | uint64_t retval64, rsu_respbuf[9]; |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 558 | int status = INTEL_SIP_SMC_STATUS_OK; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 559 | int mbox_status; |
| 560 | unsigned int len_in_resp; |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 561 | u_register_t x5, x6; |
Abdul Halim, Muhammad Hadi Asyrafi | b45f15e | 2020-05-14 15:32:43 +0800 | [diff] [blame] | 562 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 563 | switch (smc_fid) { |
| 564 | case SIP_SVC_UID: |
| 565 | /* Return UID to the caller */ |
| 566 | SMC_UUID_RET(handle, intl_svc_uid); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 567 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 568 | case INTEL_SIP_SMC_FPGA_CONFIG_ISDONE: |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 569 | status = intel_mailbox_fpga_config_isdone(x1); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 570 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 571 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 572 | case INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM: |
| 573 | SMC_RET3(handle, INTEL_SIP_SMC_STATUS_OK, |
| 574 | INTEL_SIP_SMC_FPGA_CONFIG_ADDR, |
| 575 | INTEL_SIP_SMC_FPGA_CONFIG_SIZE - |
| 576 | INTEL_SIP_SMC_FPGA_CONFIG_ADDR); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 577 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 578 | case INTEL_SIP_SMC_FPGA_CONFIG_START: |
| 579 | status = intel_fpga_config_start(x1); |
| 580 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 581 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 582 | case INTEL_SIP_SMC_FPGA_CONFIG_WRITE: |
| 583 | status = intel_fpga_config_write(x1, x2); |
| 584 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 585 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 586 | case INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE: |
| 587 | status = intel_fpga_config_completed_write(completed_addr, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 588 | &retval, &rcv_id); |
| 589 | switch (retval) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 590 | case 1: |
| 591 | SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, |
| 592 | completed_addr[0], 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 593 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 594 | case 2: |
| 595 | SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, |
| 596 | completed_addr[0], |
| 597 | completed_addr[1], 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 598 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 599 | case 3: |
| 600 | SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, |
| 601 | completed_addr[0], |
| 602 | completed_addr[1], |
| 603 | completed_addr[2]); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 604 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 605 | case 0: |
| 606 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 607 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 608 | default: |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 609 | mailbox_clear_response(); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 610 | SMC_RET1(handle, INTEL_SIP_SMC_STATUS_ERROR); |
| 611 | } |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 612 | |
| 613 | case INTEL_SIP_SMC_REG_READ: |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 614 | status = intel_secure_reg_read(x1, &retval); |
| 615 | SMC_RET3(handle, status, retval, x1); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 616 | |
| 617 | case INTEL_SIP_SMC_REG_WRITE: |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 618 | status = intel_secure_reg_write(x1, (uint32_t)x2, &retval); |
| 619 | SMC_RET3(handle, status, retval, x1); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 620 | |
| 621 | case INTEL_SIP_SMC_REG_UPDATE: |
| 622 | status = intel_secure_reg_update(x1, (uint32_t)x2, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 623 | (uint32_t)x3, &retval); |
| 624 | SMC_RET3(handle, status, retval, x1); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 625 | |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 626 | case INTEL_SIP_SMC_RSU_STATUS: |
| 627 | status = intel_rsu_status(rsu_respbuf, |
| 628 | ARRAY_SIZE(rsu_respbuf)); |
| 629 | if (status) { |
| 630 | SMC_RET1(handle, status); |
| 631 | } else { |
| 632 | SMC_RET4(handle, rsu_respbuf[0], rsu_respbuf[1], |
| 633 | rsu_respbuf[2], rsu_respbuf[3]); |
| 634 | } |
| 635 | |
| 636 | case INTEL_SIP_SMC_RSU_UPDATE: |
| 637 | status = intel_rsu_update(x1); |
| 638 | SMC_RET1(handle, status); |
| 639 | |
| 640 | case INTEL_SIP_SMC_RSU_NOTIFY: |
| 641 | status = intel_rsu_notify(x1); |
| 642 | SMC_RET1(handle, status); |
| 643 | |
| 644 | case INTEL_SIP_SMC_RSU_RETRY_COUNTER: |
| 645 | status = intel_rsu_retry_counter((uint32_t *)rsu_respbuf, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 646 | ARRAY_SIZE(rsu_respbuf), &retval); |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 647 | if (status) { |
| 648 | SMC_RET1(handle, status); |
| 649 | } else { |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 650 | SMC_RET2(handle, status, retval); |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 651 | } |
| 652 | |
Chee Hong Ang | 2cfd8ec | 2020-05-13 11:44:04 +0800 | [diff] [blame] | 653 | case INTEL_SIP_SMC_RSU_DCMF_VERSION: |
| 654 | SMC_RET3(handle, INTEL_SIP_SMC_STATUS_OK, |
| 655 | ((uint64_t)rsu_dcmf_ver[1] << 32) | rsu_dcmf_ver[0], |
| 656 | ((uint64_t)rsu_dcmf_ver[3] << 32) | rsu_dcmf_ver[2]); |
| 657 | |
| 658 | case INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION: |
| 659 | status = intel_rsu_copy_dcmf_version(x1, x2); |
| 660 | SMC_RET1(handle, status); |
| 661 | |
Sieu Mun Tang | e6d5de9 | 2022-04-28 22:21:01 +0800 | [diff] [blame] | 662 | case INTEL_SIP_SMC_RSU_DCMF_STATUS: |
| 663 | SMC_RET2(handle, INTEL_SIP_SMC_STATUS_OK, |
| 664 | ((uint64_t)rsu_dcmf_stat[3] << 48) | |
| 665 | ((uint64_t)rsu_dcmf_stat[2] << 32) | |
| 666 | ((uint64_t)rsu_dcmf_stat[1] << 16) | |
| 667 | rsu_dcmf_stat[0]); |
| 668 | |
| 669 | case INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS: |
| 670 | status = intel_rsu_copy_dcmf_status(x1); |
| 671 | SMC_RET1(handle, status); |
| 672 | |
Chee Hong Ang | 681631b | 2020-07-01 14:22:25 +0800 | [diff] [blame] | 673 | case INTEL_SIP_SMC_RSU_MAX_RETRY: |
| 674 | SMC_RET2(handle, INTEL_SIP_SMC_STATUS_OK, rsu_max_retry); |
| 675 | |
| 676 | case INTEL_SIP_SMC_RSU_COPY_MAX_RETRY: |
| 677 | rsu_max_retry = x1; |
| 678 | SMC_RET1(handle, INTEL_SIP_SMC_STATUS_OK); |
| 679 | |
Sieu Mun Tang | dbcc2cf | 2022-03-07 12:13:04 +0800 | [diff] [blame] | 680 | case INTEL_SIP_SMC_ECC_DBE: |
| 681 | status = intel_ecc_dbe_notification(x1); |
| 682 | SMC_RET1(handle, status); |
| 683 | |
Abdul Halim, Muhammad Hadi Asyrafi | d9006fc | 2021-02-05 11:50:58 +0800 | [diff] [blame] | 684 | case INTEL_SIP_SMC_FIRMWARE_VERSION: |
| 685 | status = intel_smc_fw_version(&retval); |
Sieu Mun Tang | bfda95a | 2022-04-27 18:54:10 +0800 | [diff] [blame] | 686 | SMC_RET2(handle, status, retval); |
Abdul Halim, Muhammad Hadi Asyrafi | d9006fc | 2021-02-05 11:50:58 +0800 | [diff] [blame] | 687 | |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 688 | case INTEL_SIP_SMC_MBOX_SEND_CMD: |
| 689 | x5 = SMC_GET_GP(handle, CTX_GPREG_X5); |
| 690 | x6 = SMC_GET_GP(handle, CTX_GPREG_X6); |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 691 | status = intel_mbox_send_cmd(x1, (uint32_t *)x2, x3, x4, |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 692 | (uint32_t *)x5, x6, &mbox_status, |
| 693 | &len_in_resp); |
Sieu Mun Tang | f02f0cb | 2022-02-19 20:36:41 +0800 | [diff] [blame] | 694 | SMC_RET3(handle, status, mbox_status, len_in_resp); |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 695 | |
Sieu Mun Tang | 2b8e005 | 2022-04-27 18:57:29 +0800 | [diff] [blame] | 696 | case INTEL_SIP_SMC_GET_USERCODE: |
| 697 | status = intel_smc_get_usercode(&retval); |
| 698 | SMC_RET2(handle, status, retval); |
| 699 | |
Sieu Mun Tang | a34b881 | 2022-03-17 03:11:55 +0800 | [diff] [blame] | 700 | case INTEL_SIP_SMC_GET_ROM_PATCH_SHA384: |
| 701 | status = intel_fcs_get_rom_patch_sha384(x1, &retval64, |
| 702 | &mbox_error); |
| 703 | SMC_RET4(handle, status, mbox_error, x1, retval64); |
| 704 | |
Sieu Mun Tang | f9cb657 | 2022-04-27 18:24:06 +0800 | [diff] [blame] | 705 | case INTEL_SIP_SMC_SVC_VERSION: |
| 706 | SMC_RET3(handle, INTEL_SIP_SMC_STATUS_OK, |
| 707 | SIP_SVC_VERSION_MAJOR, |
| 708 | SIP_SVC_VERSION_MINOR); |
| 709 | |
Abdul Halim, Muhammad Hadi Asyrafi | b30ce3f | 2020-06-18 16:21:29 +0800 | [diff] [blame] | 710 | case INTEL_SIP_SMC_HPS_SET_BRIDGES: |
| 711 | status = intel_hps_set_bridges(x1); |
| 712 | SMC_RET1(handle, status); |
| 713 | |
Kris Chaplin | e768dfa | 2021-06-25 11:31:52 +0100 | [diff] [blame] | 714 | case INTEL_SIP_SMC_HWMON_READTEMP: |
| 715 | status = intel_hwmon_readtemp(x1, &retval); |
| 716 | SMC_RET2(handle, status, retval); |
| 717 | |
| 718 | case INTEL_SIP_SMC_HWMON_READVOLT: |
| 719 | status = intel_hwmon_readvolt(x1, &retval); |
| 720 | SMC_RET2(handle, status, retval); |
| 721 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 722 | default: |
| 723 | return socfpga_sip_handler(smc_fid, x1, x2, x3, x4, |
| 724 | cookie, handle, flags); |
| 725 | } |
| 726 | } |
| 727 | |
| 728 | DECLARE_RT_SVC( |
Hadi Asyrafi | 4d9f395 | 2019-10-23 17:35:32 +0800 | [diff] [blame] | 729 | socfpga_sip_svc, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 730 | OEN_SIP_START, |
| 731 | OEN_SIP_END, |
| 732 | SMC_TYPE_FAST, |
| 733 | NULL, |
| 734 | sip_smc_handler |
| 735 | ); |
| 736 | |
| 737 | DECLARE_RT_SVC( |
Hadi Asyrafi | 4d9f395 | 2019-10-23 17:35:32 +0800 | [diff] [blame] | 738 | socfpga_sip_svc_std, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 739 | OEN_SIP_START, |
| 740 | OEN_SIP_END, |
| 741 | SMC_TYPE_YIELD, |
| 742 | NULL, |
| 743 | sip_smc_handler |
| 744 | ); |