feat(intel): enable SMC SoC FPGA bridges enable/disable
Enable SoC FPGA bridges enable/disable from non-secure world
through secure monitor calls
Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I4474abab9731923a61ff0e7eb2c2fa32048001cb
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c
index dc3a94b..13ef809 100644
--- a/plat/intel/soc/common/socfpga_sip_svc.c
+++ b/plat/intel/soc/common/socfpga_sip_svc.c
@@ -440,6 +440,18 @@
return INTEL_SIP_SMC_STATUS_OK;
}
+/* Miscellaneous HPS services */
+static uint32_t intel_hps_set_bridges(uint64_t enable)
+{
+ if (enable != 0U) {
+ socfpga_bridges_enable();
+ } else {
+ socfpga_bridges_disable();
+ }
+
+ return INTEL_SIP_SMC_STATUS_OK;
+}
+
/*
* This function is responsible for handling all SiP calls from the NS world
*/
@@ -583,6 +595,10 @@
SIP_SVC_VERSION_MAJOR,
SIP_SVC_VERSION_MINOR);
+ case INTEL_SIP_SMC_HPS_SET_BRIDGES:
+ status = intel_hps_set_bridges(x1);
+ SMC_RET1(handle, status);
+
default:
return socfpga_sip_handler(smc_fid, x1, x2, x3, x4,
cookie, handle, flags);