Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 1 | /* |
Abdul Halim, Muhammad Hadi Asyrafi | 461f544 | 2020-07-03 13:22:09 +0800 | [diff] [blame] | 2 | * Copyright (c) 2019-2022, ARM Limited and Contributors. All rights reserved. |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | #include <common/debug.h> |
| 9 | #include <common/runtime_svc.h> |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 10 | #include <lib/mmio.h> |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 11 | #include <tools_share/uuid.h> |
| 12 | |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 13 | #include "socfpga_fcs.h" |
Hadi Asyrafi | 6f8a2b2 | 2019-10-23 18:34:14 +0800 | [diff] [blame] | 14 | #include "socfpga_mailbox.h" |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 15 | #include "socfpga_reset_manager.h" |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 16 | #include "socfpga_sip_svc.h" |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 17 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 18 | |
| 19 | /* Total buffer the driver can hold */ |
| 20 | #define FPGA_CONFIG_BUFFER_SIZE 4 |
| 21 | |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 22 | static int current_block, current_buffer; |
Abdul Halim, Muhammad Hadi Asyrafi | b251c33 | 2020-05-29 12:13:17 +0800 | [diff] [blame] | 23 | static int read_block, max_blocks; |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 24 | static uint32_t send_id, rcv_id; |
| 25 | static uint32_t bytes_per_block, blocks_submitted; |
Abdul Halim, Muhammad Hadi Asyrafi | b251c33 | 2020-05-29 12:13:17 +0800 | [diff] [blame] | 26 | static bool is_full_reconfig; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 27 | |
Chee Hong Ang | 2cfd8ec | 2020-05-13 11:44:04 +0800 | [diff] [blame^] | 28 | /* RSU DCMF version */ |
| 29 | static uint32_t rsu_dcmf_ver[4] = {0}; |
| 30 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 31 | |
| 32 | /* SiP Service UUID */ |
| 33 | DEFINE_SVC_UUID2(intl_svc_uid, |
| 34 | 0xa85273b0, 0xe85a, 0x4862, 0xa6, 0x2a, |
| 35 | 0xfa, 0x88, 0x88, 0x17, 0x68, 0x81); |
| 36 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 37 | static uint64_t socfpga_sip_handler(uint32_t smc_fid, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 38 | uint64_t x1, |
| 39 | uint64_t x2, |
| 40 | uint64_t x3, |
| 41 | uint64_t x4, |
| 42 | void *cookie, |
| 43 | void *handle, |
| 44 | uint64_t flags) |
| 45 | { |
| 46 | ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); |
| 47 | SMC_RET1(handle, SMC_UNK); |
| 48 | } |
| 49 | |
| 50 | struct fpga_config_info fpga_config_buffers[FPGA_CONFIG_BUFFER_SIZE]; |
| 51 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 52 | static int intel_fpga_sdm_write_buffer(struct fpga_config_info *buffer) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 53 | { |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 54 | uint32_t args[3]; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 55 | |
| 56 | while (max_blocks > 0 && buffer->size > buffer->size_written) { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 57 | args[0] = (1<<8); |
| 58 | args[1] = buffer->addr + buffer->size_written; |
| 59 | if (buffer->size - buffer->size_written <= bytes_per_block) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 60 | args[2] = buffer->size - buffer->size_written; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 61 | current_buffer++; |
| 62 | current_buffer %= FPGA_CONFIG_BUFFER_SIZE; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 63 | } else |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 64 | args[2] = bytes_per_block; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 65 | |
| 66 | buffer->size_written += args[2]; |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 67 | mailbox_send_cmd_async(&send_id, MBOX_RECONFIG_DATA, args, |
Abdul Halim, Muhammad Hadi Asyrafi | 118ab21 | 2020-10-15 15:27:18 +0800 | [diff] [blame] | 68 | 3U, CMD_INDIRECT); |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 69 | |
| 70 | buffer->subblocks_sent++; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 71 | max_blocks--; |
| 72 | } |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 73 | |
| 74 | return !max_blocks; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 75 | } |
| 76 | |
| 77 | static int intel_fpga_sdm_write_all(void) |
| 78 | { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 79 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) |
| 80 | if (intel_fpga_sdm_write_buffer( |
| 81 | &fpga_config_buffers[current_buffer])) |
| 82 | break; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 83 | return 0; |
| 84 | } |
| 85 | |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 86 | static uint32_t intel_mailbox_fpga_config_isdone(uint32_t query_type) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 87 | { |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 88 | uint32_t ret; |
| 89 | |
| 90 | if (query_type == 1) |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 91 | ret = intel_mailbox_get_config_status(MBOX_CONFIG_STATUS, false); |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 92 | else |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 93 | ret = intel_mailbox_get_config_status(MBOX_RECONFIG_STATUS, true); |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 94 | |
| 95 | if (ret) { |
| 96 | if (ret == MBOX_CFGSTAT_STATE_CONFIG) |
| 97 | return INTEL_SIP_SMC_STATUS_BUSY; |
| 98 | else |
| 99 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 100 | } |
| 101 | |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 102 | if (query_type != 1) { |
| 103 | /* full reconfiguration */ |
Abdul Halim, Muhammad Hadi Asyrafi | b251c33 | 2020-05-29 12:13:17 +0800 | [diff] [blame] | 104 | if (is_full_reconfig) |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 105 | socfpga_bridges_enable(); /* Enable bridge */ |
| 106 | } |
| 107 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 108 | return INTEL_SIP_SMC_STATUS_OK; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 109 | } |
| 110 | |
| 111 | static int mark_last_buffer_xfer_completed(uint32_t *buffer_addr_completed) |
| 112 | { |
| 113 | int i; |
| 114 | |
| 115 | for (i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
| 116 | if (fpga_config_buffers[i].block_number == current_block) { |
| 117 | fpga_config_buffers[i].subblocks_sent--; |
| 118 | if (fpga_config_buffers[i].subblocks_sent == 0 |
| 119 | && fpga_config_buffers[i].size <= |
| 120 | fpga_config_buffers[i].size_written) { |
| 121 | fpga_config_buffers[i].write_requested = 0; |
| 122 | current_block++; |
| 123 | *buffer_addr_completed = |
| 124 | fpga_config_buffers[i].addr; |
| 125 | return 0; |
| 126 | } |
| 127 | } |
| 128 | } |
| 129 | |
| 130 | return -1; |
| 131 | } |
| 132 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 133 | static int intel_fpga_config_completed_write(uint32_t *completed_addr, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 134 | uint32_t *count, uint32_t *job_id) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 135 | { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 136 | uint32_t resp[5]; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 137 | unsigned int resp_len = ARRAY_SIZE(resp); |
| 138 | int status = INTEL_SIP_SMC_STATUS_OK; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 139 | int all_completed = 1; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 140 | *count = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 141 | |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 142 | while (*count < 3) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 143 | |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 144 | status = mailbox_read_response(job_id, |
| 145 | resp, &resp_len); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 146 | |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 147 | if (status < 0) { |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 148 | break; |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 149 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 150 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 151 | max_blocks++; |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 152 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 153 | if (mark_last_buffer_xfer_completed( |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 154 | &completed_addr[*count]) == 0) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 155 | *count = *count + 1; |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 156 | } else { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 157 | break; |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 158 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 159 | } |
| 160 | |
| 161 | if (*count <= 0) { |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 162 | if (status != MBOX_NO_RESPONSE && |
| 163 | status != MBOX_TIMEOUT && resp_len != 0) { |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 164 | mailbox_clear_response(); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 165 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 166 | } |
| 167 | |
| 168 | *count = 0; |
| 169 | } |
| 170 | |
| 171 | intel_fpga_sdm_write_all(); |
| 172 | |
| 173 | if (*count > 0) |
| 174 | status = INTEL_SIP_SMC_STATUS_OK; |
| 175 | else if (*count == 0) |
| 176 | status = INTEL_SIP_SMC_STATUS_BUSY; |
| 177 | |
| 178 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
| 179 | if (fpga_config_buffers[i].write_requested != 0) { |
| 180 | all_completed = 0; |
| 181 | break; |
| 182 | } |
| 183 | } |
| 184 | |
| 185 | if (all_completed == 1) |
| 186 | return INTEL_SIP_SMC_STATUS_OK; |
| 187 | |
| 188 | return status; |
| 189 | } |
| 190 | |
Abdul Halim, Muhammad Hadi Asyrafi | b251c33 | 2020-05-29 12:13:17 +0800 | [diff] [blame] | 191 | static int intel_fpga_config_start(uint32_t type) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 192 | { |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 193 | uint32_t argument = 0x1; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 194 | uint32_t response[3]; |
| 195 | int status = 0; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 196 | unsigned int size = 0; |
| 197 | unsigned int resp_len = ARRAY_SIZE(response); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 198 | |
Abdul Halim, Muhammad Hadi Asyrafi | b251c33 | 2020-05-29 12:13:17 +0800 | [diff] [blame] | 199 | if ((config_type)type == FULL_CONFIG) { |
| 200 | is_full_reconfig = true; |
| 201 | } |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 202 | |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 203 | mailbox_clear_response(); |
| 204 | |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 205 | mailbox_send_cmd(MBOX_JOB_ID, MBOX_CMD_CANCEL, NULL, 0U, |
| 206 | CMD_CASUAL, NULL, NULL); |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 207 | |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 208 | status = mailbox_send_cmd(MBOX_JOB_ID, MBOX_RECONFIG, &argument, size, |
| 209 | CMD_CASUAL, response, &resp_len); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 210 | |
| 211 | if (status < 0) |
| 212 | return status; |
| 213 | |
| 214 | max_blocks = response[0]; |
| 215 | bytes_per_block = response[1]; |
| 216 | |
| 217 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
| 218 | fpga_config_buffers[i].size = 0; |
| 219 | fpga_config_buffers[i].size_written = 0; |
| 220 | fpga_config_buffers[i].addr = 0; |
| 221 | fpga_config_buffers[i].write_requested = 0; |
| 222 | fpga_config_buffers[i].block_number = 0; |
| 223 | fpga_config_buffers[i].subblocks_sent = 0; |
| 224 | } |
| 225 | |
| 226 | blocks_submitted = 0; |
| 227 | current_block = 0; |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 228 | read_block = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 229 | current_buffer = 0; |
| 230 | |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 231 | /* full reconfiguration */ |
Abdul Halim, Muhammad Hadi Asyrafi | b251c33 | 2020-05-29 12:13:17 +0800 | [diff] [blame] | 232 | if (is_full_reconfig) { |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 233 | /* Disable bridge */ |
| 234 | socfpga_bridges_disable(); |
| 235 | } |
| 236 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 237 | return 0; |
| 238 | } |
| 239 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 240 | static bool is_fpga_config_buffer_full(void) |
| 241 | { |
| 242 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) |
| 243 | if (!fpga_config_buffers[i].write_requested) |
| 244 | return false; |
| 245 | return true; |
| 246 | } |
| 247 | |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 248 | bool is_address_in_ddr_range(uint64_t addr, uint64_t size) |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 249 | { |
Abdul Halim, Muhammad Hadi Asyrafi | 461f544 | 2020-07-03 13:22:09 +0800 | [diff] [blame] | 250 | if (!addr && !size) { |
| 251 | return true; |
| 252 | } |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 253 | if (size > (UINT64_MAX - addr)) |
| 254 | return false; |
Abdul Halim, Muhammad Hadi Asyrafi | e59b999 | 2020-02-11 20:17:05 +0800 | [diff] [blame] | 255 | if (addr < BL31_LIMIT) |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 256 | return false; |
| 257 | if (addr + size > DRAM_BASE + DRAM_SIZE) |
| 258 | return false; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 259 | |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 260 | return true; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 261 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 262 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 263 | static uint32_t intel_fpga_config_write(uint64_t mem, uint64_t size) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 264 | { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 265 | int i; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 266 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 267 | intel_fpga_sdm_write_all(); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 268 | |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 269 | if (!is_address_in_ddr_range(mem, size) || |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 270 | is_fpga_config_buffer_full()) |
| 271 | return INTEL_SIP_SMC_STATUS_REJECTED; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 272 | |
| 273 | for (i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 274 | int j = (i + current_buffer) % FPGA_CONFIG_BUFFER_SIZE; |
| 275 | |
| 276 | if (!fpga_config_buffers[j].write_requested) { |
| 277 | fpga_config_buffers[j].addr = mem; |
| 278 | fpga_config_buffers[j].size = size; |
| 279 | fpga_config_buffers[j].size_written = 0; |
| 280 | fpga_config_buffers[j].write_requested = 1; |
| 281 | fpga_config_buffers[j].block_number = |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 282 | blocks_submitted++; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 283 | fpga_config_buffers[j].subblocks_sent = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 284 | break; |
| 285 | } |
| 286 | } |
| 287 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 288 | if (is_fpga_config_buffer_full()) |
| 289 | return INTEL_SIP_SMC_STATUS_BUSY; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 290 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 291 | return INTEL_SIP_SMC_STATUS_OK; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 292 | } |
| 293 | |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 294 | static int is_out_of_sec_range(uint64_t reg_addr) |
| 295 | { |
Siew Chin Lim | 869d4f5 | 2021-05-11 21:12:22 +0800 | [diff] [blame] | 296 | #if DEBUG |
| 297 | return 0; |
| 298 | #endif |
| 299 | |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 300 | switch (reg_addr) { |
| 301 | case(0xF8011100): /* ECCCTRL1 */ |
| 302 | case(0xF8011104): /* ECCCTRL2 */ |
| 303 | case(0xF8011110): /* ERRINTEN */ |
| 304 | case(0xF8011114): /* ERRINTENS */ |
| 305 | case(0xF8011118): /* ERRINTENR */ |
| 306 | case(0xF801111C): /* INTMODE */ |
| 307 | case(0xF8011120): /* INTSTAT */ |
| 308 | case(0xF8011124): /* DIAGINTTEST */ |
| 309 | case(0xF801112C): /* DERRADDRA */ |
| 310 | case(0xFFD12028): /* SDMMCGRP_CTRL */ |
| 311 | case(0xFFD12044): /* EMAC0 */ |
| 312 | case(0xFFD12048): /* EMAC1 */ |
| 313 | case(0xFFD1204C): /* EMAC2 */ |
| 314 | case(0xFFD12090): /* ECC_INT_MASK_VALUE */ |
| 315 | case(0xFFD12094): /* ECC_INT_MASK_SET */ |
| 316 | case(0xFFD12098): /* ECC_INT_MASK_CLEAR */ |
| 317 | case(0xFFD1209C): /* ECC_INTSTATUS_SERR */ |
| 318 | case(0xFFD120A0): /* ECC_INTSTATUS_DERR */ |
| 319 | case(0xFFD120C0): /* NOC_TIMEOUT */ |
| 320 | case(0xFFD120C4): /* NOC_IDLEREQ_SET */ |
| 321 | case(0xFFD120C8): /* NOC_IDLEREQ_CLR */ |
| 322 | case(0xFFD120D0): /* NOC_IDLEACK */ |
| 323 | case(0xFFD120D4): /* NOC_IDLESTATUS */ |
| 324 | case(0xFFD12200): /* BOOT_SCRATCH_COLD0 */ |
| 325 | case(0xFFD12204): /* BOOT_SCRATCH_COLD1 */ |
| 326 | case(0xFFD12220): /* BOOT_SCRATCH_COLD8 */ |
| 327 | case(0xFFD12224): /* BOOT_SCRATCH_COLD9 */ |
| 328 | return 0; |
| 329 | |
| 330 | default: |
| 331 | break; |
| 332 | } |
| 333 | |
| 334 | return -1; |
| 335 | } |
| 336 | |
| 337 | /* Secure register access */ |
| 338 | uint32_t intel_secure_reg_read(uint64_t reg_addr, uint32_t *retval) |
| 339 | { |
| 340 | if (is_out_of_sec_range(reg_addr)) |
| 341 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 342 | |
| 343 | *retval = mmio_read_32(reg_addr); |
| 344 | |
| 345 | return INTEL_SIP_SMC_STATUS_OK; |
| 346 | } |
| 347 | |
| 348 | uint32_t intel_secure_reg_write(uint64_t reg_addr, uint32_t val, |
| 349 | uint32_t *retval) |
| 350 | { |
| 351 | if (is_out_of_sec_range(reg_addr)) |
| 352 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 353 | |
| 354 | mmio_write_32(reg_addr, val); |
| 355 | |
| 356 | return intel_secure_reg_read(reg_addr, retval); |
| 357 | } |
| 358 | |
| 359 | uint32_t intel_secure_reg_update(uint64_t reg_addr, uint32_t mask, |
| 360 | uint32_t val, uint32_t *retval) |
| 361 | { |
| 362 | if (!intel_secure_reg_read(reg_addr, retval)) { |
| 363 | *retval &= ~mask; |
Siew Chin Lim | a076315 | 2021-07-10 00:55:35 +0800 | [diff] [blame] | 364 | *retval |= val & mask; |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 365 | return intel_secure_reg_write(reg_addr, *retval, retval); |
| 366 | } |
| 367 | |
| 368 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 369 | } |
| 370 | |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 371 | /* Intel Remote System Update (RSU) services */ |
| 372 | uint64_t intel_rsu_update_address; |
| 373 | |
Abdul Halim, Muhammad Hadi Asyrafi | 118ab21 | 2020-10-15 15:27:18 +0800 | [diff] [blame] | 374 | static uint32_t intel_rsu_status(uint64_t *respbuf, unsigned int respbuf_sz) |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 375 | { |
| 376 | if (mailbox_rsu_status((uint32_t *)respbuf, respbuf_sz) < 0) |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 377 | return INTEL_SIP_SMC_RSU_ERROR; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 378 | |
| 379 | return INTEL_SIP_SMC_STATUS_OK; |
| 380 | } |
| 381 | |
| 382 | static uint32_t intel_rsu_update(uint64_t update_address) |
| 383 | { |
| 384 | intel_rsu_update_address = update_address; |
| 385 | return INTEL_SIP_SMC_STATUS_OK; |
| 386 | } |
| 387 | |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 388 | static uint32_t intel_rsu_notify(uint32_t execution_stage) |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 389 | { |
Abdul Halim, Muhammad Hadi Asyrafi | e59b999 | 2020-02-11 20:17:05 +0800 | [diff] [blame] | 390 | if (mailbox_hps_stage_notify(execution_stage) < 0) |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 391 | return INTEL_SIP_SMC_RSU_ERROR; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 392 | |
| 393 | return INTEL_SIP_SMC_STATUS_OK; |
| 394 | } |
| 395 | |
| 396 | static uint32_t intel_rsu_retry_counter(uint32_t *respbuf, uint32_t respbuf_sz, |
| 397 | uint32_t *ret_stat) |
| 398 | { |
| 399 | if (mailbox_rsu_status((uint32_t *)respbuf, respbuf_sz) < 0) |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 400 | return INTEL_SIP_SMC_RSU_ERROR; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 401 | |
| 402 | *ret_stat = respbuf[8]; |
| 403 | return INTEL_SIP_SMC_STATUS_OK; |
| 404 | } |
| 405 | |
Chee Hong Ang | 2cfd8ec | 2020-05-13 11:44:04 +0800 | [diff] [blame^] | 406 | static uint32_t intel_rsu_copy_dcmf_version(uint64_t dcmf_ver_1_0, |
| 407 | uint64_t dcmf_ver_3_2) |
| 408 | { |
| 409 | rsu_dcmf_ver[0] = dcmf_ver_1_0; |
| 410 | rsu_dcmf_ver[1] = dcmf_ver_1_0 >> 32; |
| 411 | rsu_dcmf_ver[2] = dcmf_ver_3_2; |
| 412 | rsu_dcmf_ver[3] = dcmf_ver_3_2 >> 32; |
| 413 | |
| 414 | return INTEL_SIP_SMC_STATUS_OK; |
| 415 | } |
| 416 | |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 417 | /* Mailbox services */ |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 418 | static uint32_t intel_mbox_send_cmd(uint32_t cmd, uint32_t *args, |
| 419 | unsigned int len, |
| 420 | uint32_t urgent, uint32_t *response, |
| 421 | unsigned int resp_len, int *mbox_status, |
| 422 | unsigned int *len_in_resp) |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 423 | { |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 424 | *len_in_resp = 0; |
| 425 | *mbox_status = 0; |
| 426 | |
| 427 | if (!is_address_in_ddr_range((uint64_t)args, sizeof(uint32_t) * len)) |
| 428 | return INTEL_SIP_SMC_STATUS_REJECTED; |
| 429 | |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 430 | int status = mailbox_send_cmd(MBOX_JOB_ID, cmd, args, len, urgent, |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 431 | response, &resp_len); |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 432 | |
| 433 | if (status < 0) { |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 434 | *mbox_status = -status; |
| 435 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 436 | } |
| 437 | |
| 438 | *mbox_status = 0; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 439 | *len_in_resp = resp_len; |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 440 | return INTEL_SIP_SMC_STATUS_OK; |
| 441 | } |
| 442 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 443 | /* |
| 444 | * This function is responsible for handling all SiP calls from the NS world |
| 445 | */ |
| 446 | |
| 447 | uintptr_t sip_smc_handler(uint32_t smc_fid, |
| 448 | u_register_t x1, |
| 449 | u_register_t x2, |
| 450 | u_register_t x3, |
| 451 | u_register_t x4, |
| 452 | void *cookie, |
| 453 | void *handle, |
| 454 | u_register_t flags) |
| 455 | { |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 456 | uint32_t retval = 0; |
Sieu Mun Tang | a34b881 | 2022-03-17 03:11:55 +0800 | [diff] [blame] | 457 | uint32_t mbox_error = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 458 | uint32_t completed_addr[3]; |
Sieu Mun Tang | a34b881 | 2022-03-17 03:11:55 +0800 | [diff] [blame] | 459 | uint64_t retval64, rsu_respbuf[9]; |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 460 | int status = INTEL_SIP_SMC_STATUS_OK; |
Sieu Mun Tang | 2468266 | 2022-02-19 21:49:48 +0800 | [diff] [blame] | 461 | int mbox_status; |
| 462 | unsigned int len_in_resp; |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 463 | u_register_t x5, x6; |
Abdul Halim, Muhammad Hadi Asyrafi | b45f15e | 2020-05-14 15:32:43 +0800 | [diff] [blame] | 464 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 465 | switch (smc_fid) { |
| 466 | case SIP_SVC_UID: |
| 467 | /* Return UID to the caller */ |
| 468 | SMC_UUID_RET(handle, intl_svc_uid); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 469 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 470 | case INTEL_SIP_SMC_FPGA_CONFIG_ISDONE: |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 471 | status = intel_mailbox_fpga_config_isdone(x1); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 472 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 473 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 474 | case INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM: |
| 475 | SMC_RET3(handle, INTEL_SIP_SMC_STATUS_OK, |
| 476 | INTEL_SIP_SMC_FPGA_CONFIG_ADDR, |
| 477 | INTEL_SIP_SMC_FPGA_CONFIG_SIZE - |
| 478 | INTEL_SIP_SMC_FPGA_CONFIG_ADDR); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 479 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 480 | case INTEL_SIP_SMC_FPGA_CONFIG_START: |
| 481 | status = intel_fpga_config_start(x1); |
| 482 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 483 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 484 | case INTEL_SIP_SMC_FPGA_CONFIG_WRITE: |
| 485 | status = intel_fpga_config_write(x1, x2); |
| 486 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 487 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 488 | case INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE: |
| 489 | status = intel_fpga_config_completed_write(completed_addr, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 490 | &retval, &rcv_id); |
| 491 | switch (retval) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 492 | case 1: |
| 493 | SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, |
| 494 | completed_addr[0], 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 495 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 496 | case 2: |
| 497 | SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, |
| 498 | completed_addr[0], |
| 499 | completed_addr[1], 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 500 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 501 | case 3: |
| 502 | SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, |
| 503 | completed_addr[0], |
| 504 | completed_addr[1], |
| 505 | completed_addr[2]); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 506 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 507 | case 0: |
| 508 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 509 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 510 | default: |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 511 | mailbox_clear_response(); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 512 | SMC_RET1(handle, INTEL_SIP_SMC_STATUS_ERROR); |
| 513 | } |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 514 | |
| 515 | case INTEL_SIP_SMC_REG_READ: |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 516 | status = intel_secure_reg_read(x1, &retval); |
| 517 | SMC_RET3(handle, status, retval, x1); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 518 | |
| 519 | case INTEL_SIP_SMC_REG_WRITE: |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 520 | status = intel_secure_reg_write(x1, (uint32_t)x2, &retval); |
| 521 | SMC_RET3(handle, status, retval, x1); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 522 | |
| 523 | case INTEL_SIP_SMC_REG_UPDATE: |
| 524 | status = intel_secure_reg_update(x1, (uint32_t)x2, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 525 | (uint32_t)x3, &retval); |
| 526 | SMC_RET3(handle, status, retval, x1); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 527 | |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 528 | case INTEL_SIP_SMC_RSU_STATUS: |
| 529 | status = intel_rsu_status(rsu_respbuf, |
| 530 | ARRAY_SIZE(rsu_respbuf)); |
| 531 | if (status) { |
| 532 | SMC_RET1(handle, status); |
| 533 | } else { |
| 534 | SMC_RET4(handle, rsu_respbuf[0], rsu_respbuf[1], |
| 535 | rsu_respbuf[2], rsu_respbuf[3]); |
| 536 | } |
| 537 | |
| 538 | case INTEL_SIP_SMC_RSU_UPDATE: |
| 539 | status = intel_rsu_update(x1); |
| 540 | SMC_RET1(handle, status); |
| 541 | |
| 542 | case INTEL_SIP_SMC_RSU_NOTIFY: |
| 543 | status = intel_rsu_notify(x1); |
| 544 | SMC_RET1(handle, status); |
| 545 | |
| 546 | case INTEL_SIP_SMC_RSU_RETRY_COUNTER: |
| 547 | status = intel_rsu_retry_counter((uint32_t *)rsu_respbuf, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 548 | ARRAY_SIZE(rsu_respbuf), &retval); |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 549 | if (status) { |
| 550 | SMC_RET1(handle, status); |
| 551 | } else { |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 552 | SMC_RET2(handle, status, retval); |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 553 | } |
| 554 | |
Chee Hong Ang | 2cfd8ec | 2020-05-13 11:44:04 +0800 | [diff] [blame^] | 555 | case INTEL_SIP_SMC_RSU_DCMF_VERSION: |
| 556 | SMC_RET3(handle, INTEL_SIP_SMC_STATUS_OK, |
| 557 | ((uint64_t)rsu_dcmf_ver[1] << 32) | rsu_dcmf_ver[0], |
| 558 | ((uint64_t)rsu_dcmf_ver[3] << 32) | rsu_dcmf_ver[2]); |
| 559 | |
| 560 | case INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION: |
| 561 | status = intel_rsu_copy_dcmf_version(x1, x2); |
| 562 | SMC_RET1(handle, status); |
| 563 | |
Sieu Mun Tang | dbcc2cf | 2022-03-07 12:13:04 +0800 | [diff] [blame] | 564 | case INTEL_SIP_SMC_ECC_DBE: |
| 565 | status = intel_ecc_dbe_notification(x1); |
| 566 | SMC_RET1(handle, status); |
| 567 | |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 568 | case INTEL_SIP_SMC_MBOX_SEND_CMD: |
| 569 | x5 = SMC_GET_GP(handle, CTX_GPREG_X5); |
| 570 | x6 = SMC_GET_GP(handle, CTX_GPREG_X6); |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 571 | status = intel_mbox_send_cmd(x1, (uint32_t *)x2, x3, x4, |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 572 | (uint32_t *)x5, x6, &mbox_status, |
| 573 | &len_in_resp); |
Sieu Mun Tang | f02f0cb | 2022-02-19 20:36:41 +0800 | [diff] [blame] | 574 | SMC_RET3(handle, status, mbox_status, len_in_resp); |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 575 | |
Sieu Mun Tang | a34b881 | 2022-03-17 03:11:55 +0800 | [diff] [blame] | 576 | case INTEL_SIP_SMC_GET_ROM_PATCH_SHA384: |
| 577 | status = intel_fcs_get_rom_patch_sha384(x1, &retval64, |
| 578 | &mbox_error); |
| 579 | SMC_RET4(handle, status, mbox_error, x1, retval64); |
| 580 | |
Sieu Mun Tang | f9cb657 | 2022-04-27 18:24:06 +0800 | [diff] [blame] | 581 | case INTEL_SIP_SMC_SVC_VERSION: |
| 582 | SMC_RET3(handle, INTEL_SIP_SMC_STATUS_OK, |
| 583 | SIP_SVC_VERSION_MAJOR, |
| 584 | SIP_SVC_VERSION_MINOR); |
| 585 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 586 | default: |
| 587 | return socfpga_sip_handler(smc_fid, x1, x2, x3, x4, |
| 588 | cookie, handle, flags); |
| 589 | } |
| 590 | } |
| 591 | |
| 592 | DECLARE_RT_SVC( |
Hadi Asyrafi | 4d9f395 | 2019-10-23 17:35:32 +0800 | [diff] [blame] | 593 | socfpga_sip_svc, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 594 | OEN_SIP_START, |
| 595 | OEN_SIP_END, |
| 596 | SMC_TYPE_FAST, |
| 597 | NULL, |
| 598 | sip_smc_handler |
| 599 | ); |
| 600 | |
| 601 | DECLARE_RT_SVC( |
Hadi Asyrafi | 4d9f395 | 2019-10-23 17:35:32 +0800 | [diff] [blame] | 602 | socfpga_sip_svc_std, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 603 | OEN_SIP_START, |
| 604 | OEN_SIP_END, |
| 605 | SMC_TYPE_YIELD, |
| 606 | NULL, |
| 607 | sip_smc_handler |
| 608 | ); |