Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 1 | /* |
Abdul Halim, Muhammad Hadi Asyrafi | 461f544 | 2020-07-03 13:22:09 +0800 | [diff] [blame^] | 2 | * Copyright (c) 2019-2022, ARM Limited and Contributors. All rights reserved. |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
| 8 | #include <common/debug.h> |
| 9 | #include <common/runtime_svc.h> |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 10 | #include <lib/mmio.h> |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 11 | #include <tools_share/uuid.h> |
| 12 | |
Hadi Asyrafi | 6f8a2b2 | 2019-10-23 18:34:14 +0800 | [diff] [blame] | 13 | #include "socfpga_mailbox.h" |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 14 | #include "socfpga_reset_manager.h" |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 15 | #include "socfpga_sip_svc.h" |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 16 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 17 | |
| 18 | /* Total buffer the driver can hold */ |
| 19 | #define FPGA_CONFIG_BUFFER_SIZE 4 |
| 20 | |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 21 | static int current_block, current_buffer; |
| 22 | static int read_block, max_blocks, is_partial_reconfig; |
| 23 | static uint32_t send_id, rcv_id; |
| 24 | static uint32_t bytes_per_block, blocks_submitted; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 25 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 26 | |
| 27 | /* SiP Service UUID */ |
| 28 | DEFINE_SVC_UUID2(intl_svc_uid, |
| 29 | 0xa85273b0, 0xe85a, 0x4862, 0xa6, 0x2a, |
| 30 | 0xfa, 0x88, 0x88, 0x17, 0x68, 0x81); |
| 31 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 32 | static uint64_t socfpga_sip_handler(uint32_t smc_fid, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 33 | uint64_t x1, |
| 34 | uint64_t x2, |
| 35 | uint64_t x3, |
| 36 | uint64_t x4, |
| 37 | void *cookie, |
| 38 | void *handle, |
| 39 | uint64_t flags) |
| 40 | { |
| 41 | ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid); |
| 42 | SMC_RET1(handle, SMC_UNK); |
| 43 | } |
| 44 | |
| 45 | struct fpga_config_info fpga_config_buffers[FPGA_CONFIG_BUFFER_SIZE]; |
| 46 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 47 | static int intel_fpga_sdm_write_buffer(struct fpga_config_info *buffer) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 48 | { |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 49 | uint32_t args[3]; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 50 | |
| 51 | while (max_blocks > 0 && buffer->size > buffer->size_written) { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 52 | args[0] = (1<<8); |
| 53 | args[1] = buffer->addr + buffer->size_written; |
| 54 | if (buffer->size - buffer->size_written <= bytes_per_block) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 55 | args[2] = buffer->size - buffer->size_written; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 56 | current_buffer++; |
| 57 | current_buffer %= FPGA_CONFIG_BUFFER_SIZE; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 58 | } else |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 59 | args[2] = bytes_per_block; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 60 | |
| 61 | buffer->size_written += args[2]; |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 62 | mailbox_send_cmd_async(&send_id, MBOX_RECONFIG_DATA, args, |
Abdul Halim, Muhammad Hadi Asyrafi | 118ab21 | 2020-10-15 15:27:18 +0800 | [diff] [blame] | 63 | 3U, CMD_INDIRECT); |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 64 | |
| 65 | buffer->subblocks_sent++; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 66 | max_blocks--; |
| 67 | } |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 68 | |
| 69 | return !max_blocks; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 70 | } |
| 71 | |
| 72 | static int intel_fpga_sdm_write_all(void) |
| 73 | { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 74 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) |
| 75 | if (intel_fpga_sdm_write_buffer( |
| 76 | &fpga_config_buffers[current_buffer])) |
| 77 | break; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 78 | return 0; |
| 79 | } |
| 80 | |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 81 | static uint32_t intel_mailbox_fpga_config_isdone(uint32_t query_type) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 82 | { |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 83 | uint32_t ret; |
| 84 | |
| 85 | if (query_type == 1) |
| 86 | ret = intel_mailbox_get_config_status(MBOX_CONFIG_STATUS); |
| 87 | else |
| 88 | ret = intel_mailbox_get_config_status(MBOX_RECONFIG_STATUS); |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 89 | |
| 90 | if (ret) { |
| 91 | if (ret == MBOX_CFGSTAT_STATE_CONFIG) |
| 92 | return INTEL_SIP_SMC_STATUS_BUSY; |
| 93 | else |
| 94 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 95 | } |
| 96 | |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 97 | if (query_type != 1) { |
| 98 | /* full reconfiguration */ |
| 99 | if (!is_partial_reconfig) |
| 100 | socfpga_bridges_enable(); /* Enable bridge */ |
| 101 | } |
| 102 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 103 | return INTEL_SIP_SMC_STATUS_OK; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 104 | } |
| 105 | |
| 106 | static int mark_last_buffer_xfer_completed(uint32_t *buffer_addr_completed) |
| 107 | { |
| 108 | int i; |
| 109 | |
| 110 | for (i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
| 111 | if (fpga_config_buffers[i].block_number == current_block) { |
| 112 | fpga_config_buffers[i].subblocks_sent--; |
| 113 | if (fpga_config_buffers[i].subblocks_sent == 0 |
| 114 | && fpga_config_buffers[i].size <= |
| 115 | fpga_config_buffers[i].size_written) { |
| 116 | fpga_config_buffers[i].write_requested = 0; |
| 117 | current_block++; |
| 118 | *buffer_addr_completed = |
| 119 | fpga_config_buffers[i].addr; |
| 120 | return 0; |
| 121 | } |
| 122 | } |
| 123 | } |
| 124 | |
| 125 | return -1; |
| 126 | } |
| 127 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 128 | static int intel_fpga_config_completed_write(uint32_t *completed_addr, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 129 | uint32_t *count, uint32_t *job_id) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 130 | { |
| 131 | uint32_t status = INTEL_SIP_SMC_STATUS_OK; |
| 132 | *count = 0; |
| 133 | int resp_len = 0; |
| 134 | uint32_t resp[5]; |
| 135 | int all_completed = 1; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 136 | |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 137 | while (*count < 3) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 138 | |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 139 | resp_len = mailbox_read_response(job_id, |
Abdul Halim, Muhammad Hadi Asyrafi | b45f15e | 2020-05-14 15:32:43 +0800 | [diff] [blame] | 140 | resp, ARRAY_SIZE(resp)); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 141 | |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 142 | if (resp_len < 0) |
| 143 | break; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 144 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 145 | max_blocks++; |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 146 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 147 | if (mark_last_buffer_xfer_completed( |
| 148 | &completed_addr[*count]) == 0) |
| 149 | *count = *count + 1; |
| 150 | else |
| 151 | break; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 152 | } |
| 153 | |
| 154 | if (*count <= 0) { |
| 155 | if (resp_len != MBOX_NO_RESPONSE && |
| 156 | resp_len != MBOX_TIMEOUT && resp_len != 0) { |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 157 | mailbox_clear_response(); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 158 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 159 | } |
| 160 | |
| 161 | *count = 0; |
| 162 | } |
| 163 | |
| 164 | intel_fpga_sdm_write_all(); |
| 165 | |
| 166 | if (*count > 0) |
| 167 | status = INTEL_SIP_SMC_STATUS_OK; |
| 168 | else if (*count == 0) |
| 169 | status = INTEL_SIP_SMC_STATUS_BUSY; |
| 170 | |
| 171 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
| 172 | if (fpga_config_buffers[i].write_requested != 0) { |
| 173 | all_completed = 0; |
| 174 | break; |
| 175 | } |
| 176 | } |
| 177 | |
| 178 | if (all_completed == 1) |
| 179 | return INTEL_SIP_SMC_STATUS_OK; |
| 180 | |
| 181 | return status; |
| 182 | } |
| 183 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 184 | static int intel_fpga_config_start(uint32_t config_type) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 185 | { |
| 186 | uint32_t response[3]; |
| 187 | int status = 0; |
| 188 | |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 189 | is_partial_reconfig = config_type; |
| 190 | |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 191 | mailbox_clear_response(); |
| 192 | |
Abdul Halim, Muhammad Hadi Asyrafi | 118ab21 | 2020-10-15 15:27:18 +0800 | [diff] [blame] | 193 | mailbox_send_cmd(1U, MBOX_CMD_CANCEL, NULL, 0U, CMD_CASUAL, NULL, 0U); |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 194 | |
Abdul Halim, Muhammad Hadi Asyrafi | 118ab21 | 2020-10-15 15:27:18 +0800 | [diff] [blame] | 195 | status = mailbox_send_cmd(1U, MBOX_RECONFIG, NULL, 0U, CMD_CASUAL, |
Abdul Halim, Muhammad Hadi Asyrafi | b45f15e | 2020-05-14 15:32:43 +0800 | [diff] [blame] | 196 | response, ARRAY_SIZE(response)); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 197 | |
| 198 | if (status < 0) |
| 199 | return status; |
| 200 | |
| 201 | max_blocks = response[0]; |
| 202 | bytes_per_block = response[1]; |
| 203 | |
| 204 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
| 205 | fpga_config_buffers[i].size = 0; |
| 206 | fpga_config_buffers[i].size_written = 0; |
| 207 | fpga_config_buffers[i].addr = 0; |
| 208 | fpga_config_buffers[i].write_requested = 0; |
| 209 | fpga_config_buffers[i].block_number = 0; |
| 210 | fpga_config_buffers[i].subblocks_sent = 0; |
| 211 | } |
| 212 | |
| 213 | blocks_submitted = 0; |
| 214 | current_block = 0; |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 215 | read_block = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 216 | current_buffer = 0; |
| 217 | |
Hadi Asyrafi | 36a9f30 | 2019-12-24 10:42:52 +0800 | [diff] [blame] | 218 | /* full reconfiguration */ |
| 219 | if (!is_partial_reconfig) { |
| 220 | /* Disable bridge */ |
| 221 | socfpga_bridges_disable(); |
| 222 | } |
| 223 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 224 | return 0; |
| 225 | } |
| 226 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 227 | static bool is_fpga_config_buffer_full(void) |
| 228 | { |
| 229 | for (int i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) |
| 230 | if (!fpga_config_buffers[i].write_requested) |
| 231 | return false; |
| 232 | return true; |
| 233 | } |
| 234 | |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 235 | bool is_address_in_ddr_range(uint64_t addr, uint64_t size) |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 236 | { |
Abdul Halim, Muhammad Hadi Asyrafi | 461f544 | 2020-07-03 13:22:09 +0800 | [diff] [blame^] | 237 | if (!addr && !size) { |
| 238 | return true; |
| 239 | } |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 240 | if (size > (UINT64_MAX - addr)) |
| 241 | return false; |
Abdul Halim, Muhammad Hadi Asyrafi | e59b999 | 2020-02-11 20:17:05 +0800 | [diff] [blame] | 242 | if (addr < BL31_LIMIT) |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 243 | return false; |
| 244 | if (addr + size > DRAM_BASE + DRAM_SIZE) |
| 245 | return false; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 246 | |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 247 | return true; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 248 | } |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 249 | |
Hadi Asyrafi | cee6aa9 | 2019-12-17 15:25:04 +0800 | [diff] [blame] | 250 | static uint32_t intel_fpga_config_write(uint64_t mem, uint64_t size) |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 251 | { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 252 | int i; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 253 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 254 | intel_fpga_sdm_write_all(); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 255 | |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 256 | if (!is_address_in_ddr_range(mem, size) || |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 257 | is_fpga_config_buffer_full()) |
| 258 | return INTEL_SIP_SMC_STATUS_REJECTED; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 259 | |
| 260 | for (i = 0; i < FPGA_CONFIG_BUFFER_SIZE; i++) { |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 261 | int j = (i + current_buffer) % FPGA_CONFIG_BUFFER_SIZE; |
| 262 | |
| 263 | if (!fpga_config_buffers[j].write_requested) { |
| 264 | fpga_config_buffers[j].addr = mem; |
| 265 | fpga_config_buffers[j].size = size; |
| 266 | fpga_config_buffers[j].size_written = 0; |
| 267 | fpga_config_buffers[j].write_requested = 1; |
| 268 | fpga_config_buffers[j].block_number = |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 269 | blocks_submitted++; |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 270 | fpga_config_buffers[j].subblocks_sent = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 271 | break; |
| 272 | } |
| 273 | } |
| 274 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 275 | if (is_fpga_config_buffer_full()) |
| 276 | return INTEL_SIP_SMC_STATUS_BUSY; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 277 | |
Hadi Asyrafi | f3a7c14 | 2019-11-12 16:29:03 +0800 | [diff] [blame] | 278 | return INTEL_SIP_SMC_STATUS_OK; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 279 | } |
| 280 | |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 281 | static int is_out_of_sec_range(uint64_t reg_addr) |
| 282 | { |
| 283 | switch (reg_addr) { |
| 284 | case(0xF8011100): /* ECCCTRL1 */ |
| 285 | case(0xF8011104): /* ECCCTRL2 */ |
| 286 | case(0xF8011110): /* ERRINTEN */ |
| 287 | case(0xF8011114): /* ERRINTENS */ |
| 288 | case(0xF8011118): /* ERRINTENR */ |
| 289 | case(0xF801111C): /* INTMODE */ |
| 290 | case(0xF8011120): /* INTSTAT */ |
| 291 | case(0xF8011124): /* DIAGINTTEST */ |
| 292 | case(0xF801112C): /* DERRADDRA */ |
| 293 | case(0xFFD12028): /* SDMMCGRP_CTRL */ |
| 294 | case(0xFFD12044): /* EMAC0 */ |
| 295 | case(0xFFD12048): /* EMAC1 */ |
| 296 | case(0xFFD1204C): /* EMAC2 */ |
| 297 | case(0xFFD12090): /* ECC_INT_MASK_VALUE */ |
| 298 | case(0xFFD12094): /* ECC_INT_MASK_SET */ |
| 299 | case(0xFFD12098): /* ECC_INT_MASK_CLEAR */ |
| 300 | case(0xFFD1209C): /* ECC_INTSTATUS_SERR */ |
| 301 | case(0xFFD120A0): /* ECC_INTSTATUS_DERR */ |
| 302 | case(0xFFD120C0): /* NOC_TIMEOUT */ |
| 303 | case(0xFFD120C4): /* NOC_IDLEREQ_SET */ |
| 304 | case(0xFFD120C8): /* NOC_IDLEREQ_CLR */ |
| 305 | case(0xFFD120D0): /* NOC_IDLEACK */ |
| 306 | case(0xFFD120D4): /* NOC_IDLESTATUS */ |
| 307 | case(0xFFD12200): /* BOOT_SCRATCH_COLD0 */ |
| 308 | case(0xFFD12204): /* BOOT_SCRATCH_COLD1 */ |
| 309 | case(0xFFD12220): /* BOOT_SCRATCH_COLD8 */ |
| 310 | case(0xFFD12224): /* BOOT_SCRATCH_COLD9 */ |
| 311 | return 0; |
| 312 | |
| 313 | default: |
| 314 | break; |
| 315 | } |
| 316 | |
| 317 | return -1; |
| 318 | } |
| 319 | |
| 320 | /* Secure register access */ |
| 321 | uint32_t intel_secure_reg_read(uint64_t reg_addr, uint32_t *retval) |
| 322 | { |
| 323 | if (is_out_of_sec_range(reg_addr)) |
| 324 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 325 | |
| 326 | *retval = mmio_read_32(reg_addr); |
| 327 | |
| 328 | return INTEL_SIP_SMC_STATUS_OK; |
| 329 | } |
| 330 | |
| 331 | uint32_t intel_secure_reg_write(uint64_t reg_addr, uint32_t val, |
| 332 | uint32_t *retval) |
| 333 | { |
| 334 | if (is_out_of_sec_range(reg_addr)) |
| 335 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 336 | |
| 337 | mmio_write_32(reg_addr, val); |
| 338 | |
| 339 | return intel_secure_reg_read(reg_addr, retval); |
| 340 | } |
| 341 | |
| 342 | uint32_t intel_secure_reg_update(uint64_t reg_addr, uint32_t mask, |
| 343 | uint32_t val, uint32_t *retval) |
| 344 | { |
| 345 | if (!intel_secure_reg_read(reg_addr, retval)) { |
| 346 | *retval &= ~mask; |
| 347 | *retval |= val; |
| 348 | return intel_secure_reg_write(reg_addr, *retval, retval); |
| 349 | } |
| 350 | |
| 351 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 352 | } |
| 353 | |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 354 | /* Intel Remote System Update (RSU) services */ |
| 355 | uint64_t intel_rsu_update_address; |
| 356 | |
Abdul Halim, Muhammad Hadi Asyrafi | 118ab21 | 2020-10-15 15:27:18 +0800 | [diff] [blame] | 357 | static uint32_t intel_rsu_status(uint64_t *respbuf, unsigned int respbuf_sz) |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 358 | { |
| 359 | if (mailbox_rsu_status((uint32_t *)respbuf, respbuf_sz) < 0) |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 360 | return INTEL_SIP_SMC_RSU_ERROR; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 361 | |
| 362 | return INTEL_SIP_SMC_STATUS_OK; |
| 363 | } |
| 364 | |
| 365 | static uint32_t intel_rsu_update(uint64_t update_address) |
| 366 | { |
| 367 | intel_rsu_update_address = update_address; |
| 368 | return INTEL_SIP_SMC_STATUS_OK; |
| 369 | } |
| 370 | |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 371 | static uint32_t intel_rsu_notify(uint32_t execution_stage) |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 372 | { |
Abdul Halim, Muhammad Hadi Asyrafi | e59b999 | 2020-02-11 20:17:05 +0800 | [diff] [blame] | 373 | if (mailbox_hps_stage_notify(execution_stage) < 0) |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 374 | return INTEL_SIP_SMC_RSU_ERROR; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 375 | |
| 376 | return INTEL_SIP_SMC_STATUS_OK; |
| 377 | } |
| 378 | |
| 379 | static uint32_t intel_rsu_retry_counter(uint32_t *respbuf, uint32_t respbuf_sz, |
| 380 | uint32_t *ret_stat) |
| 381 | { |
| 382 | if (mailbox_rsu_status((uint32_t *)respbuf, respbuf_sz) < 0) |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 383 | return INTEL_SIP_SMC_RSU_ERROR; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 384 | |
| 385 | *ret_stat = respbuf[8]; |
| 386 | return INTEL_SIP_SMC_STATUS_OK; |
| 387 | } |
| 388 | |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 389 | /* Mailbox services */ |
Abdul Halim, Muhammad Hadi Asyrafi | 118ab21 | 2020-10-15 15:27:18 +0800 | [diff] [blame] | 390 | static uint32_t intel_mbox_send_cmd(uint32_t cmd, uint32_t *args, uint32_t len, |
| 391 | uint32_t urgent, uint32_t *response, |
| 392 | uint32_t resp_len, int *mbox_status, |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 393 | int *len_in_resp) |
| 394 | { |
Abdul Halim, Muhammad Hadi Asyrafi | c39a0e0 | 2020-02-06 19:18:41 +0800 | [diff] [blame] | 395 | *len_in_resp = 0; |
| 396 | *mbox_status = 0; |
| 397 | |
| 398 | if (!is_address_in_ddr_range((uint64_t)args, sizeof(uint32_t) * len)) |
| 399 | return INTEL_SIP_SMC_STATUS_REJECTED; |
| 400 | |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 401 | int status = mailbox_send_cmd(MBOX_JOB_ID, cmd, args, len, urgent, |
| 402 | response, resp_len); |
| 403 | |
| 404 | if (status < 0) { |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 405 | *mbox_status = -status; |
| 406 | return INTEL_SIP_SMC_STATUS_ERROR; |
| 407 | } |
| 408 | |
| 409 | *mbox_status = 0; |
| 410 | *len_in_resp = status; |
| 411 | return INTEL_SIP_SMC_STATUS_OK; |
| 412 | } |
| 413 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 414 | /* |
| 415 | * This function is responsible for handling all SiP calls from the NS world |
| 416 | */ |
| 417 | |
| 418 | uintptr_t sip_smc_handler(uint32_t smc_fid, |
| 419 | u_register_t x1, |
| 420 | u_register_t x2, |
| 421 | u_register_t x3, |
| 422 | u_register_t x4, |
| 423 | void *cookie, |
| 424 | void *handle, |
| 425 | u_register_t flags) |
| 426 | { |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 427 | uint32_t retval = 0; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 428 | uint32_t status = INTEL_SIP_SMC_STATUS_OK; |
| 429 | uint32_t completed_addr[3]; |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 430 | uint64_t rsu_respbuf[9]; |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 431 | u_register_t x5, x6; |
| 432 | int mbox_status, len_in_resp; |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 433 | |
Abdul Halim, Muhammad Hadi Asyrafi | b45f15e | 2020-05-14 15:32:43 +0800 | [diff] [blame] | 434 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 435 | switch (smc_fid) { |
| 436 | case SIP_SVC_UID: |
| 437 | /* Return UID to the caller */ |
| 438 | SMC_UUID_RET(handle, intl_svc_uid); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 439 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 440 | case INTEL_SIP_SMC_FPGA_CONFIG_ISDONE: |
Hadi Asyrafi | 0c6dae2 | 2019-12-17 23:33:39 +0800 | [diff] [blame] | 441 | status = intel_mailbox_fpga_config_isdone(x1); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 442 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 443 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 444 | case INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM: |
| 445 | SMC_RET3(handle, INTEL_SIP_SMC_STATUS_OK, |
| 446 | INTEL_SIP_SMC_FPGA_CONFIG_ADDR, |
| 447 | INTEL_SIP_SMC_FPGA_CONFIG_SIZE - |
| 448 | INTEL_SIP_SMC_FPGA_CONFIG_ADDR); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 449 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 450 | case INTEL_SIP_SMC_FPGA_CONFIG_START: |
| 451 | status = intel_fpga_config_start(x1); |
| 452 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 453 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 454 | case INTEL_SIP_SMC_FPGA_CONFIG_WRITE: |
| 455 | status = intel_fpga_config_write(x1, x2); |
| 456 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 457 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 458 | case INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE: |
| 459 | status = intel_fpga_config_completed_write(completed_addr, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 460 | &retval, &rcv_id); |
| 461 | switch (retval) { |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 462 | case 1: |
| 463 | SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, |
| 464 | completed_addr[0], 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 465 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 466 | case 2: |
| 467 | SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, |
| 468 | completed_addr[0], |
| 469 | completed_addr[1], 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 470 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 471 | case 3: |
| 472 | SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, |
| 473 | completed_addr[0], |
| 474 | completed_addr[1], |
| 475 | completed_addr[2]); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 476 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 477 | case 0: |
| 478 | SMC_RET4(handle, status, 0, 0, 0); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 479 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 480 | default: |
Tien Hock, Loh | 500b232 | 2019-10-30 14:49:40 +0800 | [diff] [blame] | 481 | mailbox_clear_response(); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 482 | SMC_RET1(handle, INTEL_SIP_SMC_STATUS_ERROR); |
| 483 | } |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 484 | |
| 485 | case INTEL_SIP_SMC_REG_READ: |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 486 | status = intel_secure_reg_read(x1, &retval); |
| 487 | SMC_RET3(handle, status, retval, x1); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 488 | |
| 489 | case INTEL_SIP_SMC_REG_WRITE: |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 490 | status = intel_secure_reg_write(x1, (uint32_t)x2, &retval); |
| 491 | SMC_RET3(handle, status, retval, x1); |
Hadi Asyrafi | 6794230 | 2019-10-22 13:28:51 +0800 | [diff] [blame] | 492 | |
| 493 | case INTEL_SIP_SMC_REG_UPDATE: |
| 494 | status = intel_secure_reg_update(x1, (uint32_t)x2, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 495 | (uint32_t)x3, &retval); |
| 496 | SMC_RET3(handle, status, retval, x1); |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 497 | |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 498 | case INTEL_SIP_SMC_RSU_STATUS: |
| 499 | status = intel_rsu_status(rsu_respbuf, |
| 500 | ARRAY_SIZE(rsu_respbuf)); |
| 501 | if (status) { |
| 502 | SMC_RET1(handle, status); |
| 503 | } else { |
| 504 | SMC_RET4(handle, rsu_respbuf[0], rsu_respbuf[1], |
| 505 | rsu_respbuf[2], rsu_respbuf[3]); |
| 506 | } |
| 507 | |
| 508 | case INTEL_SIP_SMC_RSU_UPDATE: |
| 509 | status = intel_rsu_update(x1); |
| 510 | SMC_RET1(handle, status); |
| 511 | |
| 512 | case INTEL_SIP_SMC_RSU_NOTIFY: |
| 513 | status = intel_rsu_notify(x1); |
| 514 | SMC_RET1(handle, status); |
| 515 | |
| 516 | case INTEL_SIP_SMC_RSU_RETRY_COUNTER: |
| 517 | status = intel_rsu_retry_counter((uint32_t *)rsu_respbuf, |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 518 | ARRAY_SIZE(rsu_respbuf), &retval); |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 519 | if (status) { |
| 520 | SMC_RET1(handle, status); |
| 521 | } else { |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 522 | SMC_RET2(handle, status, retval); |
Hadi Asyrafi | 593c4c5 | 2019-12-17 19:22:17 +0800 | [diff] [blame] | 523 | } |
| 524 | |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 525 | case INTEL_SIP_SMC_MBOX_SEND_CMD: |
| 526 | x5 = SMC_GET_GP(handle, CTX_GPREG_X5); |
| 527 | x6 = SMC_GET_GP(handle, CTX_GPREG_X6); |
Abdul Halim, Muhammad Hadi Asyrafi | d84bfef | 2020-02-25 16:28:10 +0800 | [diff] [blame] | 528 | status = intel_mbox_send_cmd(x1, (uint32_t *)x2, x3, x4, |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 529 | (uint32_t *)x5, x6, &mbox_status, |
| 530 | &len_in_resp); |
| 531 | SMC_RET4(handle, status, mbox_status, x5, len_in_resp); |
| 532 | |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 533 | default: |
| 534 | return socfpga_sip_handler(smc_fid, x1, x2, x3, x4, |
| 535 | cookie, handle, flags); |
| 536 | } |
| 537 | } |
| 538 | |
| 539 | DECLARE_RT_SVC( |
Hadi Asyrafi | 4d9f395 | 2019-10-23 17:35:32 +0800 | [diff] [blame] | 540 | socfpga_sip_svc, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 541 | OEN_SIP_START, |
| 542 | OEN_SIP_END, |
| 543 | SMC_TYPE_FAST, |
| 544 | NULL, |
| 545 | sip_smc_handler |
| 546 | ); |
| 547 | |
| 548 | DECLARE_RT_SVC( |
Hadi Asyrafi | 4d9f395 | 2019-10-23 17:35:32 +0800 | [diff] [blame] | 549 | socfpga_sip_svc_std, |
Hadi Asyrafi | 616da77 | 2019-06-27 11:34:03 +0800 | [diff] [blame] | 550 | OEN_SIP_START, |
| 551 | OEN_SIP_END, |
| 552 | SMC_TYPE_YIELD, |
| 553 | NULL, |
| 554 | sip_smc_handler |
| 555 | ); |