Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 1 | /* |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 2 | * Copyright (c) 2019-2022, Intel Corporation. All rights reserved. |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef SOCFPGA_SIP_SVC_H |
| 8 | #define SOCFPGA_SIP_SVC_H |
| 9 | |
| 10 | |
| 11 | /* SiP status response */ |
| 12 | #define INTEL_SIP_SMC_STATUS_OK 0 |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 13 | #define INTEL_SIP_SMC_STATUS_BUSY 0x1 |
| 14 | #define INTEL_SIP_SMC_STATUS_REJECTED 0x2 |
Sieu Mun Tang | fd8a8ad | 2022-05-07 00:50:37 +0800 | [diff] [blame] | 15 | #define INTEL_SIP_SMC_STATUS_NO_RESPONSE 0x3 |
Abdul Halim, Muhammad Hadi Asyrafi | 25f623e | 2020-02-27 10:23:48 +0800 | [diff] [blame] | 16 | #define INTEL_SIP_SMC_STATUS_ERROR 0x4 |
| 17 | #define INTEL_SIP_SMC_RSU_ERROR 0x7 |
| 18 | |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 19 | /* SiP mailbox error code */ |
| 20 | #define GENERIC_RESPONSE_ERROR 0x3FF |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 21 | |
| 22 | /* SMC SiP service function identifier */ |
Abdul Halim, Muhammad Hadi Asyrafi | ec164b6 | 2020-05-14 14:53:29 +0800 | [diff] [blame] | 23 | |
| 24 | /* FPGA Reconfig */ |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 25 | #define INTEL_SIP_SMC_FPGA_CONFIG_START 0xC2000001 |
| 26 | #define INTEL_SIP_SMC_FPGA_CONFIG_WRITE 0x42000002 |
| 27 | #define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE 0xC2000003 |
| 28 | #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE 0xC2000004 |
| 29 | #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM 0xC2000005 |
Abdul Halim, Muhammad Hadi Asyrafi | ec164b6 | 2020-05-14 14:53:29 +0800 | [diff] [blame] | 30 | |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 31 | /* FPGA Bitstream Flag */ |
| 32 | #define FLAG_PARTIAL_CONFIG BIT(0) |
| 33 | #define FLAG_AUTHENTICATION BIT(1) |
| 34 | #define CONFIG_TEST_FLAG(_flag, _type) (((flag) & FLAG_##_type) \ |
| 35 | == FLAG_##_type) |
| 36 | |
Abdul Halim, Muhammad Hadi Asyrafi | ec164b6 | 2020-05-14 14:53:29 +0800 | [diff] [blame] | 37 | /* Secure Register Access */ |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 38 | #define INTEL_SIP_SMC_REG_READ 0xC2000007 |
| 39 | #define INTEL_SIP_SMC_REG_WRITE 0xC2000008 |
| 40 | #define INTEL_SIP_SMC_REG_UPDATE 0xC2000009 |
Abdul Halim, Muhammad Hadi Asyrafi | ec164b6 | 2020-05-14 14:53:29 +0800 | [diff] [blame] | 41 | |
| 42 | /* Remote System Update */ |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 43 | #define INTEL_SIP_SMC_RSU_STATUS 0xC200000B |
| 44 | #define INTEL_SIP_SMC_RSU_UPDATE 0xC200000C |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 45 | #define INTEL_SIP_SMC_RSU_NOTIFY 0xC200000E |
| 46 | #define INTEL_SIP_SMC_RSU_RETRY_COUNTER 0xC200000F |
Sieu Mun Tang | 9f22cbf | 2022-03-02 11:04:09 +0800 | [diff] [blame] | 47 | #define INTEL_SIP_SMC_RSU_DCMF_VERSION 0xC2000010 |
| 48 | #define INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION 0xC2000011 |
Chee Hong Ang | 681631b | 2020-07-01 14:22:25 +0800 | [diff] [blame] | 49 | #define INTEL_SIP_SMC_RSU_MAX_RETRY 0xC2000012 |
| 50 | #define INTEL_SIP_SMC_RSU_COPY_MAX_RETRY 0xC2000013 |
Sieu Mun Tang | e6d5de9 | 2022-04-28 22:21:01 +0800 | [diff] [blame] | 51 | #define INTEL_SIP_SMC_RSU_DCMF_STATUS 0xC2000014 |
| 52 | #define INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS 0xC2000015 |
Abdul Halim, Muhammad Hadi Asyrafi | ec164b6 | 2020-05-14 14:53:29 +0800 | [diff] [blame] | 53 | |
Kris Chaplin | e768dfa | 2021-06-25 11:31:52 +0100 | [diff] [blame] | 54 | /* Hardware monitor */ |
| 55 | #define INTEL_SIP_SMC_HWMON_READTEMP 0xC2000020 |
| 56 | #define INTEL_SIP_SMC_HWMON_READVOLT 0xC2000021 |
| 57 | #define TEMP_CHANNEL_MAX (1 << 15) |
| 58 | #define VOLT_CHANNEL_MAX (1 << 15) |
Sieu Mun Tang | dbcc2cf | 2022-03-07 12:13:04 +0800 | [diff] [blame] | 59 | |
| 60 | /* ECC */ |
| 61 | #define INTEL_SIP_SMC_ECC_DBE 0xC200000D |
| 62 | |
Sieu Mun Tang | a34b881 | 2022-03-17 03:11:55 +0800 | [diff] [blame] | 63 | /* Generic Command */ |
Sieu Mun Tang | 82cf5df | 2022-05-05 17:07:21 +0800 | [diff] [blame] | 64 | #define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032 |
Sieu Mun Tang | a34b881 | 2022-03-17 03:11:55 +0800 | [diff] [blame] | 65 | #define INTEL_SIP_SMC_GET_ROM_PATCH_SHA384 0xC2000040 |
| 66 | |
Abdul Halim, Muhammad Hadi Asyrafi | ec164b6 | 2020-05-14 14:53:29 +0800 | [diff] [blame] | 67 | /* Send Mailbox Command */ |
Hadi Asyrafi | a33e810 | 2019-12-17 19:30:41 +0800 | [diff] [blame] | 68 | #define INTEL_SIP_SMC_MBOX_SEND_CMD 0xC200001E |
Abdul Halim, Muhammad Hadi Asyrafi | d9006fc | 2021-02-05 11:50:58 +0800 | [diff] [blame] | 69 | #define INTEL_SIP_SMC_FIRMWARE_VERSION 0xC200001F |
Abdul Halim, Muhammad Hadi Asyrafi | b30ce3f | 2020-06-18 16:21:29 +0800 | [diff] [blame] | 70 | #define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032 |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 71 | |
Sieu Mun Tang | fd8a8ad | 2022-05-07 00:50:37 +0800 | [diff] [blame] | 72 | #define SERVICE_COMPLETED_MODE_ASYNC 0x00004F4E |
| 73 | |
Sieu Mun Tang | 2b8e005 | 2022-04-27 18:57:29 +0800 | [diff] [blame] | 74 | /* Mailbox Command */ |
| 75 | #define INTEL_SIP_SMC_GET_USERCODE 0xC200003D |
Abdul Halim, Muhammad Hadi Asyrafi | ec164b6 | 2020-05-14 14:53:29 +0800 | [diff] [blame] | 76 | |
Sieu Mun Tang | 128d2a7 | 2022-05-11 09:49:25 +0800 | [diff] [blame] | 77 | /* FPGA Crypto Services */ |
Sieu Mun Tang | fd8a8ad | 2022-05-07 00:50:37 +0800 | [diff] [blame] | 78 | #define INTEL_SIP_SMC_FCS_RANDOM_NUMBER 0xC200005A |
Sieu Mun Tang | e7a037f | 2022-05-10 17:18:19 +0800 | [diff] [blame] | 79 | #define INTEL_SIP_SMC_FCS_RANDOM_NUMBER_EXT 0x4200008F |
Sieu Mun Tang | 128d2a7 | 2022-05-11 09:49:25 +0800 | [diff] [blame] | 80 | #define INTEL_SIP_SMC_FCS_CRYPTION 0x4200005B |
Sieu Mun Tang | 22322fb | 2022-05-09 16:05:58 +0800 | [diff] [blame] | 81 | #define INTEL_SIP_SMC_FCS_CRYPTION_EXT 0xC2000090 |
Sieu Mun Tang | fd8a8ad | 2022-05-07 00:50:37 +0800 | [diff] [blame] | 82 | #define INTEL_SIP_SMC_FCS_SEND_CERTIFICATE 0x4200005D |
| 83 | #define INTEL_SIP_SMC_FCS_GET_PROVISION_DATA 0x4200005E |
| 84 | #define INTEL_SIP_SMC_FCS_CNTR_SET_PREAUTH 0xC200005F |
| 85 | #define INTEL_SIP_SMC_FCS_PSGSIGMA_TEARDOWN 0xC2000064 |
| 86 | #define INTEL_SIP_SMC_FCS_CHIP_ID 0xC2000065 |
| 87 | #define INTEL_SIP_SMC_FCS_ATTESTATION_SUBKEY 0xC2000066 |
| 88 | #define INTEL_SIP_SMC_FCS_ATTESTATION_MEASUREMENTS 0xC2000067 |
Sieu Mun Tang | 28af165 | 2022-05-09 10:48:53 +0800 | [diff] [blame] | 89 | #define INTEL_SIP_SMC_FCS_GET_ATTESTATION_CERT 0xC2000068 |
| 90 | #define INTEL_SIP_SMC_FCS_CREATE_CERT_ON_RELOAD 0xC2000069 |
Sieu Mun Tang | 16754e1 | 2022-05-09 12:08:42 +0800 | [diff] [blame] | 91 | #define INTEL_SIP_SMC_FCS_OPEN_CS_SESSION 0xC200006E |
| 92 | #define INTEL_SIP_SMC_FCS_CLOSE_CS_SESSION 0xC200006F |
Sieu Mun Tang | fb1f6e9 | 2022-05-09 14:16:14 +0800 | [diff] [blame] | 93 | #define INTEL_SIP_SMC_FCS_IMPORT_CS_KEY 0x42000070 |
| 94 | #define INTEL_SIP_SMC_FCS_EXPORT_CS_KEY 0xC2000071 |
| 95 | #define INTEL_SIP_SMC_FCS_REMOVE_CS_KEY 0xC2000072 |
| 96 | #define INTEL_SIP_SMC_FCS_GET_CS_KEY_INFO 0xC2000073 |
Sieu Mun Tang | b0c1d11 | 2022-05-10 17:30:00 +0800 | [diff] [blame] | 97 | #define INTEL_SIP_SMC_FCS_AES_CRYPT_INIT 0xC2000074 |
| 98 | #define INTEL_SIP_SMC_FCS_AES_CRYPT_FINALIZE 0x42000076 |
Sieu Mun Tang | d907cc3 | 2022-05-10 17:24:05 +0800 | [diff] [blame] | 99 | #define INTEL_SIP_SMC_FCS_GET_DIGEST_INIT 0xC2000077 |
| 100 | #define INTEL_SIP_SMC_FCS_GET_DIGEST_FINALIZE 0xC2000079 |
Sieu Mun Tang | 583149a | 2022-05-10 17:27:12 +0800 | [diff] [blame] | 101 | #define INTEL_SIP_SMC_FCS_MAC_VERIFY_INIT 0xC200007A |
| 102 | #define INTEL_SIP_SMC_FCS_MAC_VERIFY_FINALIZE 0xC200007C |
Sieu Mun Tang | 153ecfb | 2022-05-10 17:39:26 +0800 | [diff] [blame^] | 103 | #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_INIT 0xC2000080 |
| 104 | #define INTEL_SIP_SMC_FCS_ECDSA_SHA2_DATA_SIGN_FINALIZE 0xC2000082 |
Sieu Mun Tang | e2f3ede | 2022-05-10 17:36:32 +0800 | [diff] [blame] | 105 | #define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_INIT 0xC2000089 |
| 106 | #define INTEL_SIP_SMC_FCS_ECDSA_GET_PUBKEY_FINALIZE 0xC200008B |
Abdul Halim, Muhammad Hadi Asyrafi | ec164b6 | 2020-05-14 14:53:29 +0800 | [diff] [blame] | 107 | |
Sieu Mun Tang | d907cc3 | 2022-05-10 17:24:05 +0800 | [diff] [blame] | 108 | #define INTEL_SIP_SMC_FCS_SHA_MODE_MASK 0xF |
| 109 | #define INTEL_SIP_SMC_FCS_DIGEST_SIZE_MASK 0xF |
| 110 | #define INTEL_SIP_SMC_FCS_DIGEST_SIZE_OFFSET 4U |
Sieu Mun Tang | e2f3ede | 2022-05-10 17:36:32 +0800 | [diff] [blame] | 111 | #define INTEL_SIP_SMC_FCS_ECC_ALGO_MASK 0xF |
Sieu Mun Tang | dbcc2cf | 2022-03-07 12:13:04 +0800 | [diff] [blame] | 112 | /* ECC DBE */ |
| 113 | #define WARM_RESET_WFI_FLAG BIT(31) |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 114 | #define SYSMGR_ECC_DBE_COLD_RST_MASK (SYSMGR_ECC_OCRAM_MASK |\ |
Sieu Mun Tang | e7a037f | 2022-05-10 17:18:19 +0800 | [diff] [blame] | 115 | SYSMGR_ECC_DDR0_MASK |\ |
| 116 | SYSMGR_ECC_DDR1_MASK) |
Sieu Mun Tang | dbcc2cf | 2022-03-07 12:13:04 +0800 | [diff] [blame] | 117 | |
Sieu Mun Tang | f9cb657 | 2022-04-27 18:24:06 +0800 | [diff] [blame] | 118 | /* Non-mailbox SMC Call */ |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 119 | #define INTEL_SIP_SMC_SVC_VERSION 0xC2000200 |
Sieu Mun Tang | f9cb657 | 2022-04-27 18:24:06 +0800 | [diff] [blame] | 120 | |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 121 | /* SMC function IDs for SiP Service queries */ |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 122 | #define SIP_SVC_CALL_COUNT 0x8200ff00 |
| 123 | #define SIP_SVC_UID 0x8200ff01 |
| 124 | #define SIP_SVC_VERSION 0x8200ff03 |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 125 | |
| 126 | /* SiP Service Calls version numbers */ |
Sieu Mun Tang | 5406498 | 2022-04-28 22:40:58 +0800 | [diff] [blame] | 127 | #define SIP_SVC_VERSION_MAJOR 1 |
| 128 | #define SIP_SVC_VERSION_MINOR 0 |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 129 | |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 130 | |
| 131 | /* Structure Definitions */ |
| 132 | struct fpga_config_info { |
| 133 | uint32_t addr; |
| 134 | int size; |
| 135 | int size_written; |
| 136 | uint32_t write_requested; |
| 137 | int subblocks_sent; |
| 138 | int block_number; |
| 139 | }; |
| 140 | |
| 141 | /* Function Definitions */ |
Sieu Mun Tang | 128d2a7 | 2022-05-11 09:49:25 +0800 | [diff] [blame] | 142 | bool is_size_4_bytes_aligned(uint32_t size); |
Abdul Halim, Muhammad Hadi Asyrafi | 20a07f3 | 2020-05-18 11:16:48 +0800 | [diff] [blame] | 143 | bool is_address_in_ddr_range(uint64_t addr, uint64_t size); |
| 144 | |
Sieu Mun Tang | dbcc2cf | 2022-03-07 12:13:04 +0800 | [diff] [blame] | 145 | /* ECC DBE */ |
| 146 | bool cold_reset_for_ecc_dbe(void); |
| 147 | uint32_t intel_ecc_dbe_notification(uint64_t dbe_value); |
| 148 | |
Sieu Mun Tang | 82cf5df | 2022-05-05 17:07:21 +0800 | [diff] [blame] | 149 | /* Miscellaneous HPS services */ |
| 150 | uint32_t intel_hps_set_bridges(uint64_t enable, uint64_t mask); |
| 151 | |
Hadi Asyrafi | ab1132f | 2019-10-22 10:31:45 +0800 | [diff] [blame] | 152 | #endif /* SOCFPGA_SIP_SVC_H */ |