feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge
This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.
The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.
Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
diff --git a/plat/intel/soc/common/include/socfpga_sip_svc.h b/plat/intel/soc/common/include/socfpga_sip_svc.h
index 43f3dc4..ca6f1f8 100644
--- a/plat/intel/soc/common/include/socfpga_sip_svc.h
+++ b/plat/intel/soc/common/include/socfpga_sip_svc.h
@@ -60,6 +60,7 @@
#define INTEL_SIP_SMC_ECC_DBE 0xC200000D
/* Generic Command */
+#define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032
#define INTEL_SIP_SMC_GET_ROM_PATCH_SHA384 0xC2000040
/* Send Mailbox Command */
@@ -109,4 +110,7 @@
bool cold_reset_for_ecc_dbe(void);
uint32_t intel_ecc_dbe_notification(uint64_t dbe_value);
+/* Miscellaneous HPS services */
+uint32_t intel_hps_set_bridges(uint64_t enable, uint64_t mask);
+
#endif /* SOCFPGA_SIP_SVC_H */