blob: 33e7e1bcddb5ca8fa950e916ae15dce9ffa609cc [file] [log] [blame]
Hadi Asyrafiab1132f2019-10-22 10:31:45 +08001/*
2 * Copyright (c) 2019, Intel Corporation. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef SOCFPGA_SIP_SVC_H
8#define SOCFPGA_SIP_SVC_H
9
10
11/* SiP status response */
12#define INTEL_SIP_SMC_STATUS_OK 0
13#define INTEL_SIP_SMC_STATUS_ERROR 0x4
14#define INTEL_SIP_SMC_STATUS_BUSY 0x1
15#define INTEL_SIP_SMC_STATUS_REJECTED 0x2
16
17/* SMC SiP service function identifier */
18#define INTEL_SIP_SMC_FPGA_CONFIG_START 0xC2000001
19#define INTEL_SIP_SMC_FPGA_CONFIG_WRITE 0x42000002
20#define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE 0xC2000003
21#define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE 0xC2000004
22#define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM 0xC2000005
23#define INTEL_SIP_SMC_REG_READ 0xC2000007
24#define INTEL_SIP_SMC_REG_WRITE 0xC2000008
25#define INTEL_SIP_SMC_REG_UPDATE 0xC2000009
26#define INTEL_SIP_SMC_RSU_STATUS 0xC200000B
27#define INTEL_SIP_SMC_RSU_UPDATE 0xC200000C
28#define INTEL_SIP_LEGACY_SMC_ECC_DBE 0xC200000D
29#define INTEL_SIP_SMC_RSU_NOTIFY 0xC200000E
30#define INTEL_SIP_SMC_RSU_RETRY_COUNTER 0xC200000F
31
32/* FPGA config helpers */
33#define INTEL_SIP_SMC_FPGA_CONFIG_ADDR 0x1000
34#define INTEL_SIP_SMC_FPGA_CONFIG_SIZE 16777216
35
36/* SMC function IDs for SiP Service queries */
37#define SIP_SVC_CALL_COUNT 0x8200ff00
38#define SIP_SVC_UID 0x8200ff01
39#define SIP_SVC_VERSION 0x8200ff03
40
41/* SiP Service Calls version numbers */
42#define SIP_SVC_VERSION_MAJOR 0
43#define SIP_SVC_VERSION_MINOR 1
44
45#endif /* SOCFPGA_SIP_SVC_H */