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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk2cefd152004-02-08 22:55:38 +00002/*
wdenke65527f2004-02-12 00:47:09 +00003 * (C) Copyright 2002-2004
wdenk2cefd152004-02-08 22:55:38 +00004 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 *
6 * Copyright (C) 2003 Arabella Software Ltd.
7 * Yuli Barcohen <yuli@arabellasw.com>
wdenk2cefd152004-02-08 22:55:38 +00008 *
wdenke65527f2004-02-12 00:47:09 +00009 * Copyright (C) 2004
10 * Ed Okerson
Stefan Roese12797482006-11-13 13:55:24 +010011 *
12 * Copyright (C) 2006
13 * Tolunay Orkun <listmember@orkun.us>
wdenk2cefd152004-02-08 22:55:38 +000014 */
15
16/* The DEBUG define must be before common to enable debugging */
wdenk2ebee312004-02-23 19:30:57 +000017/* #define DEBUG */
18
wdenk2cefd152004-02-08 22:55:38 +000019#include <common.h>
Simon Glassa73bda42015-11-08 23:47:45 -070020#include <console.h>
Thomas Chou47eae232015-11-07 14:31:08 +080021#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060022#include <env.h>
Thomas Chou47eae232015-11-07 14:31:08 +080023#include <errno.h>
24#include <fdt_support.h>
Simon Glass8e201882020-05-10 11:39:54 -060025#include <flash.h>
Simon Glass97589732020-05-10 11:40:02 -060026#include <init.h>
Simon Glass9b61c7c2019-11-14 12:57:41 -070027#include <irq_func.h>
Simon Glass0f2af882020-05-10 11:40:05 -060028#include <log.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060029#include <asm/global_data.h>
wdenk2cefd152004-02-08 22:55:38 +000030#include <asm/processor.h>
Haiying Wangc123a382007-02-21 16:52:31 +010031#include <asm/io.h>
wdenkaeba06f2004-06-09 17:34:58 +000032#include <asm/byteorder.h>
Andrew Gabbasovc1592582013-05-14 12:27:52 -050033#include <asm/unaligned.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060034#include <env_internal.h>
Simon Glassdbd79542020-05-10 11:40:11 -060035#include <linux/delay.h>
Stefan Roese6e83e342009-10-27 15:15:55 +010036#include <mtd/cfi_flash.h>
Jens Scharsig (BuS Elektronik)287a1582012-01-27 09:29:53 +010037#include <watchdog.h>
wdenke537b3b2004-02-23 23:54:43 +000038
wdenk2cefd152004-02-08 22:55:38 +000039/*
Haavard Skinnemoend523e392007-12-13 12:56:28 +010040 * This file implements a Common Flash Interface (CFI) driver for
41 * U-Boot.
42 *
43 * The width of the port and the width of the chips are determined at
44 * initialization. These widths are used to calculate the address for
45 * access CFI data structures.
wdenk2cefd152004-02-08 22:55:38 +000046 *
47 * References
48 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
49 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
50 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
51 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese12797482006-11-13 13:55:24 +010052 * AMD CFI Specification, Release 2.0 December 1, 2001
53 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
54 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk2cefd152004-02-08 22:55:38 +000055 *
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020056 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocher800db312007-01-19 18:05:26 +010057 * reading and writing ... (yes there is such a Hardware).
wdenk2cefd152004-02-08 22:55:38 +000058 */
59
Thomas Chou47eae232015-11-07 14:31:08 +080060DECLARE_GLOBAL_DATA_PTR;
61
Haavard Skinnemoend523e392007-12-13 12:56:28 +010062static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Mike Frysingerc2c093d2010-12-22 09:41:13 -050063#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik2a7493c2008-11-17 15:49:32 +010064static uint flash_verbose = 1;
Mike Frysingerc2c093d2010-12-22 09:41:13 -050065#else
66#define flash_verbose 1
67#endif
Wolfgang Denkafa0dd02006-12-27 01:26:13 +010068
Wolfgang Denk9f5fb0f2008-08-08 16:39:54 +020069flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
70
Stefan Roesec865e6c2006-02-28 15:29:58 +010071/*
72 * Check if chip width is defined. If not, start detecting with 8bit.
73 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020074#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
75#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roesec865e6c2006-02-28 15:29:58 +010076#endif
77
Jeroen Hofstee4f517e62014-10-08 22:57:23 +020078#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
79#define __maybe_weak __weak
80#else
81#define __maybe_weak static
82#endif
83
Stefan Roeseab935642010-10-25 18:31:48 +020084/*
85 * 0xffff is an undefined value for the configuration register. When
86 * this value is returned, the configuration register shall not be
87 * written at all (default mode).
88 */
89static u16 cfi_flash_config_reg(int i)
90{
91#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
92 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
93#else
94 return 0xffff;
95#endif
96}
97
Stefan Roesefb9a7302010-08-31 10:00:10 +020098#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
Patrick Delaunayedfad172022-01-04 14:23:59 +010099int cfi_flash_num_flash_banks = CFI_MAX_FLASH_BANKS;
Mario Six28f18982018-01-26 14:43:56 +0100100#else
101int cfi_flash_num_flash_banks;
Stefan Roesefb9a7302010-08-31 10:00:10 +0200102#endif
103
Thomas Chou47eae232015-11-07 14:31:08 +0800104#ifdef CONFIG_CFI_FLASH /* for driver model */
105static void cfi_flash_init_dm(void)
106{
107 struct udevice *dev;
108
109 cfi_flash_num_flash_banks = 0;
110 /*
111 * The uclass_first_device() will probe the first device and
112 * uclass_next_device() will probe the rest if they exist. So
113 * that cfi_flash_probe() will get called assigning the base
114 * addresses that are available.
115 */
116 for (uclass_first_device(UCLASS_MTD, &dev);
117 dev;
118 uclass_next_device(&dev)) {
119 }
120}
121
Thomas Chou47eae232015-11-07 14:31:08 +0800122phys_addr_t cfi_flash_bank_addr(int i)
123{
Marek Vasut970940f2017-09-12 19:09:08 +0200124 return flash_info[i].base;
Thomas Chou47eae232015-11-07 14:31:08 +0800125}
126#else
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200127__weak phys_addr_t cfi_flash_bank_addr(int i)
Stefan Roese7e7dda82010-08-30 10:11:51 +0200128{
129 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
130}
Thomas Chou47eae232015-11-07 14:31:08 +0800131#endif
Stefan Roese7e7dda82010-08-30 10:11:51 +0200132
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200133__weak unsigned long cfi_flash_bank_size(int i)
Ilya Yanok755c1802010-10-21 17:20:12 +0200134{
135#ifdef CONFIG_SYS_FLASH_BANKS_SIZES
136 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
137#else
138 return 0;
139#endif
140}
Ilya Yanok755c1802010-10-21 17:20:12 +0200141
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200142__maybe_weak void flash_write8(u8 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100143{
144 __raw_writeb(value, addr);
145}
146
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200147__maybe_weak void flash_write16(u16 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100148{
149 __raw_writew(value, addr);
150}
151
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200152__maybe_weak void flash_write32(u32 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100153{
154 __raw_writel(value, addr);
155}
156
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200157__maybe_weak void flash_write64(u64 value, void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100158{
159 /* No architectures currently implement __raw_writeq() */
160 *(volatile u64 *)addr = value;
161}
162
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200163__maybe_weak u8 flash_read8(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100164{
165 return __raw_readb(addr);
166}
167
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200168__maybe_weak u16 flash_read16(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100169{
170 return __raw_readw(addr);
171}
172
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200173__maybe_weak u32 flash_read32(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100174{
175 return __raw_readl(addr);
176}
177
Jeroen Hofstee4f517e62014-10-08 22:57:23 +0200178__maybe_weak u64 flash_read64(void *addr)
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100179{
180 /* No architectures currently implement __raw_readq() */
181 return *(volatile u64 *)addr;
182}
183
wdenk2cefd152004-02-08 22:55:38 +0000184/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000185 */
Mario Sixbc762c12018-01-26 14:43:54 +0100186#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
Vignesh Raghavendra5b9d8002019-10-23 13:30:00 +0530187 (defined(CONFIG_SYS_MONITOR_BASE) && \
188 (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
Marek Vasuta26162d2017-08-20 17:20:00 +0200189static flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200190{
191 int i;
Masahiro Yamadac663b9a2013-05-17 14:50:37 +0900192 flash_info_t *info;
wdenk2cefd152004-02-08 22:55:38 +0000193
Patrick Delaunay6c5f5602022-01-04 14:23:58 +0100194 for (i = 0; i < CFI_FLASH_BANKS; i++) {
Masahiro Yamada44049f32013-05-17 14:50:36 +0900195 info = &flash_info[i];
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200196 if (info->size && info->start[0] <= base &&
197 base <= info->start[0] + info->size - 1)
Masahiro Yamadac663b9a2013-05-17 14:50:37 +0900198 return info;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200199 }
wdenk2cefd152004-02-08 22:55:38 +0000200
Masahiro Yamadac663b9a2013-05-17 14:50:37 +0900201 return NULL;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200202}
wdenk2cefd152004-02-08 22:55:38 +0000203#endif
204
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100205unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
206{
207 if (sect != (info->sector_count - 1))
208 return info->start[sect + 1] - info->start[sect];
209 else
210 return info->start[0] + info->size - info->start[sect];
211}
212
wdenke65527f2004-02-12 00:47:09 +0000213/*-----------------------------------------------------------------------
214 * create an address based on the offset and the port width
215 */
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100216static inline void *
Mario Six88f439f2018-01-26 14:43:32 +0100217flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
wdenke65527f2004-02-12 00:47:09 +0000218{
Stefan Roese70a90b72013-04-12 19:04:54 +0200219 unsigned int byte_offset = offset * info->portwidth;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100220
Jagannadha Sutradharudu Tekicb99a772021-02-26 08:51:49 +0100221 return (void *)(info->start[sect] + (byte_offset << info->chip_lsb));
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100222}
223
224static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
Mario Sixdde85502018-01-26 14:43:55 +0100225 unsigned int offset, void *addr)
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100226{
wdenke65527f2004-02-12 00:47:09 +0000227}
228
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200229/*-----------------------------------------------------------------------
230 * make a proper sized command based on the port and chip widths
231 */
Sebastian Siewior7746ed82008-07-15 13:35:23 +0200232static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200233{
234 int i;
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400235 int cword_offset;
236 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200237#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewiord528cd62008-07-16 20:04:49 +0200238 u32 cmd_le = cpu_to_le32(cmd);
239#endif
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400240 uchar val;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200241 uchar *cp = (uchar *) cmdbuf;
242
Mario Sixe2c07462018-01-26 14:43:33 +0100243 for (i = info->portwidth; i > 0; i--) {
Mario Sixa828c1e2018-01-26 14:43:36 +0100244 cword_offset = (info->portwidth - i) % info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200245#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400246 cp_offset = info->portwidth - i;
Mario Sixae0b9c72018-01-26 14:43:34 +0100247 val = *((uchar *)&cmd_le + cword_offset);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200248#else
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400249 cp_offset = i - 1;
Mario Sixae0b9c72018-01-26 14:43:34 +0100250 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200251#endif
Sebastian Siewior7746ed82008-07-15 13:35:23 +0200252 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenkoc47c0d42008-05-07 21:24:44 +0400253 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200254}
255
wdenk2cefd152004-02-08 22:55:38 +0000256#ifdef DEBUG
wdenke65527f2004-02-12 00:47:09 +0000257/*-----------------------------------------------------------------------
258 * Debug support
259 */
Mario Sixfa290692018-01-26 14:43:31 +0100260static void print_longlong(char *str, unsigned long long data)
wdenk2cefd152004-02-08 22:55:38 +0000261{
262 int i;
263 char *cp;
wdenke65527f2004-02-12 00:47:09 +0000264
Mario Sixa828c1e2018-01-26 14:43:36 +0100265 cp = (char *)&data;
wdenke65527f2004-02-12 00:47:09 +0000266 for (i = 0; i < 8; i++)
Mario Sixfa290692018-01-26 14:43:31 +0100267 sprintf(&str[i * 2], "%2.2x", *cp++);
wdenk2cefd152004-02-08 22:55:38 +0000268}
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200269
Mario Sixfa290692018-01-26 14:43:31 +0100270static void flash_printqry(struct cfi_qry *qry)
wdenke65527f2004-02-12 00:47:09 +0000271{
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100272 u8 *p = (u8 *)qry;
wdenke65527f2004-02-12 00:47:09 +0000273 int x, y;
274
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100275 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
276 debug("%02x : ", x);
277 for (y = 0; y < 16; y++)
278 debug("%2.2x ", p[x + y]);
279 debug(" ");
wdenke65527f2004-02-12 00:47:09 +0000280 for (y = 0; y < 16; y++) {
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100281 unsigned char c = p[x + y];
Mario Sixc7e359e2018-01-26 14:43:37 +0100282
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100283 if (c >= 0x20 && c <= 0x7e)
284 debug("%c", c);
285 else
286 debug(".");
wdenke65527f2004-02-12 00:47:09 +0000287 }
Haavard Skinnemoen53baec72007-12-14 15:36:16 +0100288 debug("\n");
wdenke65527f2004-02-12 00:47:09 +0000289 }
290}
wdenk2cefd152004-02-08 22:55:38 +0000291#endif
292
wdenk2cefd152004-02-08 22:55:38 +0000293/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000294 * read a character at a port width address
295 */
Mario Six88f439f2018-01-26 14:43:32 +0100296static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
wdenk2cefd152004-02-08 22:55:38 +0000297{
298 uchar *cp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100299 uchar retval;
wdenke65527f2004-02-12 00:47:09 +0000300
Mario Sixfa290692018-01-26 14:43:31 +0100301 cp = flash_map(info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200302#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100303 retval = flash_read8(cp);
wdenke65527f2004-02-12 00:47:09 +0000304#else
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100305 retval = flash_read8(cp + info->portwidth - 1);
wdenke65527f2004-02-12 00:47:09 +0000306#endif
Mario Sixfa290692018-01-26 14:43:31 +0100307 flash_unmap(info, 0, offset, cp);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100308 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000309}
310
311/*-----------------------------------------------------------------------
Tor Krill7f2a3052008-03-28 11:29:10 +0100312 * read a word at a port width address, assume 16bit bus
313 */
Mario Six88f439f2018-01-26 14:43:32 +0100314static inline ushort flash_read_word(flash_info_t *info, uint offset)
Tor Krill7f2a3052008-03-28 11:29:10 +0100315{
316 ushort *addr, retval;
317
Mario Sixfa290692018-01-26 14:43:31 +0100318 addr = flash_map(info, 0, offset);
319 retval = flash_read16(addr);
320 flash_unmap(info, 0, offset, addr);
Tor Krill7f2a3052008-03-28 11:29:10 +0100321 return retval;
322}
323
Tor Krill7f2a3052008-03-28 11:29:10 +0100324/*-----------------------------------------------------------------------
Stefan Roese12797482006-11-13 13:55:24 +0100325 * read a long word by picking the least significant byte of each maximum
wdenk2cefd152004-02-08 22:55:38 +0000326 * port size word. Swap for ppc format.
327 */
Mario Six88f439f2018-01-26 14:43:32 +0100328static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
Haavard Skinnemoen670a3232007-12-13 12:56:29 +0100329 uint offset)
wdenk2cefd152004-02-08 22:55:38 +0000330{
wdenke65527f2004-02-12 00:47:09 +0000331 uchar *addr;
332 ulong retval;
333
334#ifdef DEBUG
335 int x;
336#endif
Mario Sixfa290692018-01-26 14:43:31 +0100337 addr = flash_map(info, sect, offset);
wdenk2cefd152004-02-08 22:55:38 +0000338
wdenke65527f2004-02-12 00:47:09 +0000339#ifdef DEBUG
Mario Sixfa290692018-01-26 14:43:31 +0100340 debug("long addr is at %p info->portwidth = %d\n", addr,
Mario Sixdde85502018-01-26 14:43:55 +0100341 info->portwidth);
Mario Sixcbe41ca2018-01-26 14:43:38 +0100342 for (x = 0; x < 4 * info->portwidth; x++)
Mario Sixfa290692018-01-26 14:43:31 +0100343 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenke65527f2004-02-12 00:47:09 +0000344#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200345#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100346 retval = ((flash_read8(addr) << 16) |
347 (flash_read8(addr + info->portwidth) << 24) |
348 (flash_read8(addr + 2 * info->portwidth)) |
349 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenke65527f2004-02-12 00:47:09 +0000350#else
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100351 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
352 (flash_read8(addr + info->portwidth - 1) << 16) |
353 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
354 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenke65527f2004-02-12 00:47:09 +0000355#endif
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100356 flash_unmap(info, sect, offset, addr);
357
wdenke65527f2004-02-12 00:47:09 +0000358 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000359}
360
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200361/*
362 * Write a proper sized command to the correct address
Michael Schwingen73d044d2007-12-07 23:35:02 +0100363 */
Marek Vasuta26162d2017-08-20 17:20:00 +0200364static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
365 uint offset, u32 cmd)
Michael Schwingen73d044d2007-12-07 23:35:02 +0100366{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100367 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200368 cfiword_t cword;
Michael Schwingen73d044d2007-12-07 23:35:02 +0100369
Mario Sixfa290692018-01-26 14:43:31 +0100370 addr = flash_map(info, sect, offset);
371 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200372 switch (info->portwidth) {
373 case FLASH_CFI_8BIT:
Mario Sixfa290692018-01-26 14:43:31 +0100374 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Mario Sixdde85502018-01-26 14:43:55 +0100375 cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ryan Harkin316870c2015-10-23 16:50:51 +0100376 flash_write8(cword.w8, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200377 break;
378 case FLASH_CFI_16BIT:
Mario Sixfa290692018-01-26 14:43:31 +0100379 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Mario Sixdde85502018-01-26 14:43:55 +0100380 cmd, cword.w16,
381 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ryan Harkin316870c2015-10-23 16:50:51 +0100382 flash_write16(cword.w16, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200383 break;
384 case FLASH_CFI_32BIT:
Mario Sixfa290692018-01-26 14:43:31 +0100385 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
Mario Sixdde85502018-01-26 14:43:55 +0100386 cmd, cword.w32,
387 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ryan Harkin316870c2015-10-23 16:50:51 +0100388 flash_write32(cword.w32, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200389 break;
390 case FLASH_CFI_64BIT:
391#ifdef DEBUG
392 {
393 char str[20];
Haavard Skinnemoend523e392007-12-13 12:56:28 +0100394
Mario Sixfa290692018-01-26 14:43:31 +0100395 print_longlong(str, cword.w64);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200396
Mario Sixfa290692018-01-26 14:43:31 +0100397 debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Mario Sixdde85502018-01-26 14:43:55 +0100398 addr, cmd, str,
399 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Michael Schwingen73d044d2007-12-07 23:35:02 +0100400 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200401#endif
Ryan Harkin316870c2015-10-23 16:50:51 +0100402 flash_write64(cword.w64, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200403 break;
Michael Schwingen73d044d2007-12-07 23:35:02 +0100404 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200405
406 /* Ensure all the instructions are fully finished */
407 sync();
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100408
409 flash_unmap(info, sect, offset, addr);
Michael Schwingen73d044d2007-12-07 23:35:02 +0100410}
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200411
Mario Six88f439f2018-01-26 14:43:32 +0100412static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
Michael Schwingen73d044d2007-12-07 23:35:02 +0100413{
Mario Sixfa290692018-01-26 14:43:31 +0100414 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
415 flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
Michael Schwingen73d044d2007-12-07 23:35:02 +0100416}
Michael Schwingen73d044d2007-12-07 23:35:02 +0100417
418/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000419 */
Mario Sixdde85502018-01-26 14:43:55 +0100420static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
421 uchar cmd)
wdenk2cefd152004-02-08 22:55:38 +0000422{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100423 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200424 cfiword_t cword;
425 int retval;
wdenk2cefd152004-02-08 22:55:38 +0000426
Mario Sixfa290692018-01-26 14:43:31 +0100427 addr = flash_map(info, sect, offset);
428 flash_make_cmd(info, cmd, &cword);
Stefan Roeseefef95b2006-04-01 13:41:03 +0200429
Mario Sixfa290692018-01-26 14:43:31 +0100430 debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200431 switch (info->portwidth) {
432 case FLASH_CFI_8BIT:
Mario Sixfa290692018-01-26 14:43:31 +0100433 debug("is= %x %x\n", flash_read8(addr), cword.w8);
Ryan Harkin316870c2015-10-23 16:50:51 +0100434 retval = (flash_read8(addr) == cword.w8);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200435 break;
436 case FLASH_CFI_16BIT:
Mario Sixfa290692018-01-26 14:43:31 +0100437 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
Ryan Harkin316870c2015-10-23 16:50:51 +0100438 retval = (flash_read16(addr) == cword.w16);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200439 break;
440 case FLASH_CFI_32BIT:
Mario Sixfa290692018-01-26 14:43:31 +0100441 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
Ryan Harkin316870c2015-10-23 16:50:51 +0100442 retval = (flash_read32(addr) == cword.w32);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200443 break;
444 case FLASH_CFI_64BIT:
445#ifdef DEBUG
446 {
447 char str1[20];
448 char str2[20];
Michael Schwingen73d044d2007-12-07 23:35:02 +0100449
Mario Sixfa290692018-01-26 14:43:31 +0100450 print_longlong(str1, flash_read64(addr));
451 print_longlong(str2, cword.w64);
452 debug("is= %s %s\n", str1, str2);
wdenk2cefd152004-02-08 22:55:38 +0000453 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200454#endif
Ryan Harkin316870c2015-10-23 16:50:51 +0100455 retval = (flash_read64(addr) == cword.w64);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200456 break;
457 default:
458 retval = 0;
459 break;
460 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100461 flash_unmap(info, sect, offset, addr);
462
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200463 return retval;
464}
Stefan Roeseefef95b2006-04-01 13:41:03 +0200465
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200466/*-----------------------------------------------------------------------
467 */
Mario Sixdde85502018-01-26 14:43:55 +0100468static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
469 uchar cmd)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200470{
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100471 void *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200472 cfiword_t cword;
473 int retval;
Stefan Roeseefef95b2006-04-01 13:41:03 +0200474
Mario Sixfa290692018-01-26 14:43:31 +0100475 addr = flash_map(info, sect, offset);
476 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200477 switch (info->portwidth) {
478 case FLASH_CFI_8BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100479 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200480 break;
481 case FLASH_CFI_16BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100482 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200483 break;
484 case FLASH_CFI_32BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100485 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200486 break;
487 case FLASH_CFI_64BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100488 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200489 break;
490 default:
491 retval = 0;
492 break;
493 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100494 flash_unmap(info, sect, offset, addr);
495
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200496 return retval;
497}
Stefan Roeseefef95b2006-04-01 13:41:03 +0200498
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200499/*-----------------------------------------------------------------------
500 */
Mario Sixdde85502018-01-26 14:43:55 +0100501static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
502 uchar cmd)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200503{
Mario Sixf4bab852018-01-26 14:43:49 +0100504 u8 *addr;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200505 cfiword_t cword;
506 int retval;
wdenke85b7a52004-10-10 22:16:06 +0000507
Mario Sixfa290692018-01-26 14:43:31 +0100508 addr = flash_map(info, sect, offset);
509 flash_make_cmd(info, cmd, &cword);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200510 switch (info->portwidth) {
511 case FLASH_CFI_8BIT:
Stefan Roesecff2b492008-06-16 10:40:02 +0200512 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200513 break;
514 case FLASH_CFI_16BIT:
Stefan Roesecff2b492008-06-16 10:40:02 +0200515 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200516 break;
517 case FLASH_CFI_32BIT:
Stefan Roesecff2b492008-06-16 10:40:02 +0200518 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200519 break;
520 case FLASH_CFI_64BIT:
Mario Sixe2c07462018-01-26 14:43:33 +0100521 retval = ((flash_read32(addr) != flash_read32(addr)) ||
Mario Sixa828c1e2018-01-26 14:43:36 +0100522 (flash_read32(addr + 4) != flash_read32(addr + 4)));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200523 break;
524 default:
525 retval = 0;
526 break;
527 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100528 flash_unmap(info, sect, offset, addr);
529
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200530 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000531}
532
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200533/*
534 * flash_is_busy - check to see if the flash is busy
535 *
536 * This routine checks the status of the chip and returns true if the
537 * chip is busy.
wdenk2cefd152004-02-08 22:55:38 +0000538 */
Mario Six88f439f2018-01-26 14:43:32 +0100539static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
wdenk5c71a7a2005-05-16 15:23:22 +0000540{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200541 int retval;
wdenk5c71a7a2005-05-16 15:23:22 +0000542
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200543 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400544 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200545 case CFI_CMDSET_INTEL_STANDARD:
546 case CFI_CMDSET_INTEL_EXTENDED:
Mario Sixfa290692018-01-26 14:43:31 +0100547 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200548 break;
549 case CFI_CMDSET_AMD_STANDARD:
550 case CFI_CMDSET_AMD_EXTENDED:
551#ifdef CONFIG_FLASH_CFI_LEGACY
552 case CFI_CMDSET_AMD_LEGACY:
553#endif
Marek Vasut9b718472017-09-12 19:09:31 +0200554 if (info->sr_supported) {
Mario Sixfa290692018-01-26 14:43:31 +0100555 flash_write_cmd(info, sect, info->addr_unlock1,
Mario Sixdde85502018-01-26 14:43:55 +0100556 FLASH_CMD_READ_STATUS);
Mario Sixfa290692018-01-26 14:43:31 +0100557 retval = !flash_isset(info, sect, 0,
Mario Sixdde85502018-01-26 14:43:55 +0100558 FLASH_STATUS_DONE);
Marek Vasut9b718472017-09-12 19:09:31 +0200559 } else {
Mario Sixfa290692018-01-26 14:43:31 +0100560 retval = flash_toggle(info, sect, 0,
Mario Sixdde85502018-01-26 14:43:55 +0100561 AMD_STATUS_TOGGLE);
Marek Vasut9b718472017-09-12 19:09:31 +0200562 }
563
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200564 break;
565 default:
566 retval = 0;
wdenk5c71a7a2005-05-16 15:23:22 +0000567 }
Mario Six9355d552018-01-26 14:43:40 +0100568 debug("%s: %d\n", __func__, retval);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200569 return retval;
wdenk5c71a7a2005-05-16 15:23:22 +0000570}
571
572/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200573 * wait for XSR.7 to be set. Time out with an error if it does not.
574 * This routine does not set the flash to read-array mode.
wdenk5c71a7a2005-05-16 15:23:22 +0000575 */
Mario Six88f439f2018-01-26 14:43:32 +0100576static int flash_status_check(flash_info_t *info, flash_sect_t sector,
Mario Sixdde85502018-01-26 14:43:55 +0100577 ulong tout, char *prompt)
wdenk2cefd152004-02-08 22:55:38 +0000578{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200579 ulong start;
wdenk2cefd152004-02-08 22:55:38 +0000580
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200581#if CONFIG_SYS_HZ != 1000
Mario Sixbc762c12018-01-26 14:43:54 +0100582 /* Avoid overflow for large HZ */
Renato Andreolaac6693d2010-03-24 23:00:47 +0800583 if ((ulong)CONFIG_SYS_HZ > 100000)
Mario Sixbc762c12018-01-26 14:43:54 +0100584 tout *= (ulong)CONFIG_SYS_HZ / 1000;
Renato Andreolaac6693d2010-03-24 23:00:47 +0800585 else
586 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200587#endif
wdenk2cefd152004-02-08 22:55:38 +0000588
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200589 /* Wait for command completion */
Graeme Russ13ec42b2011-07-15 02:18:56 +0000590#ifdef CONFIG_SYS_LOW_RES_TIMER
Thomas Chou4b7e6682010-04-01 11:15:05 +0800591 reset_timer();
Graeme Russ13ec42b2011-07-15 02:18:56 +0000592#endif
Mario Sixfa290692018-01-26 14:43:31 +0100593 start = get_timer(0);
Jens Scharsig (BuS Elektronik)287a1582012-01-27 09:29:53 +0100594 WATCHDOG_RESET();
Mario Sixfa290692018-01-26 14:43:31 +0100595 while (flash_is_busy(info, sector)) {
596 if (get_timer(start) > tout) {
597 printf("Flash %s timeout at address %lx data %lx\n",
Mario Sixdde85502018-01-26 14:43:55 +0100598 prompt, info->start[sector],
599 flash_read_long(info, sector, 0));
Mario Sixfa290692018-01-26 14:43:31 +0100600 flash_write_cmd(info, sector, 0, info->cmd_reset);
Stefan Roese70a90b72013-04-12 19:04:54 +0200601 udelay(1);
Mario Six324b9402018-01-26 14:43:52 +0100602 return ERR_TIMEOUT;
wdenk2cefd152004-02-08 22:55:38 +0000603 }
Mario Sixfa290692018-01-26 14:43:31 +0100604 udelay(1); /* also triggers watchdog */
wdenk2cefd152004-02-08 22:55:38 +0000605 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200606 return ERR_OK;
607}
wdenk2cefd152004-02-08 22:55:38 +0000608
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200609/*-----------------------------------------------------------------------
610 * Wait for XSR.7 to be set, if it times out print an error, otherwise
611 * do a full status check.
612 *
613 * This routine sets the flash to read-array mode.
614 */
Mario Six88f439f2018-01-26 14:43:32 +0100615static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
Mario Sixdde85502018-01-26 14:43:55 +0100616 ulong tout, char *prompt)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200617{
618 int retcode;
wdenk2cefd152004-02-08 22:55:38 +0000619
Mario Sixfa290692018-01-26 14:43:31 +0100620 retcode = flash_status_check(info, sector, tout, prompt);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200621 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400622 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200623 case CFI_CMDSET_INTEL_EXTENDED:
624 case CFI_CMDSET_INTEL_STANDARD:
Mario Sixd1141c52018-01-26 14:43:42 +0100625 if (retcode == ERR_OK &&
Mario Sixdde85502018-01-26 14:43:55 +0100626 !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200627 retcode = ERR_INVAL;
Mario Sixfa290692018-01-26 14:43:31 +0100628 printf("Flash %s error at address %lx\n", prompt,
Mario Sixdde85502018-01-26 14:43:55 +0100629 info->start[sector]);
Mario Sixfa290692018-01-26 14:43:31 +0100630 if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200631 FLASH_STATUS_PSLBS)) {
Mario Sixfa290692018-01-26 14:43:31 +0100632 puts("Command Sequence Error.\n");
633 } else if (flash_isset(info, sector, 0,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200634 FLASH_STATUS_ECLBS)) {
Mario Sixfa290692018-01-26 14:43:31 +0100635 puts("Block Erase Error.\n");
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200636 retcode = ERR_NOT_ERASED;
Mario Sixfa290692018-01-26 14:43:31 +0100637 } else if (flash_isset(info, sector, 0,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200638 FLASH_STATUS_PSLBS)) {
Mario Sixfa290692018-01-26 14:43:31 +0100639 puts("Locking Error\n");
wdenk2cefd152004-02-08 22:55:38 +0000640 }
Mario Sixfa290692018-01-26 14:43:31 +0100641 if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
642 puts("Block locked.\n");
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200643 retcode = ERR_PROTECTED;
644 }
Mario Sixfa290692018-01-26 14:43:31 +0100645 if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
646 puts("Vpp Low Error.\n");
wdenk2cefd152004-02-08 22:55:38 +0000647 }
Mario Sixfa290692018-01-26 14:43:31 +0100648 flash_write_cmd(info, sector, 0, info->cmd_reset);
Aaron Williamsffcef2f2011-04-12 00:59:04 -0700649 udelay(1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200650 break;
651 default:
652 break;
wdenk2cefd152004-02-08 22:55:38 +0000653 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200654 return retcode;
wdenk2cefd152004-02-08 22:55:38 +0000655}
656
Thomas Chou076767a2010-03-26 08:17:00 +0800657static int use_flash_status_poll(flash_info_t *info)
658{
659#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
660 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
661 info->vendor == CFI_CMDSET_AMD_STANDARD)
662 return 1;
663#endif
664 return 0;
665}
666
667static int flash_status_poll(flash_info_t *info, void *src, void *dst,
668 ulong tout, char *prompt)
669{
670#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
671 ulong start;
672 int ready;
673
674#if CONFIG_SYS_HZ != 1000
Mario Sixbc762c12018-01-26 14:43:54 +0100675 /* Avoid overflow for large HZ */
Thomas Chou076767a2010-03-26 08:17:00 +0800676 if ((ulong)CONFIG_SYS_HZ > 100000)
Mario Sixbc762c12018-01-26 14:43:54 +0100677 tout *= (ulong)CONFIG_SYS_HZ / 1000;
Thomas Chou076767a2010-03-26 08:17:00 +0800678 else
679 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
680#endif
681
682 /* Wait for command completion */
Graeme Russ13ec42b2011-07-15 02:18:56 +0000683#ifdef CONFIG_SYS_LOW_RES_TIMER
Thomas Chou4b7e6682010-04-01 11:15:05 +0800684 reset_timer();
Graeme Russ13ec42b2011-07-15 02:18:56 +0000685#endif
Thomas Chou076767a2010-03-26 08:17:00 +0800686 start = get_timer(0);
Jens Scharsig (BuS Elektronik)287a1582012-01-27 09:29:53 +0100687 WATCHDOG_RESET();
Thomas Chou076767a2010-03-26 08:17:00 +0800688 while (1) {
689 switch (info->portwidth) {
690 case FLASH_CFI_8BIT:
691 ready = flash_read8(dst) == flash_read8(src);
692 break;
693 case FLASH_CFI_16BIT:
694 ready = flash_read16(dst) == flash_read16(src);
695 break;
696 case FLASH_CFI_32BIT:
697 ready = flash_read32(dst) == flash_read32(src);
698 break;
699 case FLASH_CFI_64BIT:
700 ready = flash_read64(dst) == flash_read64(src);
701 break;
702 default:
703 ready = 0;
704 break;
705 }
706 if (ready)
707 break;
708 if (get_timer(start) > tout) {
709 printf("Flash %s timeout at address %lx data %lx\n",
710 prompt, (ulong)dst, (ulong)flash_read8(dst));
Mario Six324b9402018-01-26 14:43:52 +0100711 return ERR_TIMEOUT;
Thomas Chou076767a2010-03-26 08:17:00 +0800712 }
713 udelay(1); /* also triggers watchdog */
714 }
715#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
716 return ERR_OK;
717}
718
wdenk2cefd152004-02-08 22:55:38 +0000719/*-----------------------------------------------------------------------
720 */
Mario Six88f439f2018-01-26 14:43:32 +0100721static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
wdenk2cefd152004-02-08 22:55:38 +0000722{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200723#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200724 unsigned short w;
725 unsigned int l;
726 unsigned long long ll;
727#endif
wdenk2cefd152004-02-08 22:55:38 +0000728
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200729 switch (info->portwidth) {
730 case FLASH_CFI_8BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100731 cword->w8 = c;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200732 break;
733 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200734#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200735 w = c;
736 w <<= 8;
Ryan Harkin316870c2015-10-23 16:50:51 +0100737 cword->w16 = (cword->w16 >> 8) | w;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200738#else
Ryan Harkin316870c2015-10-23 16:50:51 +0100739 cword->w16 = (cword->w16 << 8) | c;
Michael Schwingen73d044d2007-12-07 23:35:02 +0100740#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200741 break;
742 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200743#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200744 l = c;
745 l <<= 24;
Ryan Harkin316870c2015-10-23 16:50:51 +0100746 cword->w32 = (cword->w32 >> 8) | l;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200747#else
Ryan Harkin316870c2015-10-23 16:50:51 +0100748 cword->w32 = (cword->w32 << 8) | c;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200749#endif
750 break;
751 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200752#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200753 ll = c;
754 ll <<= 56;
Ryan Harkin316870c2015-10-23 16:50:51 +0100755 cword->w64 = (cword->w64 >> 8) | ll;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200756#else
Ryan Harkin316870c2015-10-23 16:50:51 +0100757 cword->w64 = (cword->w64 << 8) | c;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200758#endif
759 break;
Stefan Roese12797482006-11-13 13:55:24 +0100760 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200761}
wdenk2cefd152004-02-08 22:55:38 +0000762
Jens Gehrlein8ee4add2008-12-16 17:25:55 +0100763/*
764 * Loop through the sector table starting from the previously found sector.
765 * Searches forwards or backwards, dependent on the passed address.
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200766 */
Mario Six88f439f2018-01-26 14:43:32 +0100767static flash_sect_t find_sector(flash_info_t *info, ulong addr)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200768{
Kim Phillipsd303b862012-10-29 13:34:45 +0000769 static flash_sect_t saved_sector; /* previously found sector */
Stefan Roese70a90b72013-04-12 19:04:54 +0200770 static flash_info_t *saved_info; /* previously used flash bank */
Jens Gehrlein8ee4add2008-12-16 17:25:55 +0100771 flash_sect_t sector = saved_sector;
772
Mario Sixd1141c52018-01-26 14:43:42 +0100773 if (info != saved_info || sector >= info->sector_count)
Stefan Roese70a90b72013-04-12 19:04:54 +0200774 sector = 0;
775
Mario Sixaaf1a4a2018-01-26 14:43:53 +0100776 while ((sector < info->sector_count - 1) &&
Mario Sixdde85502018-01-26 14:43:55 +0100777 (info->start[sector] < addr))
Jens Gehrlein8ee4add2008-12-16 17:25:55 +0100778 sector++;
779 while ((info->start[sector] > addr) && (sector > 0))
780 /*
781 * also decrements the sector in case of an overshot
782 * in the first loop
783 */
784 sector--;
wdenk2cefd152004-02-08 22:55:38 +0000785
Jens Gehrlein8ee4add2008-12-16 17:25:55 +0100786 saved_sector = sector;
Stefan Roese70a90b72013-04-12 19:04:54 +0200787 saved_info = info;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200788 return sector;
wdenk2cefd152004-02-08 22:55:38 +0000789}
790
791/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000792 */
Mario Sixdde85502018-01-26 14:43:55 +0100793static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
wdenk2cefd152004-02-08 22:55:38 +0000794{
Becky Bruce9d1f6af2009-02-02 16:34:51 -0600795 void *dstaddr = (void *)dest;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200796 int flag;
Jens Gehrlein1e814cf2008-12-16 17:25:54 +0100797 flash_sect_t sect = 0;
798 char sect_found = 0;
wdenk2cefd152004-02-08 22:55:38 +0000799
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200800 /* Check if Flash is (sufficiently) erased */
801 switch (info->portwidth) {
802 case FLASH_CFI_8BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100803 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200804 break;
805 case FLASH_CFI_16BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100806 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200807 break;
808 case FLASH_CFI_32BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100809 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200810 break;
811 case FLASH_CFI_64BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100812 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200813 break;
814 default:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100815 flag = 0;
816 break;
wdenk2cefd152004-02-08 22:55:38 +0000817 }
Becky Bruce9d1f6af2009-02-02 16:34:51 -0600818 if (!flag)
Stefan Roese707c1462007-12-27 07:50:54 +0100819 return ERR_NOT_ERASED;
wdenk2cefd152004-02-08 22:55:38 +0000820
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200821 /* Disable interrupts which might cause a timeout here */
Mario Sixfa290692018-01-26 14:43:31 +0100822 flag = disable_interrupts();
Stefan Roesec865e6c2006-02-28 15:29:58 +0100823
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200824 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400825 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200826 case CFI_CMDSET_INTEL_EXTENDED:
827 case CFI_CMDSET_INTEL_STANDARD:
Mario Sixfa290692018-01-26 14:43:31 +0100828 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
829 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200830 break;
831 case CFI_CMDSET_AMD_EXTENDED:
832 case CFI_CMDSET_AMD_STANDARD:
Ed Swarthout2da14102008-10-09 01:26:36 -0500833 sect = find_sector(info, dest);
Mario Sixfa290692018-01-26 14:43:31 +0100834 flash_unlock_seq(info, sect);
835 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrlein1e814cf2008-12-16 17:25:54 +0100836 sect_found = 1;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200837 break;
Po-Yu Chuang3f483402009-07-10 18:03:57 +0800838#ifdef CONFIG_FLASH_CFI_LEGACY
839 case CFI_CMDSET_AMD_LEGACY:
840 sect = find_sector(info, dest);
Mario Sixfa290692018-01-26 14:43:31 +0100841 flash_unlock_seq(info, 0);
842 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
Po-Yu Chuang3f483402009-07-10 18:03:57 +0800843 sect_found = 1;
844 break;
845#endif
wdenk2cefd152004-02-08 22:55:38 +0000846 }
847
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200848 switch (info->portwidth) {
849 case FLASH_CFI_8BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100850 flash_write8(cword.w8, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200851 break;
852 case FLASH_CFI_16BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100853 flash_write16(cword.w16, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200854 break;
855 case FLASH_CFI_32BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100856 flash_write32(cword.w32, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200857 break;
858 case FLASH_CFI_64BIT:
Ryan Harkin316870c2015-10-23 16:50:51 +0100859 flash_write64(cword.w64, dstaddr);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200860 break;
wdenk2cefd152004-02-08 22:55:38 +0000861 }
862
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200863 /* re-enable interrupts if necessary */
864 if (flag)
Mario Sixfa290692018-01-26 14:43:31 +0100865 enable_interrupts();
wdenk2cefd152004-02-08 22:55:38 +0000866
Jens Gehrlein1e814cf2008-12-16 17:25:54 +0100867 if (!sect_found)
Mario Sixfa290692018-01-26 14:43:31 +0100868 sect = find_sector(info, dest);
Jens Gehrlein1e814cf2008-12-16 17:25:54 +0100869
Thomas Chou076767a2010-03-26 08:17:00 +0800870 if (use_flash_status_poll(info))
871 return flash_status_poll(info, &cword, dstaddr,
872 info->write_tout, "write");
873 else
874 return flash_full_status_check(info, sect,
875 info->write_tout, "write");
wdenk2cefd152004-02-08 22:55:38 +0000876}
877
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200878#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenk2cefd152004-02-08 22:55:38 +0000879
Mario Six88f439f2018-01-26 14:43:32 +0100880static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
Mario Sixdde85502018-01-26 14:43:55 +0100881 int len)
wdenk2cefd152004-02-08 22:55:38 +0000882{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200883 flash_sect_t sector;
884 int cnt;
885 int retcode;
Mario Sixf4bab852018-01-26 14:43:49 +0100886 u8 *src = cp;
887 u8 *dst = (u8 *)dest;
888 u8 *dst2 = dst;
Tao Houdd3b4552012-03-15 23:33:58 +0800889 int flag = 1;
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200890 uint offset = 0;
891 unsigned int shift;
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400892 uchar write_cmd;
Stefan Roese707c1462007-12-27 07:50:54 +0100893
894 switch (info->portwidth) {
895 case FLASH_CFI_8BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200896 shift = 0;
Stefan Roese707c1462007-12-27 07:50:54 +0100897 break;
898 case FLASH_CFI_16BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200899 shift = 1;
Stefan Roese707c1462007-12-27 07:50:54 +0100900 break;
901 case FLASH_CFI_32BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200902 shift = 2;
Stefan Roese707c1462007-12-27 07:50:54 +0100903 break;
904 case FLASH_CFI_64BIT:
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200905 shift = 3;
Stefan Roese707c1462007-12-27 07:50:54 +0100906 break;
907 default:
908 retcode = ERR_INVAL;
909 goto out_unmap;
910 }
911
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200912 cnt = len >> shift;
913
Tao Houdd3b4552012-03-15 23:33:58 +0800914 while ((cnt-- > 0) && (flag == 1)) {
Stefan Roese707c1462007-12-27 07:50:54 +0100915 switch (info->portwidth) {
916 case FLASH_CFI_8BIT:
917 flag = ((flash_read8(dst2) & flash_read8(src)) ==
918 flash_read8(src));
919 src += 1, dst2 += 1;
920 break;
921 case FLASH_CFI_16BIT:
922 flag = ((flash_read16(dst2) & flash_read16(src)) ==
923 flash_read16(src));
924 src += 2, dst2 += 2;
925 break;
926 case FLASH_CFI_32BIT:
927 flag = ((flash_read32(dst2) & flash_read32(src)) ==
928 flash_read32(src));
929 src += 4, dst2 += 4;
930 break;
931 case FLASH_CFI_64BIT:
932 flag = ((flash_read64(dst2) & flash_read64(src)) ==
933 flash_read64(src));
934 src += 8, dst2 += 8;
935 break;
936 }
937 }
938 if (!flag) {
939 retcode = ERR_NOT_ERASED;
940 goto out_unmap;
941 }
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100942
Stefan Roese707c1462007-12-27 07:50:54 +0100943 src = cp;
Mario Sixfa290692018-01-26 14:43:31 +0100944 sector = find_sector(info, dest);
wdenke65527f2004-02-12 00:47:09 +0000945
946 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400947 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk2cefd152004-02-08 22:55:38 +0000948 case CFI_CMDSET_INTEL_STANDARD:
949 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +0400950 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
Mario Sixbc762c12018-01-26 14:43:54 +0100951 FLASH_CMD_WRITE_BUFFER_PROG :
952 FLASH_CMD_WRITE_TO_BUFFER;
Mario Sixfa290692018-01-26 14:43:31 +0100953 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
954 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
955 flash_write_cmd(info, sector, 0, write_cmd);
956 retcode = flash_status_check(info, sector,
Mario Sixdde85502018-01-26 14:43:55 +0100957 info->buffer_write_tout,
958 "write to buffer");
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200959 if (retcode == ERR_OK) {
960 /* reduce the number of loops by the width of
Mario Six1ec6d342018-01-26 14:43:41 +0100961 * the port
962 */
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +0200963 cnt = len >> shift;
Mario Sixfa290692018-01-26 14:43:31 +0100964 flash_write_cmd(info, sector, 0, cnt - 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200965 while (cnt-- > 0) {
966 switch (info->portwidth) {
967 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100968 flash_write8(flash_read8(src), dst);
969 src += 1, dst += 1;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200970 break;
971 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100972 flash_write16(flash_read16(src), dst);
973 src += 2, dst += 2;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200974 break;
975 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100976 flash_write32(flash_read32(src), dst);
977 src += 4, dst += 4;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200978 break;
979 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +0100980 flash_write64(flash_read64(src), dst);
981 src += 8, dst += 8;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200982 break;
983 default:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100984 retcode = ERR_INVAL;
985 goto out_unmap;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200986 }
987 }
Mario Sixfa290692018-01-26 14:43:31 +0100988 flash_write_cmd(info, sector, 0,
Mario Sixdde85502018-01-26 14:43:55 +0100989 FLASH_CMD_WRITE_BUFFER_CONFIRM);
Mario Sixfa290692018-01-26 14:43:31 +0100990 retcode = flash_full_status_check(
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200991 info, sector, info->buffer_write_tout,
992 "buffer write");
993 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +0100994
995 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +0200996
wdenk2cefd152004-02-08 22:55:38 +0000997 case CFI_CMDSET_AMD_STANDARD:
998 case CFI_CMDSET_AMD_EXTENDED:
Rouven Behrb0805e22016-04-10 13:38:13 +0200999 flash_unlock_seq(info, sector);
Guennadi Liakhovetski183284f2008-04-03 13:36:02 +02001000
1001#ifdef CONFIG_FLASH_SPANSION_S29WS_N
1002 offset = ((unsigned long)dst - info->start[sector]) >> shift;
1003#endif
1004 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1005 cnt = len >> shift;
John Schmolleree355882009-08-12 10:55:47 -05001006 flash_write_cmd(info, sector, offset, cnt - 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001007
1008 switch (info->portwidth) {
1009 case FLASH_CFI_8BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +01001010 while (cnt-- > 0) {
1011 flash_write8(flash_read8(src), dst);
1012 src += 1, dst += 1;
1013 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001014 break;
1015 case FLASH_CFI_16BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +01001016 while (cnt-- > 0) {
1017 flash_write16(flash_read16(src), dst);
1018 src += 2, dst += 2;
1019 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001020 break;
1021 case FLASH_CFI_32BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +01001022 while (cnt-- > 0) {
1023 flash_write32(flash_read32(src), dst);
1024 src += 4, dst += 4;
1025 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001026 break;
1027 case FLASH_CFI_64BIT:
Haavard Skinnemoen21b95b42007-12-13 12:56:32 +01001028 while (cnt-- > 0) {
1029 flash_write64(flash_read64(src), dst);
1030 src += 8, dst += 8;
1031 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001032 break;
1033 default:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001034 retcode = ERR_INVAL;
1035 goto out_unmap;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001036 }
1037
Mario Sixfa290692018-01-26 14:43:31 +01001038 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
Thomas Chou076767a2010-03-26 08:17:00 +08001039 if (use_flash_status_poll(info))
1040 retcode = flash_status_poll(info, src - (1 << shift),
1041 dst - (1 << shift),
1042 info->buffer_write_tout,
1043 "buffer write");
1044 else
1045 retcode = flash_full_status_check(info, sector,
1046 info->buffer_write_tout,
1047 "buffer write");
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001048 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001049
wdenk2cefd152004-02-08 22:55:38 +00001050 default:
Mario Sixfa290692018-01-26 14:43:31 +01001051 debug("Unknown Command Set\n");
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001052 retcode = ERR_INVAL;
1053 break;
wdenk2cefd152004-02-08 22:55:38 +00001054 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001055
1056out_unmap:
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001057 return retcode;
wdenk2cefd152004-02-08 22:55:38 +00001058}
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001059#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001060
wdenk2cefd152004-02-08 22:55:38 +00001061/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +00001062 */
Mario Six88f439f2018-01-26 14:43:32 +01001063int flash_erase(flash_info_t *info, int s_first, int s_last)
wdenk2cefd152004-02-08 22:55:38 +00001064{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001065 int rcode = 0;
1066 int prot;
1067 flash_sect_t sect;
Thomas Chou076767a2010-03-26 08:17:00 +08001068 int st;
wdenk2cefd152004-02-08 22:55:38 +00001069
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001070 if (info->flash_id != FLASH_MAN_CFI) {
Mario Sixfa290692018-01-26 14:43:31 +01001071 puts("Can't erase unknown flash type - aborted\n");
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001072 return 1;
1073 }
Mario Sixd1141c52018-01-26 14:43:42 +01001074 if (s_first < 0 || s_first > s_last) {
Mario Sixfa290692018-01-26 14:43:31 +01001075 puts("- no sectors to erase\n");
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001076 return 1;
1077 }
Stefan Roeseefef95b2006-04-01 13:41:03 +02001078
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001079 prot = 0;
Mario Sixcbe41ca2018-01-26 14:43:38 +01001080 for (sect = s_first; sect <= s_last; ++sect)
1081 if (info->protect[sect])
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001082 prot++;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001083 if (prot) {
Mario Sixfa290692018-01-26 14:43:31 +01001084 printf("- Warning: %d protected sectors will not be erased!\n",
Mario Sixdde85502018-01-26 14:43:55 +01001085 prot);
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001086 } else if (flash_verbose) {
Mario Sixfa290692018-01-26 14:43:31 +01001087 putc('\n');
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001088 }
wdenke65527f2004-02-12 00:47:09 +00001089
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001090 for (sect = s_first; sect <= s_last; sect++) {
Joe Hershberger497c32f2012-08-17 15:36:41 -05001091 if (ctrlc()) {
1092 printf("\n");
1093 return 1;
1094 }
1095
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001096 if (info->protect[sect] == 0) { /* not protected */
Joe Hershberger7f3c2112012-08-17 15:36:40 -05001097#ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1098 int k;
1099 int size;
1100 int erased;
1101 u32 *flash;
1102
1103 /*
1104 * Check if whole sector is erased
1105 */
1106 size = flash_sector_size(info, sect);
1107 erased = 1;
1108 flash = (u32 *)info->start[sect];
1109 /* divide by 4 for longword access */
1110 size = size >> 2;
1111 for (k = 0; k < size; k++) {
1112 if (flash_read32(flash++) != 0xffffffff) {
1113 erased = 0;
1114 break;
1115 }
1116 }
1117 if (erased) {
1118 if (flash_verbose)
1119 putc(',');
1120 continue;
1121 }
1122#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001123 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001124 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001125 case CFI_CMDSET_INTEL_STANDARD:
1126 case CFI_CMDSET_INTEL_EXTENDED:
Mario Sixfa290692018-01-26 14:43:31 +01001127 flash_write_cmd(info, sect, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001128 FLASH_CMD_CLEAR_STATUS);
Mario Sixfa290692018-01-26 14:43:31 +01001129 flash_write_cmd(info, sect, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001130 FLASH_CMD_BLOCK_ERASE);
Mario Sixfa290692018-01-26 14:43:31 +01001131 flash_write_cmd(info, sect, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001132 FLASH_CMD_ERASE_CONFIRM);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001133 break;
1134 case CFI_CMDSET_AMD_STANDARD:
1135 case CFI_CMDSET_AMD_EXTENDED:
Mario Sixfa290692018-01-26 14:43:31 +01001136 flash_unlock_seq(info, sect);
1137 flash_write_cmd(info, sect,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001138 info->addr_unlock1,
1139 AMD_CMD_ERASE_START);
Mario Sixfa290692018-01-26 14:43:31 +01001140 flash_unlock_seq(info, sect);
1141 flash_write_cmd(info, sect, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001142 info->cmd_erase_sector);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001143 break;
1144#ifdef CONFIG_FLASH_CFI_LEGACY
1145 case CFI_CMDSET_AMD_LEGACY:
Mario Sixfa290692018-01-26 14:43:31 +01001146 flash_unlock_seq(info, 0);
1147 flash_write_cmd(info, 0, info->addr_unlock1,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001148 AMD_CMD_ERASE_START);
Mario Sixfa290692018-01-26 14:43:31 +01001149 flash_unlock_seq(info, 0);
1150 flash_write_cmd(info, sect, 0,
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001151 AMD_CMD_ERASE_SECTOR);
1152 break;
1153#endif
1154 default:
Mario Sixacf12082018-01-26 14:43:44 +01001155 debug("Unknown flash vendor %d\n",
Mario Sixdde85502018-01-26 14:43:55 +01001156 info->vendor);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001157 break;
wdenke65527f2004-02-12 00:47:09 +00001158 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001159
Thomas Chou076767a2010-03-26 08:17:00 +08001160 if (use_flash_status_poll(info)) {
Kim Phillipsd303b862012-10-29 13:34:45 +00001161 cfiword_t cword;
Thomas Chou076767a2010-03-26 08:17:00 +08001162 void *dest;
Mario Sixc7e359e2018-01-26 14:43:37 +01001163
Ryan Harkin316870c2015-10-23 16:50:51 +01001164 cword.w64 = 0xffffffffffffffffULL;
Thomas Chou076767a2010-03-26 08:17:00 +08001165 dest = flash_map(info, sect, 0);
1166 st = flash_status_poll(info, &cword, dest,
Mario Sixbc762c12018-01-26 14:43:54 +01001167 info->erase_blk_tout,
1168 "erase");
Thomas Chou076767a2010-03-26 08:17:00 +08001169 flash_unmap(info, sect, 0, dest);
Mario Six179b8d62018-01-26 14:43:43 +01001170 } else {
Thomas Chou076767a2010-03-26 08:17:00 +08001171 st = flash_full_status_check(info, sect,
1172 info->erase_blk_tout,
1173 "erase");
Mario Six179b8d62018-01-26 14:43:43 +01001174 }
1175
Thomas Chou076767a2010-03-26 08:17:00 +08001176 if (st)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001177 rcode = 1;
Thomas Chou076767a2010-03-26 08:17:00 +08001178 else if (flash_verbose)
Mario Sixfa290692018-01-26 14:43:31 +01001179 putc('.');
wdenk2cefd152004-02-08 22:55:38 +00001180 }
wdenk2cefd152004-02-08 22:55:38 +00001181 }
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001182
1183 if (flash_verbose)
Mario Sixfa290692018-01-26 14:43:31 +01001184 puts(" done\n");
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001185
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001186 return rcode;
wdenk2cefd152004-02-08 22:55:38 +00001187}
wdenke65527f2004-02-12 00:47:09 +00001188
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001189#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1190static int sector_erased(flash_info_t *info, int i)
1191{
1192 int k;
1193 int size;
Stefan Roesea9153f22010-10-25 18:31:39 +02001194 u32 *flash;
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001195
1196 /*
1197 * Check if whole sector is erased
1198 */
1199 size = flash_sector_size(info, i);
Stefan Roesea9153f22010-10-25 18:31:39 +02001200 flash = (u32 *)info->start[i];
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001201 /* divide by 4 for longword access */
1202 size = size >> 2;
1203
1204 for (k = 0; k < size; k++) {
Stefan Roesea9153f22010-10-25 18:31:39 +02001205 if (flash_read32(flash++) != 0xffffffff)
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001206 return 0; /* not erased */
1207 }
1208
1209 return 1; /* erased */
1210}
1211#endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1212
Mario Six88f439f2018-01-26 14:43:32 +01001213void flash_print_info(flash_info_t *info)
wdenk2cefd152004-02-08 22:55:38 +00001214{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001215 int i;
wdenk369d43d2004-03-14 14:09:05 +00001216
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001217 if (info->flash_id != FLASH_MAN_CFI) {
Mario Sixfa290692018-01-26 14:43:31 +01001218 puts("missing or unknown FLASH type\n");
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001219 return;
1220 }
1221
Mario Sixfa290692018-01-26 14:43:31 +01001222 printf("%s flash (%d x %d)",
Mario Sixdde85502018-01-26 14:43:55 +01001223 info->name,
1224 (info->portwidth << 3), (info->chipwidth << 3));
Mario Sixa828c1e2018-01-26 14:43:36 +01001225 if (info->size < 1024 * 1024)
Mario Sixfa290692018-01-26 14:43:31 +01001226 printf(" Size: %ld kB in %d Sectors\n",
Mario Sixdde85502018-01-26 14:43:55 +01001227 info->size >> 10, info->sector_count);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001228 else
Mario Sixfa290692018-01-26 14:43:31 +01001229 printf(" Size: %ld MB in %d Sectors\n",
Mario Sixdde85502018-01-26 14:43:55 +01001230 info->size >> 20, info->sector_count);
Mario Sixfa290692018-01-26 14:43:31 +01001231 printf(" ");
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001232 switch (info->vendor) {
Mario Six76857f02018-01-26 14:43:35 +01001233 case CFI_CMDSET_INTEL_PROG_REGIONS:
1234 printf("Intel Prog Regions");
1235 break;
1236 case CFI_CMDSET_INTEL_STANDARD:
1237 printf("Intel Standard");
1238 break;
1239 case CFI_CMDSET_INTEL_EXTENDED:
1240 printf("Intel Extended");
1241 break;
1242 case CFI_CMDSET_AMD_STANDARD:
1243 printf("AMD Standard");
1244 break;
1245 case CFI_CMDSET_AMD_EXTENDED:
1246 printf("AMD Extended");
1247 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001248#ifdef CONFIG_FLASH_CFI_LEGACY
Mario Six76857f02018-01-26 14:43:35 +01001249 case CFI_CMDSET_AMD_LEGACY:
1250 printf("AMD Legacy");
1251 break;
wdenk369d43d2004-03-14 14:09:05 +00001252#endif
Mario Six76857f02018-01-26 14:43:35 +01001253 default:
1254 printf("Unknown (%d)", info->vendor);
1255 break;
wdenk2cefd152004-02-08 22:55:38 +00001256 }
Mario Sixfa290692018-01-26 14:43:31 +01001257 printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
Mario Sixdde85502018-01-26 14:43:55 +01001258 info->manufacturer_id);
Mario Sixfa290692018-01-26 14:43:31 +01001259 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
Mario Sixdde85502018-01-26 14:43:55 +01001260 info->device_id);
Heiko Schocher27cea502011-04-11 14:16:19 +02001261 if ((info->device_id & 0xff) == 0x7E) {
1262 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
Mario Sixdde85502018-01-26 14:43:55 +01001263 info->device_id2);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001264 }
Mario Sixd1141c52018-01-26 14:43:42 +01001265 if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
Stefan Roesee442a902012-12-06 15:44:12 +01001266 printf("\n Advanced Sector Protection (PPB) enabled");
Mario Sixfa290692018-01-26 14:43:31 +01001267 printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
Mario Sixdde85502018-01-26 14:43:55 +01001268 info->erase_blk_tout, info->write_tout);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001269 if (info->buffer_size > 1) {
Mario Six246e5062018-01-26 14:43:50 +01001270 printf(" Buffer write timeout: %ld ms, ",
Mario Sixdde85502018-01-26 14:43:55 +01001271 info->buffer_write_tout);
Mario Six246e5062018-01-26 14:43:50 +01001272 printf("buffer size: %d bytes\n", info->buffer_size);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001273 }
wdenk2cefd152004-02-08 22:55:38 +00001274
Mario Sixfa290692018-01-26 14:43:31 +01001275 puts("\n Sector Start Addresses:");
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001276 for (i = 0; i < info->sector_count; ++i) {
Kim Phillipsc8836f12010-07-26 18:35:39 -05001277 if (ctrlc())
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001278 break;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001279 if ((i % 5) == 0)
Stefan Roeseb6f508d2010-08-13 09:36:36 +02001280 putc('\n');
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001281#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001282 /* print empty and read-only info */
Mario Sixfa290692018-01-26 14:43:31 +01001283 printf(" %08lX %c %s ",
Mario Sixdde85502018-01-26 14:43:55 +01001284 info->start[i],
1285 sector_erased(info, i) ? 'E' : ' ',
1286 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001287#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Mario Sixfa290692018-01-26 14:43:31 +01001288 printf(" %08lX %s ",
Mario Sixdde85502018-01-26 14:43:55 +01001289 info->start[i],
1290 info->protect[i] ? "RO" : " ");
wdenke65527f2004-02-12 00:47:09 +00001291#endif
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001292 }
Mario Sixfa290692018-01-26 14:43:31 +01001293 putc('\n');
wdenk2cefd152004-02-08 22:55:38 +00001294}
1295
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001296/*-----------------------------------------------------------------------
Jerry Van Barenaae73572008-03-08 13:48:01 -05001297 * This is used in a few places in write_buf() to show programming
1298 * progress. Making it a function is nasty because it needs to do side
1299 * effect updates to digit and dots. Repeated code is nasty too, so
1300 * we define it once here.
1301 */
Stefan Roese7758c162008-03-19 07:09:26 +01001302#ifdef CONFIG_FLASH_SHOW_PROGRESS
1303#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001304 if (flash_verbose) { \
1305 dots -= dots_sub; \
Mario Sixd1141c52018-01-26 14:43:42 +01001306 if (scale > 0 && dots <= 0) { \
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001307 if ((digit % 5) == 0) \
Mario Sixfa290692018-01-26 14:43:31 +01001308 printf("%d", digit / 5); \
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001309 else \
Mario Sixfa290692018-01-26 14:43:31 +01001310 putc('.'); \
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01001311 digit--; \
1312 dots += scale; \
1313 } \
Jerry Van Barenaae73572008-03-08 13:48:01 -05001314 }
Stefan Roese7758c162008-03-19 07:09:26 +01001315#else
1316#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1317#endif
Jerry Van Barenaae73572008-03-08 13:48:01 -05001318
1319/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001320 * Copy memory to flash, returns:
1321 * 0 - OK
1322 * 1 - write timeout
1323 * 2 - Flash not erased
wdenk2cefd152004-02-08 22:55:38 +00001324 */
Mario Six88f439f2018-01-26 14:43:32 +01001325int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
wdenk2cefd152004-02-08 22:55:38 +00001326{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001327 ulong wp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001328 uchar *p;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001329 int aln;
wdenk2cefd152004-02-08 22:55:38 +00001330 cfiword_t cword;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001331 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001332#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001333 int buffered_size;
wdenk2cefd152004-02-08 22:55:38 +00001334#endif
Jerry Van Barenaae73572008-03-08 13:48:01 -05001335#ifdef CONFIG_FLASH_SHOW_PROGRESS
1336 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1337 int scale = 0;
1338 int dots = 0;
1339
1340 /*
1341 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1342 */
1343 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1344 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1345 CONFIG_FLASH_SHOW_PROGRESS);
1346 }
1347#endif
1348
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001349 /* get lower aligned address */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001350 wp = (addr & ~(info->portwidth - 1));
Haiying Wangc123a382007-02-21 16:52:31 +01001351
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001352 /* handle unaligned start */
Mario Six6cf55742018-01-26 14:43:48 +01001353 aln = addr - wp;
1354 if (aln != 0) {
Ryan Harkin316870c2015-10-23 16:50:51 +01001355 cword.w32 = 0;
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001356 p = (uchar *)wp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001357 for (i = 0; i < aln; ++i)
Mario Sixfa290692018-01-26 14:43:31 +01001358 flash_add_byte(info, &cword, flash_read8(p + i));
wdenk2cefd152004-02-08 22:55:38 +00001359
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001360 for (; (i < info->portwidth) && (cnt > 0); i++) {
Mario Sixfa290692018-01-26 14:43:31 +01001361 flash_add_byte(info, &cword, *src++);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001362 cnt--;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001363 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001364 for (; (cnt == 0) && (i < info->portwidth); ++i)
Mario Sixfa290692018-01-26 14:43:31 +01001365 flash_add_byte(info, &cword, flash_read8(p + i));
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001366
Mario Sixfa290692018-01-26 14:43:31 +01001367 rc = flash_write_cfiword(info, wp, cword);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001368 if (rc != 0)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001369 return rc;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001370
1371 wp += i;
Stefan Roese7758c162008-03-19 07:09:26 +01001372 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001373 }
1374
1375 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001376#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001377 buffered_size = (info->portwidth / info->chipwidth);
1378 buffered_size *= info->buffer_size;
1379 while (cnt >= info->portwidth) {
1380 /* prohibit buffer write when buffer_size is 1 */
1381 if (info->buffer_size == 1) {
Ryan Harkin316870c2015-10-23 16:50:51 +01001382 cword.w32 = 0;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001383 for (i = 0; i < info->portwidth; i++)
Mario Sixfa290692018-01-26 14:43:31 +01001384 flash_add_byte(info, &cword, *src++);
Mario Six6cf55742018-01-26 14:43:48 +01001385 rc = flash_write_cfiword(info, wp, cword);
1386 if (rc != 0)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001387 return rc;
1388 wp += info->portwidth;
1389 cnt -= info->portwidth;
1390 continue;
1391 }
1392
1393 /* write buffer until next buffered_size aligned boundary */
1394 i = buffered_size - (wp % buffered_size);
1395 if (i > cnt)
1396 i = cnt;
Mario Six6cf55742018-01-26 14:43:48 +01001397 rc = flash_write_cfibuffer(info, wp, src, i);
1398 if (rc != ERR_OK)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001399 return rc;
1400 i -= i & (info->portwidth - 1);
1401 wp += i;
1402 src += i;
1403 cnt -= i;
Stefan Roese7758c162008-03-19 07:09:26 +01001404 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
Joe Hershberger497c32f2012-08-17 15:36:41 -05001405 /* Only check every once in a while */
1406 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1407 return ERR_ABORTED;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001408 }
1409#else
1410 while (cnt >= info->portwidth) {
Ryan Harkin316870c2015-10-23 16:50:51 +01001411 cword.w32 = 0;
Mario Sixcbe41ca2018-01-26 14:43:38 +01001412 for (i = 0; i < info->portwidth; i++)
Mario Sixfa290692018-01-26 14:43:31 +01001413 flash_add_byte(info, &cword, *src++);
Mario Six6cf55742018-01-26 14:43:48 +01001414 rc = flash_write_cfiword(info, wp, cword);
1415 if (rc != 0)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001416 return rc;
1417 wp += info->portwidth;
1418 cnt -= info->portwidth;
Stefan Roese7758c162008-03-19 07:09:26 +01001419 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
Joe Hershberger497c32f2012-08-17 15:36:41 -05001420 /* Only check every once in a while */
1421 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1422 return ERR_ABORTED;
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001423 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001424#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Barenaae73572008-03-08 13:48:01 -05001425
Mario Sixcbe41ca2018-01-26 14:43:38 +01001426 if (cnt == 0)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001427 return (0);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001428
1429 /*
1430 * handle unaligned tail bytes
1431 */
Ryan Harkin316870c2015-10-23 16:50:51 +01001432 cword.w32 = 0;
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001433 p = (uchar *)wp;
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001434 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
Mario Sixfa290692018-01-26 14:43:31 +01001435 flash_add_byte(info, &cword, *src++);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001436 --cnt;
1437 }
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001438 for (; i < info->portwidth; ++i)
Mario Sixfa290692018-01-26 14:43:31 +01001439 flash_add_byte(info, &cword, flash_read8(p + i));
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001440
Mario Sixfa290692018-01-26 14:43:31 +01001441 return flash_write_cfiword(info, wp, cword);
wdenk2cefd152004-02-08 22:55:38 +00001442}
wdenke65527f2004-02-12 00:47:09 +00001443
Stefan Roese92b1bca2012-12-06 15:44:09 +01001444static inline int manufact_match(flash_info_t *info, u32 manu)
1445{
1446 return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1447}
1448
wdenk2cefd152004-02-08 22:55:38 +00001449/*-----------------------------------------------------------------------
1450 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001451#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001452
Holger Brunck94c302d2012-08-09 10:22:41 +02001453static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1454{
Mario Six0c9be972018-01-26 14:43:39 +01001455 if (manufact_match(info, INTEL_MANUFACT) &&
Mario Sixdde85502018-01-26 14:43:55 +01001456 info->device_id == NUMONYX_256MBIT) {
Holger Brunck94c302d2012-08-09 10:22:41 +02001457 /*
1458 * see errata called
1459 * "Numonyx Axcell P33/P30 Specification Update" :)
1460 */
1461 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1462 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1463 prot)) {
1464 /*
1465 * cmd must come before FLASH_CMD_PROTECT + 20us
1466 * Disable interrupts which might cause a timeout here.
1467 */
1468 int flag = disable_interrupts();
1469 unsigned short cmd;
1470
1471 if (prot)
1472 cmd = FLASH_CMD_PROTECT_SET;
1473 else
1474 cmd = FLASH_CMD_PROTECT_CLEAR;
Andre Przywara90723f62016-11-16 00:50:06 +00001475
1476 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
Holger Brunck94c302d2012-08-09 10:22:41 +02001477 flash_write_cmd(info, sector, 0, cmd);
1478 /* re-enable interrupts if necessary */
1479 if (flag)
1480 enable_interrupts();
1481 }
1482 return 1;
1483 }
1484 return 0;
1485}
1486
Mario Six88f439f2018-01-26 14:43:32 +01001487int flash_real_protect(flash_info_t *info, long sector, int prot)
wdenk2cefd152004-02-08 22:55:38 +00001488{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001489 int retcode = 0;
wdenke65527f2004-02-12 00:47:09 +00001490
Rafael Campos13d2b612008-07-31 10:22:20 +02001491 switch (info->vendor) {
Mario Six76857f02018-01-26 14:43:35 +01001492 case CFI_CMDSET_INTEL_PROG_REGIONS:
1493 case CFI_CMDSET_INTEL_STANDARD:
1494 case CFI_CMDSET_INTEL_EXTENDED:
1495 if (!cfi_protect_bugfix(info, sector, prot)) {
1496 flash_write_cmd(info, sector, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001497 FLASH_CMD_CLEAR_STATUS);
Mario Six76857f02018-01-26 14:43:35 +01001498 flash_write_cmd(info, sector, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001499 FLASH_CMD_PROTECT);
Mario Six76857f02018-01-26 14:43:35 +01001500 if (prot)
Holger Brunck94c302d2012-08-09 10:22:41 +02001501 flash_write_cmd(info, sector, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001502 FLASH_CMD_PROTECT_SET);
Mario Six76857f02018-01-26 14:43:35 +01001503 else
Holger Brunck94c302d2012-08-09 10:22:41 +02001504 flash_write_cmd(info, sector, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001505 FLASH_CMD_PROTECT_CLEAR);
Mario Six76857f02018-01-26 14:43:35 +01001506 }
1507 break;
1508 case CFI_CMDSET_AMD_EXTENDED:
1509 case CFI_CMDSET_AMD_STANDARD:
1510 /* U-Boot only checks the first byte */
1511 if (manufact_match(info, ATM_MANUFACT)) {
1512 if (prot) {
1513 flash_unlock_seq(info, 0);
1514 flash_write_cmd(info, 0,
1515 info->addr_unlock1,
1516 ATM_CMD_SOFTLOCK_START);
1517 flash_unlock_seq(info, 0);
1518 flash_write_cmd(info, sector, 0,
1519 ATM_CMD_LOCK_SECT);
1520 } else {
1521 flash_write_cmd(info, 0,
1522 info->addr_unlock1,
1523 AMD_CMD_UNLOCK_START);
1524 if (info->device_id == ATM_ID_BV6416)
1525 flash_write_cmd(info, sector,
Mario Sixdde85502018-01-26 14:43:55 +01001526 0, ATM_CMD_UNLOCK_SECT);
Philippe De Muyterca6cd162010-08-17 18:40:25 +02001527 }
Mario Six76857f02018-01-26 14:43:35 +01001528 }
1529 if (info->legacy_unlock) {
1530 int flag = disable_interrupts();
1531 int lock_flag;
1532
1533 flash_unlock_seq(info, 0);
1534 flash_write_cmd(info, 0, info->addr_unlock1,
1535 AMD_CMD_SET_PPB_ENTRY);
1536 lock_flag = flash_isset(info, sector, 0, 0x01);
1537 if (prot) {
1538 if (lock_flag) {
1539 flash_write_cmd(info, sector, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001540 AMD_CMD_PPB_LOCK_BC1);
Mario Sixfa290692018-01-26 14:43:31 +01001541 flash_write_cmd(info, sector, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001542 AMD_CMD_PPB_LOCK_BC2);
Rafael Campos13d2b612008-07-31 10:22:20 +02001543 }
Mario Six76857f02018-01-26 14:43:35 +01001544 debug("sector %ld %slocked\n", sector,
Mario Sixdde85502018-01-26 14:43:55 +01001545 lock_flag ? "" : "already ");
Mario Six76857f02018-01-26 14:43:35 +01001546 } else {
1547 if (!lock_flag) {
1548 debug("unlock %ld\n", sector);
1549 flash_write_cmd(info, 0, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001550 AMD_CMD_PPB_UNLOCK_BC1);
Mario Six76857f02018-01-26 14:43:35 +01001551 flash_write_cmd(info, 0, 0,
Mario Sixdde85502018-01-26 14:43:55 +01001552 AMD_CMD_PPB_UNLOCK_BC2);
Anatolij Gustschin041b04f2012-08-09 08:18:12 +02001553 }
Mario Six76857f02018-01-26 14:43:35 +01001554 debug("sector %ld %sunlocked\n", sector,
Mario Sixdde85502018-01-26 14:43:55 +01001555 !lock_flag ? "" : "already ");
Mario Six76857f02018-01-26 14:43:35 +01001556 }
1557 if (flag)
1558 enable_interrupts();
Anatolij Gustschin041b04f2012-08-09 08:18:12 +02001559
Mario Six76857f02018-01-26 14:43:35 +01001560 if (flash_status_check(info, sector,
Mario Sixdde85502018-01-26 14:43:55 +01001561 info->erase_blk_tout,
1562 prot ? "protect" : "unprotect"))
Mario Six76857f02018-01-26 14:43:35 +01001563 printf("status check error\n");
Anatolij Gustschin041b04f2012-08-09 08:18:12 +02001564
Mario Six76857f02018-01-26 14:43:35 +01001565 flash_write_cmd(info, 0, 0,
1566 AMD_CMD_SET_PPB_EXIT_BC1);
1567 flash_write_cmd(info, 0, 0,
1568 AMD_CMD_SET_PPB_EXIT_BC2);
1569 }
1570 break;
TsiChung Liewb8c19292008-08-19 16:53:39 +00001571#ifdef CONFIG_FLASH_CFI_LEGACY
Mario Six76857f02018-01-26 14:43:35 +01001572 case CFI_CMDSET_AMD_LEGACY:
1573 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1574 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1575 if (prot)
Mario Sixbc762c12018-01-26 14:43:54 +01001576 flash_write_cmd(info, sector, 0,
1577 FLASH_CMD_PROTECT_SET);
Mario Six76857f02018-01-26 14:43:35 +01001578 else
Mario Sixbc762c12018-01-26 14:43:54 +01001579 flash_write_cmd(info, sector, 0,
1580 FLASH_CMD_PROTECT_CLEAR);
TsiChung Liewb8c19292008-08-19 16:53:39 +00001581#endif
Rafael Campos13d2b612008-07-31 10:22:20 +02001582 };
wdenk2cefd152004-02-08 22:55:38 +00001583
Stefan Roese5215df12010-10-25 18:31:29 +02001584 /*
1585 * Flash needs to be in status register read mode for
1586 * flash_full_status_check() to work correctly
1587 */
1588 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
Mario Six6cf55742018-01-26 14:43:48 +01001589 retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
Mario Sixdde85502018-01-26 14:43:55 +01001590 prot ? "protect" : "unprotect");
Mario Six6cf55742018-01-26 14:43:48 +01001591 if (retcode == 0) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001592 info->protect[sector] = prot;
1593
1594 /*
1595 * On some of Intel's flash chips (marked via legacy_unlock)
1596 * unprotect unprotects all locking.
1597 */
Mario Sixd1141c52018-01-26 14:43:42 +01001598 if (prot == 0 && info->legacy_unlock) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001599 flash_sect_t i;
1600
1601 for (i = 0; i < info->sector_count; i++) {
1602 if (info->protect[i])
Mario Sixfa290692018-01-26 14:43:31 +01001603 flash_real_protect(info, i, 1);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001604 }
wdenk2cefd152004-02-08 22:55:38 +00001605 }
wdenk2cefd152004-02-08 22:55:38 +00001606 }
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001607 return retcode;
wdenk2cefd152004-02-08 22:55:38 +00001608}
wdenke65527f2004-02-12 00:47:09 +00001609
wdenk2cefd152004-02-08 22:55:38 +00001610/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001611 * flash_read_user_serial - read the OneTimeProgramming cells
wdenk2cefd152004-02-08 22:55:38 +00001612 */
Mario Six88f439f2018-01-26 14:43:32 +01001613void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
Mario Sixdde85502018-01-26 14:43:55 +01001614 int len)
wdenk2cefd152004-02-08 22:55:38 +00001615{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001616 uchar *src;
1617 uchar *dst;
wdenke65527f2004-02-12 00:47:09 +00001618
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001619 dst = buffer;
Mario Sixfa290692018-01-26 14:43:31 +01001620 src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1621 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1622 memcpy(dst, src + offset, len);
1623 flash_write_cmd(info, 0, 0, info->cmd_reset);
Aaron Williamsffcef2f2011-04-12 00:59:04 -07001624 udelay(1);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001625 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk2cefd152004-02-08 22:55:38 +00001626}
1627
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001628/*
1629 * flash_read_factory_serial - read the device Id from the protection area
wdenk2cefd152004-02-08 22:55:38 +00001630 */
Mario Six88f439f2018-01-26 14:43:32 +01001631void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
Mario Sixdde85502018-01-26 14:43:55 +01001632 int len)
wdenk2cefd152004-02-08 22:55:38 +00001633{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001634 uchar *src;
wdenke65527f2004-02-12 00:47:09 +00001635
Mario Sixfa290692018-01-26 14:43:31 +01001636 src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1637 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1638 memcpy(buffer, src + offset, len);
1639 flash_write_cmd(info, 0, 0, info->cmd_reset);
Aaron Williamsffcef2f2011-04-12 00:59:04 -07001640 udelay(1);
Haavard Skinnemoene3ea1882007-12-13 12:56:34 +01001641 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk2cefd152004-02-08 22:55:38 +00001642}
1643
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001644#endif /* CONFIG_SYS_FLASH_PROTECTION */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001645
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001646/*-----------------------------------------------------------------------
1647 * Reverse the order of the erase regions in the CFI QRY structure.
1648 * This is needed for chips that are either a) correctly detected as
1649 * top-boot, or b) buggy.
1650 */
1651static void cfi_reverse_geometry(struct cfi_qry *qry)
1652{
1653 unsigned int i, j;
1654 u32 tmp;
1655
1656 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
Mario Sixd1141c52018-01-26 14:43:42 +01001657 tmp = get_unaligned(&qry->erase_region_info[i]);
1658 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1659 &qry->erase_region_info[i]);
1660 put_unaligned(tmp, &qry->erase_region_info[j]);
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001661 }
1662}
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001663
wdenk2cefd152004-02-08 22:55:38 +00001664/*-----------------------------------------------------------------------
Stefan Roese12797482006-11-13 13:55:24 +01001665 * read jedec ids from device and set corresponding fields in info struct
1666 *
1667 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1668 *
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001669 */
1670static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1671{
1672 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
Aaron Williamsffcef2f2011-04-12 00:59:04 -07001673 udelay(1);
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001674 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1675 udelay(1000); /* some flash are slow to respond */
Mario Sixfa290692018-01-26 14:43:31 +01001676 info->manufacturer_id = flash_read_uchar(info,
Mario Sixdde85502018-01-26 14:43:55 +01001677 FLASH_OFFSET_MANUFACTURER_ID);
Philippe De Muyter35bc0812010-08-10 16:54:52 +02001678 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
Mario Sixfa290692018-01-26 14:43:31 +01001679 flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1680 flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001681 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1682}
1683
1684static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1685{
1686 info->cmd_reset = FLASH_CMD_RESET;
1687
1688 cmdset_intel_read_jedec_ids(info);
1689 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1690
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001691#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001692 /* read legacy lock/unlock bit from intel flash */
1693 if (info->ext_addr) {
Mario Sixdde85502018-01-26 14:43:55 +01001694 info->legacy_unlock =
1695 flash_read_uchar(info, info->ext_addr + 5) & 0x08;
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001696 }
1697#endif
1698
1699 return 0;
1700}
1701
1702static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1703{
Mario Sixf8783d22018-01-26 14:43:51 +01001704 ushort bank_id = 0;
1705 uchar manu_id;
York Sunde067cd2017-11-18 11:09:08 -08001706 uchar feature;
Niklaus Gigerf447f712009-07-22 17:13:24 +02001707
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001708 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1709 flash_unlock_seq(info, 0);
1710 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1711 udelay(1000); /* some flash are slow to respond */
Tor Krill7f2a3052008-03-28 11:29:10 +01001712
Mario Sixf8783d22018-01-26 14:43:51 +01001713 manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
Niklaus Gigerf447f712009-07-22 17:13:24 +02001714 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
Mario Sixf8783d22018-01-26 14:43:51 +01001715 while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1716 bank_id += 0x100;
1717 manu_id = flash_read_uchar(info,
Mario Sixdde85502018-01-26 14:43:55 +01001718 bank_id | FLASH_OFFSET_MANUFACTURER_ID);
Niklaus Gigerf447f712009-07-22 17:13:24 +02001719 }
Mario Sixf8783d22018-01-26 14:43:51 +01001720 info->manufacturer_id = manu_id;
Tor Krill7f2a3052008-03-28 11:29:10 +01001721
York Sunde067cd2017-11-18 11:09:08 -08001722 debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1723 info->ext_addr, info->cfi_version);
1724 if (info->ext_addr && info->cfi_version >= 0x3134) {
1725 /* read software feature (at 0x53) */
1726 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1727 debug("feature = 0x%x\n", feature);
1728 info->sr_supported = feature & 0x1;
1729 }
Marek Vasut9b718472017-09-12 19:09:31 +02001730
Mario Sixe2c07462018-01-26 14:43:33 +01001731 switch (info->chipwidth) {
Tor Krill7f2a3052008-03-28 11:29:10 +01001732 case FLASH_CFI_8BIT:
Mario Sixfa290692018-01-26 14:43:31 +01001733 info->device_id = flash_read_uchar(info,
Mario Sixdde85502018-01-26 14:43:55 +01001734 FLASH_OFFSET_DEVICE_ID);
Tor Krill7f2a3052008-03-28 11:29:10 +01001735 if (info->device_id == 0x7E) {
1736 /* AMD 3-byte (expanded) device ids */
Mario Sixfa290692018-01-26 14:43:31 +01001737 info->device_id2 = flash_read_uchar(info,
Mario Sixdde85502018-01-26 14:43:55 +01001738 FLASH_OFFSET_DEVICE_ID2);
Tor Krill7f2a3052008-03-28 11:29:10 +01001739 info->device_id2 <<= 8;
Mario Sixfa290692018-01-26 14:43:31 +01001740 info->device_id2 |= flash_read_uchar(info,
Tor Krill7f2a3052008-03-28 11:29:10 +01001741 FLASH_OFFSET_DEVICE_ID3);
1742 }
1743 break;
1744 case FLASH_CFI_16BIT:
Mario Sixfa290692018-01-26 14:43:31 +01001745 info->device_id = flash_read_word(info,
Mario Sixdde85502018-01-26 14:43:55 +01001746 FLASH_OFFSET_DEVICE_ID);
Heiko Schocher27cea502011-04-11 14:16:19 +02001747 if ((info->device_id & 0xff) == 0x7E) {
1748 /* AMD 3-byte (expanded) device ids */
Mario Sixfa290692018-01-26 14:43:31 +01001749 info->device_id2 = flash_read_uchar(info,
Mario Sixdde85502018-01-26 14:43:55 +01001750 FLASH_OFFSET_DEVICE_ID2);
Heiko Schocher27cea502011-04-11 14:16:19 +02001751 info->device_id2 <<= 8;
Mario Sixfa290692018-01-26 14:43:31 +01001752 info->device_id2 |= flash_read_uchar(info,
Heiko Schocher27cea502011-04-11 14:16:19 +02001753 FLASH_OFFSET_DEVICE_ID3);
1754 }
Tor Krill7f2a3052008-03-28 11:29:10 +01001755 break;
1756 default:
1757 break;
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001758 }
1759 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
Aaron Williamsffcef2f2011-04-12 00:59:04 -07001760 udelay(1);
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001761}
1762
1763static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1764{
1765 info->cmd_reset = AMD_CMD_RESET;
Angelo Dureghello7ba30282012-12-01 01:14:18 +01001766 info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001767
1768 cmdset_amd_read_jedec_ids(info);
1769 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1770
Anatolij Gustschin041b04f2012-08-09 08:18:12 +02001771#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese7de65842012-12-06 15:44:11 +01001772 if (info->ext_addr) {
1773 /* read sector protect/unprotect scheme (at 0x49) */
1774 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
Anatolij Gustschin041b04f2012-08-09 08:18:12 +02001775 info->legacy_unlock = 1;
1776 }
1777#endif
1778
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01001779 return 0;
1780}
1781
1782#ifdef CONFIG_FLASH_CFI_LEGACY
Mario Six88f439f2018-01-26 14:43:32 +01001783static void flash_read_jedec_ids(flash_info_t *info)
Stefan Roese12797482006-11-13 13:55:24 +01001784{
1785 info->manufacturer_id = 0;
1786 info->device_id = 0;
1787 info->device_id2 = 0;
1788
1789 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001790 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese12797482006-11-13 13:55:24 +01001791 case CFI_CMDSET_INTEL_STANDARD:
1792 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen5fb0aa42008-01-12 20:29:47 +01001793 cmdset_intel_read_jedec_ids(info);
Stefan Roese12797482006-11-13 13:55:24 +01001794 break;
1795 case CFI_CMDSET_AMD_STANDARD:
1796 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen5fb0aa42008-01-12 20:29:47 +01001797 cmdset_amd_read_jedec_ids(info);
Stefan Roese12797482006-11-13 13:55:24 +01001798 break;
1799 default:
1800 break;
1801 }
1802}
1803
1804/*-----------------------------------------------------------------------
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001805 * Call board code to request info about non-CFI flash.
1806 * board_flash_get_legacy needs to fill in at least:
1807 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001808 */
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001809static int flash_detect_legacy(phys_addr_t base, int banknum)
wdenk2cefd152004-02-08 22:55:38 +00001810{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001811 flash_info_t *info = &flash_info[banknum];
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001812
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001813 if (board_flash_get_legacy(base, banknum, info)) {
1814 /* board code may have filled info completely. If not, we
Mario Six1ec6d342018-01-26 14:43:41 +01001815 * use JEDEC ID probing.
1816 */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001817 if (!info->vendor) {
1818 int modes[] = {
1819 CFI_CMDSET_AMD_STANDARD,
1820 CFI_CMDSET_INTEL_STANDARD
1821 };
1822 int i;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001823
Axel Lin85706c82013-06-23 00:56:46 +08001824 for (i = 0; i < ARRAY_SIZE(modes); i++) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001825 info->vendor = modes[i];
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001826 info->start[0] =
1827 (ulong)map_physmem(base,
Stefan Roeseb8443702009-02-05 11:44:52 +01001828 info->portwidth,
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001829 MAP_NOCACHE);
Mario Six0c9be972018-01-26 14:43:39 +01001830 if (info->portwidth == FLASH_CFI_8BIT &&
Mario Sixdde85502018-01-26 14:43:55 +01001831 info->interface == FLASH_CFI_X8X16) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001832 info->addr_unlock1 = 0x2AAA;
1833 info->addr_unlock2 = 0x5555;
1834 } else {
1835 info->addr_unlock1 = 0x5555;
1836 info->addr_unlock2 = 0x2AAA;
1837 }
1838 flash_read_jedec_ids(info);
1839 debug("JEDEC PROBE: ID %x %x %x\n",
Mario Sixdde85502018-01-26 14:43:55 +01001840 info->manufacturer_id,
1841 info->device_id,
1842 info->device_id2);
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001843 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001844 break;
Mario Six411ede32018-01-26 14:43:45 +01001845
1846 unmap_physmem((void *)info->start[0],
1847 info->portwidth);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001848 }
1849 }
1850
Mario Sixe2c07462018-01-26 14:43:33 +01001851 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04001852 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001853 case CFI_CMDSET_INTEL_STANDARD:
1854 case CFI_CMDSET_INTEL_EXTENDED:
1855 info->cmd_reset = FLASH_CMD_RESET;
1856 break;
1857 case CFI_CMDSET_AMD_STANDARD:
1858 case CFI_CMDSET_AMD_EXTENDED:
1859 case CFI_CMDSET_AMD_LEGACY:
1860 info->cmd_reset = AMD_CMD_RESET;
1861 break;
1862 }
1863 info->flash_id = FLASH_MAN_CFI;
1864 return 1;
1865 }
1866 return 0; /* use CFI */
1867}
1868#else
Becky Bruce9d1f6af2009-02-02 16:34:51 -06001869static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001870{
1871 return 0; /* use CFI */
1872}
1873#endif
1874
1875/*-----------------------------------------------------------------------
1876 * detect if flash is compatible with the Common Flash Interface (CFI)
1877 * http://www.jedec.org/download/search/jesd68.pdf
1878 */
Mario Sixdde85502018-01-26 14:43:55 +01001879static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1880 size_t len)
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001881{
1882 u8 *p = buf;
1883 unsigned int i;
1884
1885 for (i = 0; i < len; i++)
Stefan Roese70a90b72013-04-12 19:04:54 +02001886 p[i] = flash_read_uchar(info, start + i);
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001887}
Stefan Roese6e83e342009-10-27 15:15:55 +01001888
Kim Phillipsd303b862012-10-29 13:34:45 +00001889static void __flash_cmd_reset(flash_info_t *info)
Stefan Roese6e83e342009-10-27 15:15:55 +01001890{
1891 /*
1892 * We do not yet know what kind of commandset to use, so we issue
1893 * the reset command in both Intel and AMD variants, in the hope
1894 * that AMD flash roms ignore the Intel command.
1895 */
1896 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
Aaron Williamsffcef2f2011-04-12 00:59:04 -07001897 udelay(1);
Stefan Roese6e83e342009-10-27 15:15:55 +01001898 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1899}
Mario Sixc7e359e2018-01-26 14:43:37 +01001900
Stefan Roese6e83e342009-10-27 15:15:55 +01001901void flash_cmd_reset(flash_info_t *info)
Mario Sixa828c1e2018-01-26 14:43:36 +01001902 __attribute__((weak, alias("__flash_cmd_reset")));
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001903
Mario Six88f439f2018-01-26 14:43:32 +01001904static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001905{
1906 int cfi_offset;
1907
Stefan Roese70a90b72013-04-12 19:04:54 +02001908 /* Issue FLASH reset command */
1909 flash_cmd_reset(info);
1910
Axel Lin85706c82013-06-23 00:56:46 +08001911 for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001912 cfi_offset++) {
Mario Sixfa290692018-01-26 14:43:31 +01001913 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
Mario Sixdde85502018-01-26 14:43:55 +01001914 FLASH_CMD_CFI);
Mario Six0c9be972018-01-26 14:43:39 +01001915 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
Mario Sixbc762c12018-01-26 14:43:54 +01001916 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1917 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Mario Sixdde85502018-01-26 14:43:55 +01001918 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1919 sizeof(struct cfi_qry));
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01001920 info->interface = le16_to_cpu(qry->interface_desc);
Jagannadha Sutradharudu Tekicb99a772021-02-26 08:51:49 +01001921 /* Some flash chips can support multiple bus widths.
1922 * In this case, override the interface width and
1923 * limit it to the port width.
1924 */
1925 if ((info->interface == FLASH_CFI_X8X16) &&
1926 (info->portwidth == FLASH_CFI_8BIT)) {
1927 debug("Overriding 16-bit interface width to"
1928 " 8-bit port width\n");
1929 info->interface = FLASH_CFI_X8;
1930 } else if ((info->interface == FLASH_CFI_X16X32) &&
1931 (info->portwidth == FLASH_CFI_16BIT)) {
1932 debug("Overriding 16-bit interface width to"
1933 " 16-bit port width\n");
1934 info->interface = FLASH_CFI_X16;
1935 }
Stefan Roese70a90b72013-04-12 19:04:54 +02001936
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001937 info->cfi_offset = flash_offset_cfi[cfi_offset];
Mario Sixfa290692018-01-26 14:43:31 +01001938 debug("device interface is %d\n",
Mario Sixdde85502018-01-26 14:43:55 +01001939 info->interface);
Jagannadha Sutradharudu Tekicb99a772021-02-26 08:51:49 +01001940 debug("found port %d chip %d chip_lsb %d ",
1941 info->portwidth, info->chipwidth, info->chip_lsb);
Mario Sixfa290692018-01-26 14:43:31 +01001942 debug("port %d bits chip %d bits\n",
Mario Sixdde85502018-01-26 14:43:55 +01001943 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1944 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02001945
1946 /* calculate command offsets as in the Linux driver */
Stefan Roese70a90b72013-04-12 19:04:54 +02001947 info->addr_unlock1 = 0x555;
1948 info->addr_unlock2 = 0x2aa;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001949
1950 /*
1951 * modify the unlock address if we are
1952 * in compatibility mode
1953 */
Mario Sixe2c07462018-01-26 14:43:33 +01001954 if (/* x8/x16 in x8 mode */
Mario Sixd1141c52018-01-26 14:43:42 +01001955 (info->chipwidth == FLASH_CFI_BY8 &&
1956 info->interface == FLASH_CFI_X8X16) ||
Mario Sixe2c07462018-01-26 14:43:33 +01001957 /* x16/x32 in x16 mode */
Mario Sixd1141c52018-01-26 14:43:42 +01001958 (info->chipwidth == FLASH_CFI_BY16 &&
Mario Sixc4b85c32018-01-26 14:43:46 +01001959 info->interface == FLASH_CFI_X16X32)) {
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001960 info->addr_unlock1 = 0xaaa;
1961 info->addr_unlock2 = 0x555;
1962 }
1963
1964 info->name = "CFI conformant";
1965 return 1;
1966 }
1967 }
1968
1969 return 0;
1970}
1971
Mario Six88f439f2018-01-26 14:43:32 +01001972static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001973{
Mario Sixfa290692018-01-26 14:43:31 +01001974 debug("flash detect cfi\n");
wdenk2cefd152004-02-08 22:55:38 +00001975
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02001976 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenke65527f2004-02-12 00:47:09 +00001977 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1978 for (info->chipwidth = FLASH_CFI_BY8;
1979 info->chipwidth <= info->portwidth;
Jagannadha Sutradharudu Tekicb99a772021-02-26 08:51:49 +01001980 info->chipwidth <<= 1) {
1981 /*
1982 * First, try detection without shifting the addresses
1983 * for 8bit devices (16bit wide connection)
1984 */
1985 info->chip_lsb = 0;
1986 if (__flash_detect_cfi(info, qry))
1987 return 1;
1988
1989 /*
1990 * Not detected, so let's try with shifting
1991 * for 8bit devices
1992 */
1993 info->chip_lsb = 1;
Stefan Roese70a90b72013-04-12 19:04:54 +02001994 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoend523e392007-12-13 12:56:28 +01001995 return 1;
Jagannadha Sutradharudu Tekicb99a772021-02-26 08:51:49 +01001996 }
wdenk2cefd152004-02-08 22:55:38 +00001997 }
Mario Sixfa290692018-01-26 14:43:31 +01001998 debug("not found\n");
wdenk2cefd152004-02-08 22:55:38 +00001999 return 0;
2000}
wdenke65527f2004-02-12 00:47:09 +00002001
wdenk2cefd152004-02-08 22:55:38 +00002002/*
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01002003 * Manufacturer-specific quirks. Add workarounds for geometry
2004 * reversal, etc. here.
2005 */
2006static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
2007{
2008 /* check if flash geometry needs reversal */
2009 if (qry->num_erase_regions > 1) {
2010 /* reverse geometry if top boot part */
2011 if (info->cfi_version < 0x3131) {
2012 /* CFI < 1.1, try to guess from device id */
2013 if ((info->device_id & 0x80) != 0)
2014 cfi_reverse_geometry(qry);
Stefan Roese70a90b72013-04-12 19:04:54 +02002015 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01002016 /* CFI >= 1.1, deduct from top/bottom flag */
2017 /* note: ext_addr is valid since cfi_version > 0 */
2018 cfi_reverse_geometry(qry);
2019 }
2020 }
2021}
2022
2023static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
2024{
2025 int reverse_geometry = 0;
2026
2027 /* Check the "top boot" bit in the PRI */
2028 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
2029 reverse_geometry = 1;
2030
2031 /* AT49BV6416(T) list the erase regions in the wrong order.
2032 * However, the device ID is identical with the non-broken
Ulf Samuelsson07f9b4e2009-03-27 23:26:43 +01002033 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01002034 */
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01002035 if (info->device_id == 0xd6 || info->device_id == 0xd2)
2036 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01002037
2038 if (reverse_geometry)
2039 cfi_reverse_geometry(qry);
2040}
2041
Richard Retanubunbe4dca22009-01-14 08:44:26 -05002042static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2043{
2044 /* check if flash geometry needs reversal */
2045 if (qry->num_erase_regions > 1) {
2046 /* reverse geometry if top boot part */
2047 if (info->cfi_version < 0x3131) {
Mike Frysinger02a37862011-04-10 16:06:29 -04002048 /* CFI < 1.1, guess by device id */
2049 if (info->device_id == 0x22CA || /* M29W320DT */
2050 info->device_id == 0x2256 || /* M29W320ET */
2051 info->device_id == 0x22D7) { /* M29W800DT */
Richard Retanubunbe4dca22009-01-14 08:44:26 -05002052 cfi_reverse_geometry(qry);
2053 }
Mike Frysinger97dd8992011-05-09 18:33:36 -04002054 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2055 /* CFI >= 1.1, deduct from top/bottom flag */
2056 /* note: ext_addr is valid since cfi_version > 0 */
2057 cfi_reverse_geometry(qry);
Richard Retanubunbe4dca22009-01-14 08:44:26 -05002058 }
2059 }
2060}
2061
Angelo Dureghello7ba30282012-12-01 01:14:18 +01002062static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2063{
2064 /*
2065 * SST, for many recent nor parallel flashes, says they are
2066 * CFI-conformant. This is not true, since qry struct.
2067 * reports a std. AMD command set (0x0002), while SST allows to
2068 * erase two different sector sizes for the same memory.
2069 * 64KB sector (SST call it block) needs 0x30 to be erased.
2070 * 4KB sector (SST call it sector) needs 0x50 to be erased.
2071 * Since CFI query detect the 4KB number of sectors, users expects
2072 * a sector granularity of 4KB, and it is here set.
2073 */
2074 if (info->device_id == 0x5D23 || /* SST39VF3201B */
2075 info->device_id == 0x5C23) { /* SST39VF3202B */
2076 /* set sector granularity to 4KB */
Mario Sixa828c1e2018-01-26 14:43:36 +01002077 info->cmd_erase_sector = 0x50;
Angelo Dureghello7ba30282012-12-01 01:14:18 +01002078 }
2079}
2080
Jagannadha Sutradharudu Teki130def32013-03-01 16:54:26 +05302081static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2082{
2083 /*
2084 * The M29EW devices seem to report the CFI information wrong
2085 * when it's in 8 bit mode.
2086 * There's an app note from Numonyx on this issue.
2087 * So adjust the buffer size for M29EW while operating in 8-bit mode
2088 */
Mario Sixd1141c52018-01-26 14:43:42 +01002089 if (qry->max_buf_write_size > 0x8 &&
Mario Sixdde85502018-01-26 14:43:55 +01002090 info->device_id == 0x7E &&
2091 (info->device_id2 == 0x2201 ||
2092 info->device_id2 == 0x2301 ||
2093 info->device_id2 == 0x2801 ||
2094 info->device_id2 == 0x4801)) {
Mario Six246e5062018-01-26 14:43:50 +01002095 debug("Adjusted buffer size on Numonyx flash");
2096 debug(" M29EW family in 8 bit mode\n");
Jagannadha Sutradharudu Teki130def32013-03-01 16:54:26 +05302097 qry->max_buf_write_size = 0x8;
2098 }
2099}
2100
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01002101/*
wdenk2cefd152004-02-08 22:55:38 +00002102 * The following code cannot be run from FLASH!
2103 *
2104 */
Mario Sixfa290692018-01-26 14:43:31 +01002105ulong flash_get_size(phys_addr_t base, int banknum)
wdenk2cefd152004-02-08 22:55:38 +00002106{
wdenke65527f2004-02-12 00:47:09 +00002107 flash_info_t *info = &flash_info[banknum];
wdenk2cefd152004-02-08 22:55:38 +00002108 int i, j;
2109 flash_sect_t sect_cnt;
Becky Bruce9d1f6af2009-02-02 16:34:51 -06002110 phys_addr_t sector;
wdenk2cefd152004-02-08 22:55:38 +00002111 unsigned long tmp;
2112 int size_ratio;
2113 uchar num_erase_regions;
wdenke65527f2004-02-12 00:47:09 +00002114 int erase_region_size;
2115 int erase_region_count;
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01002116 struct cfi_qry qry;
Anatolij Gustschin6acb77b2010-11-28 02:13:33 +01002117 unsigned long max_size;
Stefan Roese12797482006-11-13 13:55:24 +01002118
Kumar Gala899032b2008-05-15 15:13:08 -05002119 memset(&qry, 0, sizeof(qry));
2120
Stefan Roese12797482006-11-13 13:55:24 +01002121 info->ext_addr = 0;
2122 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002123#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roeseefef95b2006-04-01 13:41:03 +02002124 info->legacy_unlock = 0;
2125#endif
wdenk2cefd152004-02-08 22:55:38 +00002126
Becky Bruce9d1f6af2009-02-02 16:34:51 -06002127 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk2cefd152004-02-08 22:55:38 +00002128
Mario Sixfa290692018-01-26 14:43:31 +01002129 if (flash_detect_cfi(info, &qry)) {
Mario Sixd1141c52018-01-26 14:43:42 +01002130 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2131 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01002132 num_erase_regions = qry.num_erase_regions;
2133
Stefan Roese12797482006-11-13 13:55:24 +01002134 if (info->ext_addr) {
Mario Sixa828c1e2018-01-26 14:43:36 +01002135 info->cfi_version = (ushort)flash_read_uchar(info,
Stefan Roese70a90b72013-04-12 19:04:54 +02002136 info->ext_addr + 3) << 8;
Mario Sixa828c1e2018-01-26 14:43:36 +01002137 info->cfi_version |= (ushort)flash_read_uchar(info,
Stefan Roese70a90b72013-04-12 19:04:54 +02002138 info->ext_addr + 4);
Stefan Roese12797482006-11-13 13:55:24 +01002139 }
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01002140
wdenke65527f2004-02-12 00:47:09 +00002141#ifdef DEBUG
Mario Sixfa290692018-01-26 14:43:31 +01002142 flash_printqry(&qry);
wdenke65527f2004-02-12 00:47:09 +00002143#endif
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01002144
wdenke65527f2004-02-12 00:47:09 +00002145 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04002146 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk2cefd152004-02-08 22:55:38 +00002147 case CFI_CMDSET_INTEL_STANDARD:
2148 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01002149 cmdset_intel_init(info, &qry);
wdenk2cefd152004-02-08 22:55:38 +00002150 break;
2151 case CFI_CMDSET_AMD_STANDARD:
2152 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01002153 cmdset_amd_init(info, &qry);
wdenk2cefd152004-02-08 22:55:38 +00002154 break;
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01002155 default:
2156 printf("CFI: Unknown command set 0x%x\n",
Mario Sixdde85502018-01-26 14:43:55 +01002157 info->vendor);
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01002158 /*
2159 * Unfortunately, this means we don't know how
2160 * to get the chip back to Read mode. Might
2161 * as well try an Intel-style reset...
2162 */
2163 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2164 return 0;
wdenk2cefd152004-02-08 22:55:38 +00002165 }
wdenk6cfa84e2004-02-10 00:03:41 +00002166
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01002167 /* Do manufacturer-specific fixups */
2168 switch (info->manufacturer_id) {
Mario Schuknecht5c3579e2011-02-21 13:13:14 +01002169 case 0x0001: /* AMD */
2170 case 0x0037: /* AMIC */
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01002171 flash_fixup_amd(info, &qry);
2172 break;
2173 case 0x001f:
2174 flash_fixup_atmel(info, &qry);
2175 break;
Richard Retanubunbe4dca22009-01-14 08:44:26 -05002176 case 0x0020:
2177 flash_fixup_stm(info, &qry);
2178 break;
Angelo Dureghello7ba30282012-12-01 01:14:18 +01002179 case 0x00bf: /* SST */
2180 flash_fixup_sst(info, &qry);
2181 break;
Jagannadha Sutradharudu Teki130def32013-03-01 16:54:26 +05302182 case 0x0089: /* Numonyx */
2183 flash_fixup_num(info, &qry);
2184 break;
Haavard Skinnemoen750ea7f2007-12-14 15:36:18 +01002185 }
2186
Mario Sixfa290692018-01-26 14:43:31 +01002187 debug("manufacturer is %d\n", info->vendor);
2188 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2189 debug("device id is 0x%x\n", info->device_id);
2190 debug("device id2 is 0x%x\n", info->device_id2);
2191 debug("cfi version is 0x%04x\n", info->cfi_version);
Stefan Roese12797482006-11-13 13:55:24 +01002192
wdenk2cefd152004-02-08 22:55:38 +00002193 size_ratio = info->portwidth / info->chipwidth;
wdenke65527f2004-02-12 00:47:09 +00002194 /* if the chip is x8/x16 reduce the ratio by half */
Mario Sixd1141c52018-01-26 14:43:42 +01002195 if (info->interface == FLASH_CFI_X8X16 &&
Mario Sixdde85502018-01-26 14:43:55 +01002196 info->chipwidth == FLASH_CFI_BY8) {
wdenke65527f2004-02-12 00:47:09 +00002197 size_ratio >>= 1;
2198 }
Mario Sixfa290692018-01-26 14:43:31 +01002199 debug("size_ratio %d port %d bits chip %d bits\n",
Mario Sixdde85502018-01-26 14:43:55 +01002200 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2201 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Ilya Yanok755c1802010-10-21 17:20:12 +02002202 info->size = 1 << qry.dev_size;
2203 /* multiply the size by the number of chips */
2204 info->size *= size_ratio;
Anatolij Gustschin6acb77b2010-11-28 02:13:33 +01002205 max_size = cfi_flash_bank_size(banknum);
Mario Sixd1141c52018-01-26 14:43:42 +01002206 if (max_size && info->size > max_size) {
Ilya Yanok755c1802010-10-21 17:20:12 +02002207 debug("[truncated from %ldMiB]", info->size >> 20);
2208 info->size = max_size;
2209 }
Mario Sixfa290692018-01-26 14:43:31 +01002210 debug("found %d erase regions\n", num_erase_regions);
wdenk2cefd152004-02-08 22:55:38 +00002211 sect_cnt = 0;
2212 sector = base;
wdenke65527f2004-02-12 00:47:09 +00002213 for (i = 0; i < num_erase_regions; i++) {
2214 if (i > NUM_ERASE_REGIONS) {
Mario Sixfa290692018-01-26 14:43:31 +01002215 printf("%d erase regions found, only %d used\n",
Mario Sixdde85502018-01-26 14:43:55 +01002216 num_erase_regions, NUM_ERASE_REGIONS);
wdenk2cefd152004-02-08 22:55:38 +00002217 break;
2218 }
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01002219
Andrew Gabbasovc1592582013-05-14 12:27:52 -05002220 tmp = le32_to_cpu(get_unaligned(
Mario Sixd1141c52018-01-26 14:43:42 +01002221 &qry.erase_region_info[i]));
Haavard Skinnemoenc4d478b2007-12-14 15:36:17 +01002222 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01002223
2224 erase_region_count = (tmp & 0xffff) + 1;
2225 tmp >>= 16;
wdenke65527f2004-02-12 00:47:09 +00002226 erase_region_size =
2227 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
Mario Sixbc762c12018-01-26 14:43:54 +01002228 debug("erase_region_count = %d ", erase_region_count);
2229 debug("erase_region_size = %d\n", erase_region_size);
wdenke65527f2004-02-12 00:47:09 +00002230 for (j = 0; j < erase_region_count; j++) {
Ilya Yanok755c1802010-10-21 17:20:12 +02002231 if (sector - base >= info->size)
2232 break;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002233 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen73d044d2007-12-07 23:35:02 +01002234 printf("ERROR: too many flash sectors\n");
2235 break;
2236 }
Becky Bruce9d1f6af2009-02-02 16:34:51 -06002237 info->start[sect_cnt] =
2238 (ulong)map_physmem(sector,
2239 info->portwidth,
2240 MAP_NOCACHE);
wdenk2cefd152004-02-08 22:55:38 +00002241 sector += (erase_region_size * size_ratio);
wdenk26c58432005-01-09 17:12:27 +00002242
2243 /*
Haavard Skinnemoend523e392007-12-13 12:56:28 +01002244 * Only read protection status from
2245 * supported devices (intel...)
wdenk26c58432005-01-09 17:12:27 +00002246 */
2247 switch (info->vendor) {
Vasiliy Leoenenko7d1794c2008-05-07 21:25:33 +04002248 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk26c58432005-01-09 17:12:27 +00002249 case CFI_CMDSET_INTEL_EXTENDED:
2250 case CFI_CMDSET_INTEL_STANDARD:
Stefan Roese5215df12010-10-25 18:31:29 +02002251 /*
2252 * Set flash to read-id mode. Otherwise
2253 * reading protected status is not
2254 * guaranteed.
2255 */
2256 flash_write_cmd(info, sect_cnt, 0,
2257 FLASH_CMD_READ_ID);
wdenk26c58432005-01-09 17:12:27 +00002258 info->protect[sect_cnt] =
Mario Sixfa290692018-01-26 14:43:31 +01002259 flash_isset(info, sect_cnt,
Mario Sixdde85502018-01-26 14:43:55 +01002260 FLASH_OFFSET_PROTECT,
2261 FLASH_STATUS_PROTECT);
Vasily Khoruzhickcf464002016-03-20 18:37:10 -07002262 flash_write_cmd(info, sect_cnt, 0,
2263 FLASH_CMD_RESET);
wdenk26c58432005-01-09 17:12:27 +00002264 break;
Stefan Roesebcb33442012-12-06 15:44:10 +01002265 case CFI_CMDSET_AMD_EXTENDED:
2266 case CFI_CMDSET_AMD_STANDARD:
Stefan Roese7de65842012-12-06 15:44:11 +01002267 if (!info->legacy_unlock) {
Stefan Roesebcb33442012-12-06 15:44:10 +01002268 /* default: not protected */
2269 info->protect[sect_cnt] = 0;
2270 break;
2271 }
2272
2273 /* Read protection (PPB) from sector */
2274 flash_write_cmd(info, 0, 0,
2275 info->cmd_reset);
2276 flash_unlock_seq(info, 0);
2277 flash_write_cmd(info, 0,
2278 info->addr_unlock1,
Marek Vasut43dad6f2021-04-11 20:47:45 +02002279 AMD_CMD_SET_PPB_ENTRY);
Stefan Roesebcb33442012-12-06 15:44:10 +01002280 info->protect[sect_cnt] =
Marek Vasut43dad6f2021-04-11 20:47:45 +02002281 !flash_isset(info, sect_cnt,
2282 0, 0x01);
2283 flash_write_cmd(info, 0, 0,
2284 info->cmd_reset);
Stefan Roesebcb33442012-12-06 15:44:10 +01002285 break;
wdenk26c58432005-01-09 17:12:27 +00002286 default:
Haavard Skinnemoend523e392007-12-13 12:56:28 +01002287 /* default: not protected */
2288 info->protect[sect_cnt] = 0;
wdenk26c58432005-01-09 17:12:27 +00002289 }
2290
wdenk2cefd152004-02-08 22:55:38 +00002291 sect_cnt++;
2292 }
2293 }
2294
2295 info->sector_count = sect_cnt;
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01002296 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2297 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoend523e392007-12-13 12:56:28 +01002298 info->erase_blk_tout = tmp *
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01002299 (1 << qry.block_erase_timeout_max);
2300 tmp = (1 << qry.buf_write_timeout_typ) *
2301 (1 << qry.buf_write_timeout_max);
2302
Haavard Skinnemoend523e392007-12-13 12:56:28 +01002303 /* round up when converting to ms */
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01002304 info->buffer_write_tout = (tmp + 999) / 1000;
2305 tmp = (1 << qry.word_write_timeout_typ) *
2306 (1 << qry.word_write_timeout_max);
Haavard Skinnemoend523e392007-12-13 12:56:28 +01002307 /* round up when converting to ms */
Haavard Skinnemoen53baec72007-12-14 15:36:16 +01002308 info->write_tout = (tmp + 999) / 1000;
wdenk2cefd152004-02-08 22:55:38 +00002309 info->flash_id = FLASH_MAN_CFI;
Mario Sixd1141c52018-01-26 14:43:42 +01002310 if (info->interface == FLASH_CFI_X8X16 &&
2311 info->chipwidth == FLASH_CFI_BY8) {
Haavard Skinnemoend523e392007-12-13 12:56:28 +01002312 /* XXX - Need to test on x8/x16 in parallel. */
2313 info->portwidth >>= 1;
wdenked2ac4b2004-03-14 18:23:55 +00002314 }
Mike Frysinger59404ee2008-10-02 01:55:38 -04002315
Mario Sixfa290692018-01-26 14:43:31 +01002316 flash_write_cmd(info, 0, 0, info->cmd_reset);
wdenk2cefd152004-02-08 22:55:38 +00002317 }
2318
wdenke65527f2004-02-12 00:47:09 +00002319 return (info->size);
wdenk2cefd152004-02-08 22:55:38 +00002320}
2321
Mike Frysingerc2c093d2010-12-22 09:41:13 -05002322#ifdef CONFIG_FLASH_CFI_MTD
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01002323void flash_set_verbose(uint v)
2324{
2325 flash_verbose = v;
2326}
Mike Frysingerc2c093d2010-12-22 09:41:13 -05002327#endif
Piotr Ziecik2a7493c2008-11-17 15:49:32 +01002328
Stefan Roeseab935642010-10-25 18:31:48 +02002329static void cfi_flash_set_config_reg(u32 base, u16 val)
2330{
2331#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2332 /*
2333 * Only set this config register if really defined
2334 * to a valid value (0xffff is invalid)
2335 */
2336 if (val == 0xffff)
2337 return;
2338
2339 /*
2340 * Set configuration register. Data is "encrypted" in the 16 lower
2341 * address bits.
2342 */
2343 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2344 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2345
2346 /*
2347 * Finally issue reset-command to bring device back to
2348 * read-array mode
2349 */
2350 flash_write16(FLASH_CMD_RESET, (void *)base);
2351#endif
2352}
2353
wdenk2cefd152004-02-08 22:55:38 +00002354/*-----------------------------------------------------------------------
2355 */
Heiko Schocheref0946a2011-04-04 08:10:21 +02002356
Marek Vasuta26162d2017-08-20 17:20:00 +02002357static void flash_protect_default(void)
Heiko Schocheref0946a2011-04-04 08:10:21 +02002358{
Peter Tyser4f3c60d2011-04-13 11:46:56 -05002359#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2360 int i;
2361 struct apl_s {
2362 ulong start;
2363 ulong size;
2364 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2365#endif
2366
Heiko Schocheref0946a2011-04-04 08:10:21 +02002367 /* Monitor protection ON by default */
Vignesh Raghavendra5b9d8002019-10-23 13:30:00 +05302368#if defined(CONFIG_SYS_MONITOR_BASE) && \
2369 (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
Heiko Schocheref0946a2011-04-04 08:10:21 +02002370 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2371 flash_protect(FLAG_PROTECT_SET,
Mario Sixdde85502018-01-26 14:43:55 +01002372 CONFIG_SYS_MONITOR_BASE,
2373 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2374 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Heiko Schocheref0946a2011-04-04 08:10:21 +02002375#endif
2376
2377 /* Environment protection ON by default */
2378#ifdef CONFIG_ENV_IS_IN_FLASH
2379 flash_protect(FLAG_PROTECT_SET,
Mario Sixdde85502018-01-26 14:43:55 +01002380 CONFIG_ENV_ADDR,
2381 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2382 flash_get_info(CONFIG_ENV_ADDR));
Heiko Schocheref0946a2011-04-04 08:10:21 +02002383#endif
2384
2385 /* Redundant environment protection ON by default */
2386#ifdef CONFIG_ENV_ADDR_REDUND
2387 flash_protect(FLAG_PROTECT_SET,
Mario Sixdde85502018-01-26 14:43:55 +01002388 CONFIG_ENV_ADDR_REDUND,
2389 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2390 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Heiko Schocheref0946a2011-04-04 08:10:21 +02002391#endif
2392
2393#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Axel Lin85706c82013-06-23 00:56:46 +08002394 for (i = 0; i < ARRAY_SIZE(apl); i++) {
Marek Vasutcb1622e2011-10-21 14:17:05 +00002395 debug("autoprotecting from %08lx to %08lx\n",
Heiko Schocheref0946a2011-04-04 08:10:21 +02002396 apl[i].start, apl[i].start + apl[i].size - 1);
2397 flash_protect(FLAG_PROTECT_SET,
Mario Sixdde85502018-01-26 14:43:55 +01002398 apl[i].start,
2399 apl[i].start + apl[i].size - 1,
2400 flash_get_info(apl[i].start));
Heiko Schocheref0946a2011-04-04 08:10:21 +02002401 }
2402#endif
2403}
2404
Mario Sixfa290692018-01-26 14:43:31 +01002405unsigned long flash_init(void)
wdenk2cefd152004-02-08 22:55:38 +00002406{
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002407 unsigned long size = 0;
2408 int i;
wdenk2cefd152004-02-08 22:55:38 +00002409
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002410#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann8f7ee7d2009-03-21 09:59:34 -04002411 /* read environment from EEPROM */
2412 char s[64];
Mario Sixc7e359e2018-01-26 14:43:37 +01002413
Simon Glass64b723f2017-08-03 12:22:12 -06002414 env_get_f("unlock", s, sizeof(s));
Michael Schwingen73d044d2007-12-07 23:35:02 +01002415#endif
wdenk2cefd152004-02-08 22:55:38 +00002416
Thomas Chou47eae232015-11-07 14:31:08 +08002417#ifdef CONFIG_CFI_FLASH /* for driver model */
2418 cfi_flash_init_dm();
2419#endif
2420
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002421 /* Init: no FLASHes known */
Patrick Delaunay6c5f5602022-01-04 14:23:58 +01002422 for (i = 0; i < CFI_FLASH_BANKS; ++i) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002423 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk2cefd152004-02-08 22:55:38 +00002424
Stefan Roeseab935642010-10-25 18:31:48 +02002425 /* Optionally write flash configuration register */
2426 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2427 cfi_flash_config_reg(i));
2428
Stefan Roese7e7dda82010-08-30 10:11:51 +02002429 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
Anatolij Gustschin6acb77b2010-11-28 02:13:33 +01002430 flash_get_size(cfi_flash_bank_addr(i), i);
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002431 size += flash_info[i].size;
2432 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002433#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Mario Six246e5062018-01-26 14:43:50 +01002434 printf("## Unknown flash on Bank %d ", i + 1);
2435 printf("- Size = 0x%08lx = %ld MB\n",
Mario Sixdde85502018-01-26 14:43:55 +01002436 flash_info[i].size,
2437 flash_info[i].size >> 20);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002438#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002439 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002440#ifdef CONFIG_SYS_FLASH_PROTECTION
Jeroen Hofstee5a85e892014-06-17 22:47:31 +02002441 else if (strcmp(s, "yes") == 0) {
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002442 /*
2443 * Only the U-Boot image and it's environment
2444 * is protected, all other sectors are
2445 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002446 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002447 * and the environment variable "unlock" is
2448 * set to "yes".
2449 */
2450 if (flash_info[i].legacy_unlock) {
2451 int k;
wdenk2cefd152004-02-08 22:55:38 +00002452
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002453 /*
2454 * Disable legacy_unlock temporarily,
2455 * since flash_real_protect would
2456 * relock all other sectors again
2457 * otherwise.
2458 */
2459 flash_info[i].legacy_unlock = 0;
wdenk2cefd152004-02-08 22:55:38 +00002460
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002461 /*
2462 * Legacy unlocking (e.g. Intel J3) ->
2463 * unlock only one sector. This will
2464 * unlock all sectors.
2465 */
Mario Sixfa290692018-01-26 14:43:31 +01002466 flash_real_protect(&flash_info[i], 0, 0);
wdenk2cefd152004-02-08 22:55:38 +00002467
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002468 flash_info[i].legacy_unlock = 1;
wdenk2cefd152004-02-08 22:55:38 +00002469
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002470 /*
2471 * Manually mark other sectors as
2472 * unlocked (unprotected)
2473 */
2474 for (k = 1; k < flash_info[i].sector_count; k++)
2475 flash_info[i].protect[k] = 0;
2476 } else {
2477 /*
2478 * No legancy unlocking -> unlock all sectors
2479 */
Mario Sixfa290692018-01-26 14:43:31 +01002480 flash_protect(FLAG_PROTECT_CLEAR,
Mario Sixdde85502018-01-26 14:43:55 +01002481 flash_info[i].start[0],
2482 flash_info[i].start[0]
2483 + flash_info[i].size - 1,
2484 &flash_info[i]);
Stefan Roesec865e6c2006-02-28 15:29:58 +01002485 }
Stefan Roesec865e6c2006-02-28 15:29:58 +01002486 }
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02002487#endif /* CONFIG_SYS_FLASH_PROTECTION */
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002488 }
Stefan Roesec865e6c2006-02-28 15:29:58 +01002489
Heiko Schocheref0946a2011-04-04 08:10:21 +02002490 flash_protect_default();
Piotr Ziecik3e939e92008-11-17 15:57:58 +01002491#ifdef CONFIG_FLASH_CFI_MTD
2492 cfi_mtd_init();
2493#endif
2494
Haavard Skinnemoen6dd763c2007-10-06 18:55:36 +02002495 return (size);
wdenk2cefd152004-02-08 22:55:38 +00002496}
Thomas Chou47eae232015-11-07 14:31:08 +08002497
2498#ifdef CONFIG_CFI_FLASH /* for driver model */
2499static int cfi_flash_probe(struct udevice *dev)
2500{
Andre Przywarab2bb1b32020-09-24 00:22:04 +01002501 fdt_addr_t addr;
2502 int idx;
Thomas Chou47eae232015-11-07 14:31:08 +08002503
Andre Przywarab2bb1b32020-09-24 00:22:04 +01002504 for (idx = 0; idx < CFI_MAX_FLASH_BANKS; idx++) {
2505 addr = dev_read_addr_index(dev, idx);
2506 if (addr == FDT_ADDR_T_NONE)
2507 break;
Mario Six4d5b82d2018-03-28 14:38:41 +02002508
Marek Vasut970940f2017-09-12 19:09:08 +02002509 flash_info[cfi_flash_num_flash_banks].dev = dev;
2510 flash_info[cfi_flash_num_flash_banks].base = addr;
2511 cfi_flash_num_flash_banks++;
Thomas Chou47eae232015-11-07 14:31:08 +08002512 }
Marek Vasut970940f2017-09-12 19:09:08 +02002513 gd->bd->bi_flashstart = flash_info[0].base;
Thomas Chou47eae232015-11-07 14:31:08 +08002514
2515 return 0;
2516}
2517
2518static const struct udevice_id cfi_flash_ids[] = {
2519 { .compatible = "cfi-flash" },
2520 { .compatible = "jedec-flash" },
2521 {}
2522};
2523
2524U_BOOT_DRIVER(cfi_flash) = {
2525 .name = "cfi_flash",
2526 .id = UCLASS_MTD,
2527 .of_match = cfi_flash_ids,
2528 .probe = cfi_flash_probe,
2529};
2530#endif /* CONFIG_CFI_FLASH */