wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com |
| 4 | * |
| 5 | * Copyright (C) 2003 Arabella Software Ltd. |
| 6 | * Yuli Barcohen <yuli@arabellasw.com> |
| 7 | * Modified to work with AMD flashes |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | * |
| 27 | * History |
| 28 | * 01/20/2004 - combined variants of original driver. |
| 29 | * |
| 30 | * Tested Architectures |
| 31 | * Port Width Chip Width # of banks Flash Chip Board |
| 32 | * 32 16 1 23F128J3 seranoa/eagle |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 33 | * |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 34 | */ |
| 35 | |
| 36 | /* The DEBUG define must be before common to enable debugging */ |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 37 | #undef DEBUG |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 38 | #include <common.h> |
| 39 | #include <asm/processor.h> |
| 40 | #ifdef CFG_FLASH_CFI_DRIVER |
| 41 | /* |
| 42 | * This file implements a Common Flash Interface (CFI) driver for U-Boot. |
| 43 | * The width of the port and the width of the chips are determined at initialization. |
| 44 | * These widths are used to calculate the address for access CFI data structures. |
| 45 | * It has been tested on an Intel Strataflash implementation and AMD 29F016D. |
| 46 | * |
| 47 | * References |
| 48 | * JEDEC Standard JESD68 - Common Flash Interface (CFI) |
| 49 | * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes |
| 50 | * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets |
| 51 | * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet |
| 52 | * |
| 53 | * TODO |
| 54 | * |
| 55 | * Use Primary Extended Query table (PRI) and Alternate Algorithm Query |
| 56 | * Table (ALT) to determine if protection is available |
| 57 | * |
| 58 | * Add support for other command sets Use the PRI and ALT to determine command set |
| 59 | * Verify erase and program timeouts. |
| 60 | */ |
| 61 | |
| 62 | #define FLASH_CMD_CFI 0x98 |
| 63 | #define FLASH_CMD_READ_ID 0x90 |
| 64 | #define FLASH_CMD_RESET 0xff |
| 65 | #define FLASH_CMD_BLOCK_ERASE 0x20 |
| 66 | #define FLASH_CMD_ERASE_CONFIRM 0xD0 |
| 67 | #define FLASH_CMD_WRITE 0x40 |
| 68 | #define FLASH_CMD_PROTECT 0x60 |
| 69 | #define FLASH_CMD_PROTECT_SET 0x01 |
| 70 | #define FLASH_CMD_PROTECT_CLEAR 0xD0 |
| 71 | #define FLASH_CMD_CLEAR_STATUS 0x50 |
| 72 | #define FLASH_CMD_WRITE_TO_BUFFER 0xE8 |
| 73 | #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 |
| 74 | |
| 75 | #define FLASH_STATUS_DONE 0x80 |
| 76 | #define FLASH_STATUS_ESS 0x40 |
| 77 | #define FLASH_STATUS_ECLBS 0x20 |
| 78 | #define FLASH_STATUS_PSLBS 0x10 |
| 79 | #define FLASH_STATUS_VPENS 0x08 |
| 80 | #define FLASH_STATUS_PSS 0x04 |
| 81 | #define FLASH_STATUS_DPS 0x02 |
| 82 | #define FLASH_STATUS_R 0x01 |
| 83 | #define FLASH_STATUS_PROTECT 0x01 |
| 84 | |
| 85 | #define AMD_CMD_RESET 0xF0 |
| 86 | #define AMD_CMD_WRITE 0xA0 |
| 87 | #define AMD_CMD_ERASE_START 0x80 |
| 88 | #define AMD_CMD_ERASE_SECTOR 0x30 |
| 89 | |
| 90 | #define AMD_STATUS_TOGGLE 0x40 |
| 91 | #define AMD_STATUS_ERROR 0x20 |
| 92 | |
| 93 | #define FLASH_OFFSET_CFI 0x55 |
| 94 | #define FLASH_OFFSET_CFI_RESP 0x10 |
| 95 | #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 |
| 96 | #define FLASH_OFFSET_WTOUT 0x1F |
| 97 | #define FLASH_OFFSET_WBTOUT 0x20 |
| 98 | #define FLASH_OFFSET_ETOUT 0x21 |
| 99 | #define FLASH_OFFSET_CETOUT 0x22 |
| 100 | #define FLASH_OFFSET_WMAX_TOUT 0x23 |
| 101 | #define FLASH_OFFSET_WBMAX_TOUT 0x24 |
| 102 | #define FLASH_OFFSET_EMAX_TOUT 0x25 |
| 103 | #define FLASH_OFFSET_CEMAX_TOUT 0x26 |
| 104 | #define FLASH_OFFSET_SIZE 0x27 |
| 105 | #define FLASH_OFFSET_INTERFACE 0x28 |
| 106 | #define FLASH_OFFSET_BUFFER_SIZE 0x2A |
| 107 | #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C |
| 108 | #define FLASH_OFFSET_ERASE_REGIONS 0x2D |
| 109 | #define FLASH_OFFSET_PROTECT 0x02 |
| 110 | #define FLASH_OFFSET_USER_PROTECTION 0x85 |
| 111 | #define FLASH_OFFSET_INTEL_PROTECTION 0x81 |
| 112 | |
| 113 | |
| 114 | #define FLASH_MAN_CFI 0x01000000 |
| 115 | |
| 116 | #define CFI_CMDSET_NONE 0 |
| 117 | #define CFI_CMDSET_INTEL_EXTENDED 1 |
| 118 | #define CFI_CMDSET_AMD_STANDARD 2 |
| 119 | #define CFI_CMDSET_INTEL_STANDARD 3 |
| 120 | #define CFI_CMDSET_AMD_EXTENDED 4 |
| 121 | #define CFI_CMDSET_MITSU_STANDARD 256 |
| 122 | #define CFI_CMDSET_MITSU_EXTENDED 257 |
| 123 | #define CFI_CMDSET_SST 258 |
| 124 | |
| 125 | |
| 126 | typedef union { |
| 127 | unsigned char c; |
| 128 | unsigned short w; |
| 129 | unsigned long l; |
| 130 | unsigned long long ll; |
| 131 | } cfiword_t; |
| 132 | |
| 133 | typedef union { |
| 134 | volatile unsigned char *cp; |
| 135 | volatile unsigned short *wp; |
| 136 | volatile unsigned long *lp; |
| 137 | volatile unsigned long long *llp; |
| 138 | } cfiptr_t; |
| 139 | |
| 140 | #define NUM_ERASE_REGIONS 4 |
| 141 | |
| 142 | static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST; |
| 143 | |
| 144 | flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
| 145 | |
| 146 | /*----------------------------------------------------------------------- |
| 147 | * Functions |
| 148 | */ |
| 149 | |
| 150 | typedef unsigned long flash_sect_t; |
| 151 | |
| 152 | static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c); |
| 153 | static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf); |
| 154 | static void flash_write_cmd(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); |
| 155 | static void flash_unlock_seq(flash_info_t *info); |
| 156 | static int flash_isequal(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); |
| 157 | static int flash_isset(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); |
| 158 | static int flash_toggle(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); |
| 159 | static int flash_detect_cfi(flash_info_t * info); |
| 160 | static ulong flash_get_size (ulong base, int banknum); |
| 161 | static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword); |
| 162 | static int flash_full_status_check(flash_info_t * info, flash_sect_t sector, ulong tout, char * prompt); |
| 163 | #ifdef CFG_FLASH_USE_BUFFER_WRITE |
| 164 | static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len); |
| 165 | #endif |
| 166 | |
| 167 | #ifdef DEBUG |
| 168 | void print_longlong(char * str, unsigned long long data) |
| 169 | { |
| 170 | int i; |
| 171 | char *cp; |
| 172 | cp = (unsigned char *)&data; |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 173 | for(i=0;i<8; i++) |
| 174 | sprintf(&str[i*2], "%2.2x", *cp++); |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 175 | } |
| 176 | #endif |
| 177 | |
| 178 | |
| 179 | /*----------------------------------------------------------------------- |
| 180 | * create an address based on the offset and the port width |
| 181 | */ |
| 182 | inline uchar * flash_make_addr(flash_info_t * info, flash_sect_t sect, uint offset) |
| 183 | { |
| 184 | return ((uchar *)(info->start[sect] + (offset * info->portwidth))); |
| 185 | } |
| 186 | /*----------------------------------------------------------------------- |
| 187 | * read a character at a port width address |
| 188 | */ |
| 189 | inline uchar flash_read_uchar(flash_info_t * info, uint offset) |
| 190 | { |
| 191 | uchar *cp; |
| 192 | cp = flash_make_addr(info, 0, offset); |
| 193 | return (cp[info->portwidth - 1]); |
| 194 | } |
| 195 | |
| 196 | /*----------------------------------------------------------------------- |
| 197 | * read a short word by swapping for ppc format. |
| 198 | */ |
| 199 | ushort flash_read_ushort(flash_info_t * info, flash_sect_t sect, uint offset) |
| 200 | { |
| 201 | uchar * addr; |
| 202 | |
| 203 | addr = flash_make_addr(info, sect, offset); |
| 204 | return ((addr[(2*info->portwidth) - 1] << 8) | addr[info->portwidth - 1]); |
| 205 | |
| 206 | } |
| 207 | |
| 208 | /*----------------------------------------------------------------------- |
| 209 | * read a long word by picking the least significant byte of each maiximum |
| 210 | * port size word. Swap for ppc format. |
| 211 | */ |
| 212 | ulong flash_read_long(flash_info_t * info, flash_sect_t sect, uint offset) |
| 213 | { |
| 214 | uchar * addr; |
| 215 | |
| 216 | addr = flash_make_addr(info, sect, offset); |
| 217 | return ( (addr[(2*info->portwidth) - 1] << 24 ) | (addr[(info->portwidth) -1] << 16) | |
| 218 | (addr[(4*info->portwidth) - 1] << 8) | addr[(3*info->portwidth) - 1]); |
| 219 | |
| 220 | } |
| 221 | |
| 222 | /*----------------------------------------------------------------------- |
| 223 | */ |
| 224 | unsigned long flash_init (void) |
| 225 | { |
| 226 | unsigned long size = 0; |
| 227 | int i; |
| 228 | |
| 229 | /* Init: no FLASHes known */ |
| 230 | for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { |
| 231 | flash_info[i].flash_id = FLASH_UNKNOWN; |
| 232 | size += flash_info[i].size = flash_get_size(bank_base[i], i); |
| 233 | if (flash_info[i].flash_id == FLASH_UNKNOWN) { |
| 234 | printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", |
| 235 | i, flash_info[i].size, flash_info[i].size << 20); |
| 236 | } |
| 237 | } |
| 238 | |
| 239 | /* Monitor protection ON by default */ |
| 240 | #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) |
| 241 | flash_protect(FLAG_PROTECT_SET, |
| 242 | CFG_MONITOR_BASE, |
| 243 | CFG_MONITOR_BASE + monitor_flash_len - 1, |
| 244 | &flash_info[0]); |
| 245 | #endif |
| 246 | |
| 247 | return (size); |
| 248 | } |
| 249 | |
| 250 | /*----------------------------------------------------------------------- |
| 251 | */ |
| 252 | int flash_erase (flash_info_t *info, int s_first, int s_last) |
| 253 | { |
| 254 | int rcode = 0; |
| 255 | int prot; |
| 256 | flash_sect_t sect; |
| 257 | |
| 258 | if( info->flash_id != FLASH_MAN_CFI) { |
| 259 | printf ("Can't erase unknown flash type - aborted\n"); |
| 260 | return 1; |
| 261 | } |
| 262 | if ((s_first < 0) || (s_first > s_last)) { |
| 263 | printf ("- no sectors to erase\n"); |
| 264 | return 1; |
| 265 | } |
| 266 | |
| 267 | prot = 0; |
| 268 | for (sect=s_first; sect<=s_last; ++sect) { |
| 269 | if (info->protect[sect]) { |
| 270 | prot++; |
| 271 | } |
| 272 | } |
| 273 | if (prot) { |
| 274 | printf ("- Warning: %d protected sectors will not be erased!\n", |
| 275 | prot); |
| 276 | } else { |
| 277 | printf ("\n"); |
| 278 | } |
| 279 | |
| 280 | |
| 281 | for (sect = s_first; sect<=s_last; sect++) { |
| 282 | if (info->protect[sect] == 0) { /* not protected */ |
| 283 | switch(info->vendor) { |
| 284 | case CFI_CMDSET_INTEL_STANDARD: |
| 285 | case CFI_CMDSET_INTEL_EXTENDED: |
| 286 | flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS); |
| 287 | flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE); |
| 288 | flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM); |
| 289 | break; |
| 290 | case CFI_CMDSET_AMD_STANDARD: |
| 291 | case CFI_CMDSET_AMD_EXTENDED: |
| 292 | flash_unlock_seq(info); |
| 293 | flash_write_cmd(info, sect, 0x555, AMD_CMD_ERASE_START); |
| 294 | flash_unlock_seq(info); |
| 295 | flash_write_cmd(info, sect, 0, AMD_CMD_ERASE_SECTOR); |
| 296 | break; |
| 297 | default: |
| 298 | debug("Unkown flash vendor %d\n", info->vendor); |
| 299 | break; |
| 300 | } |
| 301 | |
| 302 | if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) { |
| 303 | rcode = 1; |
| 304 | } else |
| 305 | printf("."); |
| 306 | } |
| 307 | } |
| 308 | printf (" done\n"); |
| 309 | return rcode; |
| 310 | } |
| 311 | |
| 312 | /*----------------------------------------------------------------------- |
| 313 | */ |
| 314 | void flash_print_info (flash_info_t *info) |
| 315 | { |
| 316 | int i; |
| 317 | |
| 318 | if (info->flash_id != FLASH_MAN_CFI) { |
| 319 | printf ("missing or unknown FLASH type\n"); |
| 320 | return; |
| 321 | } |
| 322 | |
| 323 | printf("CFI conformant FLASH (%d x %d)", |
| 324 | (info->portwidth << 3 ), (info->chipwidth << 3 )); |
| 325 | printf (" Size: %ld MB in %d Sectors\n", |
| 326 | info->size >> 20, info->sector_count); |
| 327 | printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n", |
| 328 | info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size); |
| 329 | |
| 330 | printf (" Sector Start Addresses:"); |
| 331 | for (i=0; i<info->sector_count; ++i) { |
| 332 | #ifdef CFG_FLASH_EMPTY_INFO |
| 333 | int k; |
| 334 | int size; |
| 335 | int erased; |
| 336 | volatile unsigned long *flash; |
| 337 | |
| 338 | /* |
| 339 | * Check if whole sector is erased |
| 340 | */ |
| 341 | if (i != (info->sector_count-1)) |
| 342 | size = info->start[i+1] - info->start[i]; |
| 343 | else |
| 344 | size = info->start[0] + info->size - info->start[i]; |
| 345 | erased = 1; |
| 346 | flash = (volatile unsigned long *)info->start[i]; |
| 347 | size = size >> 2; /* divide by 4 for longword access */ |
| 348 | for (k=0; k<size; k++) |
| 349 | { |
| 350 | if (*flash++ != 0xffffffff) |
| 351 | { |
| 352 | erased = 0; |
| 353 | break; |
| 354 | } |
| 355 | } |
| 356 | |
| 357 | if ((i % 5) == 0) |
| 358 | printf ("\n"); |
| 359 | /* print empty and read-only info */ |
| 360 | printf (" %08lX%s%s", |
| 361 | info->start[i], |
| 362 | erased ? " E" : " ", |
| 363 | info->protect[i] ? "RO " : " "); |
| 364 | #else |
| 365 | if ((i % 5) == 0) |
| 366 | printf ("\n "); |
| 367 | printf (" %08lX%s", |
| 368 | info->start[i], |
| 369 | info->protect[i] ? " (RO)" : " "); |
| 370 | #endif |
| 371 | } |
| 372 | printf ("\n"); |
| 373 | return; |
| 374 | } |
| 375 | |
| 376 | /*----------------------------------------------------------------------- |
| 377 | * Copy memory to flash, returns: |
| 378 | * 0 - OK |
| 379 | * 1 - write timeout |
| 380 | * 2 - Flash not erased |
| 381 | */ |
| 382 | int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
| 383 | { |
| 384 | ulong wp; |
| 385 | ulong cp; |
| 386 | int aln; |
| 387 | cfiword_t cword; |
| 388 | int i, rc; |
| 389 | |
| 390 | /* get lower aligned address */ |
| 391 | wp = (addr & ~(info->portwidth - 1)); |
| 392 | |
| 393 | /* handle unaligned start */ |
| 394 | if((aln = addr - wp) != 0) { |
| 395 | cword.l = 0; |
| 396 | cp = wp; |
| 397 | for(i=0;i<aln; ++i, ++cp) |
| 398 | flash_add_byte(info, &cword, (*(uchar *)cp)); |
| 399 | |
| 400 | for(; (i< info->portwidth) && (cnt > 0) ; i++) { |
| 401 | flash_add_byte(info, &cword, *src++); |
| 402 | cnt--; |
| 403 | cp++; |
| 404 | } |
| 405 | for(; (cnt == 0) && (i < info->portwidth); ++i, ++cp) |
| 406 | flash_add_byte(info, &cword, (*(uchar *)cp)); |
| 407 | if((rc = flash_write_cfiword(info, wp, cword)) != 0) |
| 408 | return rc; |
| 409 | wp = cp; |
| 410 | } |
| 411 | |
| 412 | #ifdef CFG_FLASH_USE_BUFFER_WRITE |
| 413 | while(cnt >= info->portwidth) { |
| 414 | i = info->buffer_size > cnt? cnt: info->buffer_size; |
| 415 | if((rc = flash_write_cfibuffer(info, wp, src,i)) != ERR_OK) |
| 416 | return rc; |
| 417 | wp += i; |
| 418 | src += i; |
| 419 | cnt -=i; |
| 420 | } |
| 421 | #else |
| 422 | /* handle the aligned part */ |
| 423 | while(cnt >= info->portwidth) { |
| 424 | cword.l = 0; |
| 425 | for(i = 0; i < info->portwidth; i++) { |
| 426 | flash_add_byte(info, &cword, *src++); |
| 427 | } |
| 428 | if((rc = flash_write_cfiword(info, wp, cword)) != 0) |
| 429 | return rc; |
| 430 | wp += info->portwidth; |
| 431 | cnt -= info->portwidth; |
| 432 | } |
| 433 | #endif /* CFG_FLASH_USE_BUFFER_WRITE */ |
| 434 | if (cnt == 0) { |
| 435 | return (0); |
| 436 | } |
| 437 | |
| 438 | /* |
| 439 | * handle unaligned tail bytes |
| 440 | */ |
| 441 | cword.l = 0; |
| 442 | for (i=0, cp=wp; (i<info->portwidth) && (cnt>0); ++i, ++cp) { |
| 443 | flash_add_byte(info, &cword, *src++); |
| 444 | --cnt; |
| 445 | } |
| 446 | for (; i<info->portwidth; ++i, ++cp) { |
| 447 | flash_add_byte(info, & cword, (*(uchar *)cp)); |
| 448 | } |
| 449 | |
| 450 | return flash_write_cfiword(info, wp, cword); |
| 451 | } |
| 452 | |
| 453 | /*----------------------------------------------------------------------- |
| 454 | */ |
| 455 | #ifdef CFG_FLASH_PROTECTION |
| 456 | |
| 457 | int flash_real_protect(flash_info_t *info, long sector, int prot) |
| 458 | { |
| 459 | int retcode = 0; |
| 460 | |
| 461 | flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS); |
| 462 | flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT); |
| 463 | if(prot) |
| 464 | flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET); |
| 465 | else |
| 466 | flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR); |
| 467 | |
| 468 | if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout, |
| 469 | prot?"protect":"unprotect")) == 0) { |
| 470 | |
| 471 | info->protect[sector] = prot; |
| 472 | /* Intel's unprotect unprotects all locking */ |
| 473 | if(prot == 0) { |
| 474 | flash_sect_t i; |
| 475 | for(i = 0 ; i<info->sector_count; i++) { |
| 476 | if(info->protect[i]) |
| 477 | flash_real_protect(info, i, 1); |
| 478 | } |
| 479 | } |
| 480 | } |
| 481 | |
| 482 | return retcode; |
| 483 | } |
| 484 | /*----------------------------------------------------------------------- |
| 485 | * flash_read_user_serial - read the OneTimeProgramming cells |
| 486 | */ |
| 487 | void flash_read_user_serial(flash_info_t * info, void * buffer, int offset, int len) |
| 488 | { |
| 489 | uchar * src; |
| 490 | uchar * dst; |
| 491 | |
| 492 | dst = buffer; |
| 493 | src = flash_make_addr(info, 0, FLASH_OFFSET_USER_PROTECTION); |
| 494 | flash_write_cmd(info,0, 0, FLASH_CMD_READ_ID); |
| 495 | memcpy(dst,src + offset,len); |
| 496 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); |
| 497 | } |
| 498 | /* |
| 499 | * flash_read_factory_serial - read the device Id from the protection area |
| 500 | */ |
| 501 | void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, int len) |
| 502 | { |
| 503 | uchar * src; |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 504 | |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 505 | src = flash_make_addr(info, 0, FLASH_OFFSET_INTEL_PROTECTION); |
| 506 | flash_write_cmd(info,0, 0, FLASH_CMD_READ_ID); |
| 507 | memcpy(buffer,src + offset,len); |
| 508 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); |
| 509 | } |
| 510 | |
| 511 | #endif /* CFG_FLASH_PROTECTION */ |
| 512 | |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 513 | static int flash_poll_status(flash_info_t * info, flash_sect_t sect) |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 514 | { |
| 515 | int retval; |
| 516 | switch(info->vendor) { |
| 517 | case CFI_CMDSET_INTEL_STANDARD: |
| 518 | case CFI_CMDSET_INTEL_EXTENDED: |
| 519 | retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE); |
| 520 | break; |
| 521 | case CFI_CMDSET_AMD_STANDARD: |
| 522 | case CFI_CMDSET_AMD_EXTENDED: |
| 523 | retval = flash_toggle(info, sect, 0, AMD_STATUS_TOGGLE); |
| 524 | break; |
| 525 | default: |
| 526 | retval = 0; |
| 527 | } |
| 528 | return retval; |
| 529 | } |
| 530 | /*----------------------------------------------------------------------- |
| 531 | * wait for XSR.7 to be set. Time out with an error if it does not. |
| 532 | * This routine does not set the flash to read-array mode. |
| 533 | */ |
| 534 | static int flash_status_check(flash_info_t * info, flash_sect_t sector, ulong tout, char * prompt) |
| 535 | { |
| 536 | ulong start; |
| 537 | |
| 538 | /* Wait for command completion */ |
| 539 | start = get_timer (0); |
| 540 | while (flash_poll_status(info, sector)) { |
| 541 | if (get_timer(start) > info->erase_blk_tout) { |
| 542 | printf("Flash %s timeout at address %lx\n", prompt, info->start[sector]); |
| 543 | flash_write_cmd(info, sector, 0, info->cmd_reset); |
| 544 | return ERR_TIMOUT; |
| 545 | } |
| 546 | } |
| 547 | return ERR_OK; |
| 548 | } |
| 549 | /*----------------------------------------------------------------------- |
| 550 | * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check. |
| 551 | * This routine sets the flash to read-array mode. |
| 552 | */ |
| 553 | static int flash_full_status_check(flash_info_t * info, flash_sect_t sector, ulong tout, char * prompt) |
| 554 | { |
| 555 | int retcode; |
| 556 | retcode = flash_status_check(info, sector, tout, prompt); |
| 557 | switch(info->vendor) { |
| 558 | case CFI_CMDSET_INTEL_EXTENDED: |
| 559 | case CFI_CMDSET_INTEL_STANDARD: |
| 560 | if((retcode == ERR_OK) && !flash_isequal(info,sector, 0, FLASH_STATUS_DONE)) { |
| 561 | retcode = ERR_INVAL; |
| 562 | printf("Flash %s error at address %lx\n", prompt,info->start[sector]); |
| 563 | if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)){ |
| 564 | printf("Command Sequence Error.\n"); |
| 565 | } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){ |
| 566 | printf("Block Erase Error.\n"); |
| 567 | retcode = ERR_NOT_ERASED; |
| 568 | } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) { |
| 569 | printf("Locking Error\n"); |
| 570 | } |
| 571 | if(flash_isset(info, sector, 0, FLASH_STATUS_DPS)){ |
| 572 | printf("Block locked.\n"); |
| 573 | retcode = ERR_PROTECTED; |
| 574 | } |
| 575 | if(flash_isset(info, sector, 0, FLASH_STATUS_VPENS)) |
| 576 | printf("Vpp Low Error.\n"); |
| 577 | } |
| 578 | flash_write_cmd(info, sector, 0, FLASH_CMD_RESET); |
| 579 | break; |
| 580 | default: |
| 581 | break; |
| 582 | } |
| 583 | return retcode; |
| 584 | } |
| 585 | /*----------------------------------------------------------------------- |
| 586 | */ |
| 587 | static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c) |
| 588 | { |
| 589 | switch(info->portwidth) { |
| 590 | case FLASH_CFI_8BIT: |
| 591 | cword->c = c; |
| 592 | break; |
| 593 | case FLASH_CFI_16BIT: |
| 594 | cword->w = (cword->w << 8) | c; |
| 595 | break; |
| 596 | case FLASH_CFI_32BIT: |
| 597 | cword->l = (cword->l << 8) | c; |
| 598 | break; |
| 599 | case FLASH_CFI_64BIT: |
| 600 | cword->ll = (cword->ll << 8) | c; |
| 601 | break; |
| 602 | } |
| 603 | } |
| 604 | |
| 605 | |
| 606 | /*----------------------------------------------------------------------- |
| 607 | * make a proper sized command based on the port and chip widths |
| 608 | */ |
| 609 | static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf) |
| 610 | { |
| 611 | int i; |
| 612 | uchar *cp = (uchar *)cmdbuf; |
| 613 | for(i=0; i< info->portwidth; i++) |
| 614 | *cp++ = ((i+1) % info->chipwidth) ? '\0':cmd; |
| 615 | } |
| 616 | |
| 617 | /* |
| 618 | * Write a proper sized command to the correct address |
| 619 | */ |
| 620 | static void flash_write_cmd(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) |
| 621 | { |
| 622 | |
| 623 | volatile cfiptr_t addr; |
| 624 | cfiword_t cword; |
| 625 | addr.cp = flash_make_addr(info, sect, offset); |
| 626 | flash_make_cmd(info, cmd, &cword); |
| 627 | switch(info->portwidth) { |
| 628 | case FLASH_CFI_8BIT: |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 629 | debug("fwc addr %p cmd %x %x 8bit x %d bit\n",addr.cp, cmd, cword.c, |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 630 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); |
| 631 | *addr.cp = cword.c; |
| 632 | break; |
| 633 | case FLASH_CFI_16BIT: |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 634 | debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n",addr.wp, cmd, cword.w, |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 635 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); |
| 636 | *addr.wp = cword.w; |
| 637 | break; |
| 638 | case FLASH_CFI_32BIT: |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 639 | debug("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n",addr.lp, cmd, cword.l, |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 640 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); |
| 641 | *addr.lp = cword.l; |
| 642 | break; |
| 643 | case FLASH_CFI_64BIT: |
| 644 | #ifdef DEBUG |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 645 | { |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 646 | char str[20]; |
| 647 | print_longlong(str, cword.ll); |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 648 | |
| 649 | printf("fwc addr %p cmd %x %s 64 bit x %d bit\n",addr.llp, cmd, str, |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 650 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); |
| 651 | } |
| 652 | #endif |
| 653 | *addr.llp = cword.ll; |
| 654 | break; |
| 655 | } |
| 656 | } |
| 657 | |
| 658 | static void flash_unlock_seq(flash_info_t *info) |
| 659 | { |
| 660 | flash_write_cmd(info, 0, 0x555, 0xAA); |
| 661 | flash_write_cmd(info, 0, 0x2AA, 0x55); |
| 662 | } |
| 663 | /*----------------------------------------------------------------------- |
| 664 | */ |
| 665 | static int flash_isequal(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) |
| 666 | { |
| 667 | cfiptr_t cptr; |
| 668 | cfiword_t cword; |
| 669 | int retval; |
| 670 | cptr.cp = flash_make_addr(info, sect, offset); |
| 671 | flash_make_cmd(info, cmd, &cword); |
| 672 | |
| 673 | debug("is= cmd %x(%c) addr %p ", cmd,cmd, cptr.cp); |
| 674 | switch(info->portwidth) { |
| 675 | case FLASH_CFI_8BIT: |
| 676 | debug("is= %x %x\n", cptr.cp[0], cword.c); |
| 677 | retval = (cptr.cp[0] == cword.c); |
| 678 | break; |
| 679 | case FLASH_CFI_16BIT: |
| 680 | debug("is= %4.4x %4.4x\n", cptr.wp[0], cword.w); |
| 681 | retval = (cptr.wp[0] == cword.w); |
| 682 | break; |
| 683 | case FLASH_CFI_32BIT: |
| 684 | debug("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l); |
| 685 | retval = (cptr.lp[0] == cword.l); |
| 686 | break; |
| 687 | case FLASH_CFI_64BIT: |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 688 | #ifdef DEBUG |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 689 | { |
| 690 | char str1[20]; |
| 691 | char str2[20]; |
| 692 | print_longlong(str1, cptr.llp[0]); |
| 693 | print_longlong(str2, cword.ll); |
| 694 | printf("is= %s %s\n", str1, str2); |
| 695 | } |
| 696 | #endif |
| 697 | retval = (cptr.llp[0] == cword.ll); |
| 698 | break; |
| 699 | default: |
| 700 | retval = 0; |
| 701 | break; |
| 702 | } |
| 703 | return retval; |
| 704 | } |
| 705 | /*----------------------------------------------------------------------- |
| 706 | */ |
| 707 | static int flash_isset(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) |
| 708 | { |
| 709 | cfiptr_t cptr; |
| 710 | cfiword_t cword; |
| 711 | int retval; |
| 712 | cptr.cp = flash_make_addr(info, sect, offset); |
| 713 | flash_make_cmd(info, cmd, &cword); |
| 714 | switch(info->portwidth) { |
| 715 | case FLASH_CFI_8BIT: |
| 716 | retval = ((cptr.cp[0] & cword.c) == cword.c); |
| 717 | break; |
| 718 | case FLASH_CFI_16BIT: |
| 719 | retval = ((cptr.wp[0] & cword.w) == cword.w); |
| 720 | break; |
| 721 | case FLASH_CFI_32BIT: |
| 722 | retval = ((cptr.lp[0] & cword.l) == cword.l); |
| 723 | break; |
| 724 | case FLASH_CFI_64BIT: |
| 725 | retval = ((cptr.llp[0] & cword.ll) == cword.ll); |
| 726 | default: |
| 727 | retval = 0; |
| 728 | break; |
| 729 | } |
| 730 | return retval; |
| 731 | } |
| 732 | |
| 733 | /*----------------------------------------------------------------------- |
| 734 | */ |
| 735 | static int flash_toggle(flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd) |
| 736 | { |
| 737 | cfiptr_t cptr; |
| 738 | cfiword_t cword; |
| 739 | int retval; |
| 740 | cptr.cp = flash_make_addr(info, sect, offset); |
| 741 | flash_make_cmd(info, cmd, &cword); |
| 742 | switch(info->portwidth) { |
| 743 | case FLASH_CFI_8BIT: |
| 744 | retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c)); |
| 745 | break; |
| 746 | case FLASH_CFI_16BIT: |
| 747 | retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w)); |
| 748 | break; |
| 749 | case FLASH_CFI_32BIT: |
| 750 | retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l)); |
| 751 | break; |
| 752 | case FLASH_CFI_64BIT: |
| 753 | retval = ((cptr.llp[0] & cword.ll) != (cptr.llp[0] & cword.ll)); |
| 754 | break; |
| 755 | default: |
| 756 | retval = 0; |
| 757 | break; |
| 758 | } |
| 759 | return retval; |
| 760 | } |
| 761 | |
| 762 | /*----------------------------------------------------------------------- |
| 763 | * detect if flash is compatible with the Common Flash Interface (CFI) |
| 764 | * http://www.jedec.org/download/search/jesd68.pdf |
| 765 | * |
| 766 | */ |
| 767 | static int flash_detect_cfi(flash_info_t * info) |
| 768 | { |
| 769 | |
| 770 | puts("flash detect cfi\n"); |
| 771 | |
| 772 | for(info->portwidth=FLASH_CFI_8BIT; info->portwidth <= FLASH_CFI_64BIT; |
| 773 | info->portwidth <<= 1) { |
| 774 | /* for(info->chipwidth = info->portwidth; |
| 775 | info->chipwidth > 0; |
| 776 | info->chipwidth >>= 1) { */ |
| 777 | for(info->chipwidth =FLASH_CFI_BY8; |
| 778 | info->chipwidth <= info->portwidth; |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 779 | info->chipwidth <<= 1) { |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 780 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); |
| 781 | flash_write_cmd(info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI); |
| 782 | if(flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP,'Q') && |
| 783 | flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') && |
| 784 | flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { |
| 785 | debug("found port %d chip %d ", info->portwidth, info->chipwidth); |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 786 | debug("port %d bits chip %d bits\n", info->portwidth << CFI_FLASH_SHIFT_WIDTH, |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 787 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); |
| 788 | return 1; |
| 789 | } |
| 790 | } |
| 791 | } |
| 792 | puts("not found\n"); |
| 793 | return 0; |
| 794 | } |
| 795 | /* |
| 796 | * The following code cannot be run from FLASH! |
| 797 | * |
| 798 | */ |
| 799 | static ulong flash_get_size (ulong base, int banknum) |
| 800 | { |
| 801 | flash_info_t * info = &flash_info[banknum]; |
| 802 | int i, j; |
| 803 | flash_sect_t sect_cnt; |
| 804 | unsigned long sector; |
| 805 | unsigned long tmp; |
| 806 | int size_ratio; |
| 807 | uchar num_erase_regions; |
| 808 | int erase_region_size; |
| 809 | int erase_region_count; |
| 810 | |
| 811 | info->start[0] = base; |
| 812 | |
| 813 | if(flash_detect_cfi(info)){ |
| 814 | info->vendor = flash_read_ushort(info, 0, FLASH_OFFSET_PRIMARY_VENDOR); |
| 815 | switch(info->vendor) { |
| 816 | case CFI_CMDSET_INTEL_STANDARD: |
| 817 | case CFI_CMDSET_INTEL_EXTENDED: |
| 818 | default: |
| 819 | info->cmd_reset = FLASH_CMD_RESET; |
| 820 | break; |
| 821 | case CFI_CMDSET_AMD_STANDARD: |
| 822 | case CFI_CMDSET_AMD_EXTENDED: |
| 823 | info->cmd_reset = AMD_CMD_RESET; |
| 824 | break; |
| 825 | } |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 826 | |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 827 | debug("manufacturer is %d\n", info->vendor); |
| 828 | size_ratio = info->portwidth / info->chipwidth; |
| 829 | num_erase_regions = flash_read_uchar(info, FLASH_OFFSET_NUM_ERASE_REGIONS); |
wdenk | 6cfa84e | 2004-02-10 00:03:41 +0000 | [diff] [blame^] | 830 | debug("size_ration %d port %d bits chip %d bits\n", size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, |
wdenk | 2cefd15 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 831 | info->chipwidth << CFI_FLASH_SHIFT_WIDTH); |
| 832 | debug("found %d erase regions\n", num_erase_regions); |
| 833 | sect_cnt = 0; |
| 834 | sector = base; |
| 835 | for(i = 0 ; i < num_erase_regions; i++) { |
| 836 | if(i > NUM_ERASE_REGIONS) { |
| 837 | printf("%d erase regions found, only %d used\n", |
| 838 | num_erase_regions, NUM_ERASE_REGIONS); |
| 839 | break; |
| 840 | } |
| 841 | tmp = flash_read_long(info, 0, FLASH_OFFSET_ERASE_REGIONS + i*4); |
| 842 | erase_region_size = (tmp & 0xffff)? ((tmp & 0xffff) * 256): 128; |
| 843 | tmp >>= 16; |
| 844 | erase_region_count = (tmp & 0xffff) +1; |
| 845 | for(j = 0; j< erase_region_count; j++) { |
| 846 | info->start[sect_cnt] = sector; |
| 847 | sector += (erase_region_size * size_ratio); |
| 848 | info->protect[sect_cnt] = flash_isset(info, sect_cnt, FLASH_OFFSET_PROTECT, FLASH_STATUS_PROTECT); |
| 849 | sect_cnt++; |
| 850 | } |
| 851 | } |
| 852 | |
| 853 | info->sector_count = sect_cnt; |
| 854 | /* multiply the size by the number of chips */ |
| 855 | info->size = (1 << flash_read_uchar(info, FLASH_OFFSET_SIZE)) * size_ratio; |
| 856 | info->buffer_size = (1 << flash_read_ushort(info, 0, FLASH_OFFSET_BUFFER_SIZE)); |
| 857 | tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_ETOUT); |
| 858 | info->erase_blk_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_EMAX_TOUT))); |
| 859 | tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WBTOUT); |
| 860 | info->buffer_write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WBMAX_TOUT))); |
| 861 | tmp = 1 << flash_read_uchar(info, FLASH_OFFSET_WTOUT); |
| 862 | info->write_tout = (tmp * (1 << flash_read_uchar(info, FLASH_OFFSET_WMAX_TOUT)))/ 1000; |
| 863 | info->flash_id = FLASH_MAN_CFI; |
| 864 | } |
| 865 | |
| 866 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); |
| 867 | return(info->size); |
| 868 | } |
| 869 | |
| 870 | |
| 871 | /*----------------------------------------------------------------------- |
| 872 | */ |
| 873 | static int flash_write_cfiword (flash_info_t *info, ulong dest, cfiword_t cword) |
| 874 | { |
| 875 | |
| 876 | cfiptr_t ctladdr; |
| 877 | cfiptr_t cptr; |
| 878 | int flag; |
| 879 | |
| 880 | ctladdr.cp = flash_make_addr(info, 0, 0); |
| 881 | cptr.cp = (uchar *)dest; |
| 882 | |
| 883 | |
| 884 | /* Check if Flash is (sufficiently) erased */ |
| 885 | switch(info->portwidth) { |
| 886 | case FLASH_CFI_8BIT: |
| 887 | flag = ((cptr.cp[0] & cword.c) == cword.c); |
| 888 | break; |
| 889 | case FLASH_CFI_16BIT: |
| 890 | flag = ((cptr.wp[0] & cword.w) == cword.w); |
| 891 | break; |
| 892 | case FLASH_CFI_32BIT: |
| 893 | flag = ((cptr.lp[0] & cword.l) == cword.l); |
| 894 | break; |
| 895 | case FLASH_CFI_64BIT: |
| 896 | flag = ((cptr.lp[0] & cword.ll) == cword.ll); |
| 897 | break; |
| 898 | default: |
| 899 | return 2; |
| 900 | } |
| 901 | if(!flag) |
| 902 | return 2; |
| 903 | |
| 904 | /* Disable interrupts which might cause a timeout here */ |
| 905 | flag = disable_interrupts(); |
| 906 | |
| 907 | switch(info->vendor) { |
| 908 | case CFI_CMDSET_INTEL_EXTENDED: |
| 909 | case CFI_CMDSET_INTEL_STANDARD: |
| 910 | flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS); |
| 911 | flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE); |
| 912 | break; |
| 913 | case CFI_CMDSET_AMD_EXTENDED: |
| 914 | case CFI_CMDSET_AMD_STANDARD: |
| 915 | flash_unlock_seq(info); |
| 916 | flash_write_cmd(info, 0, 0x555, AMD_CMD_WRITE); |
| 917 | break; |
| 918 | } |
| 919 | |
| 920 | switch(info->portwidth) { |
| 921 | case FLASH_CFI_8BIT: |
| 922 | cptr.cp[0] = cword.c; |
| 923 | break; |
| 924 | case FLASH_CFI_16BIT: |
| 925 | cptr.wp[0] = cword.w; |
| 926 | break; |
| 927 | case FLASH_CFI_32BIT: |
| 928 | cptr.lp[0] = cword.l; |
| 929 | break; |
| 930 | case FLASH_CFI_64BIT: |
| 931 | cptr.llp[0] = cword.ll; |
| 932 | break; |
| 933 | } |
| 934 | |
| 935 | /* re-enable interrupts if necessary */ |
| 936 | if(flag) |
| 937 | enable_interrupts(); |
| 938 | |
| 939 | return flash_full_status_check(info, 0, info->write_tout, "write"); |
| 940 | } |
| 941 | |
| 942 | #ifdef CFG_FLASH_USE_BUFFER_WRITE |
| 943 | |
| 944 | /* loop through the sectors from the highest address |
| 945 | * when the passed address is greater or equal to the sector address |
| 946 | * we have a match |
| 947 | */ |
| 948 | static flash_sect_t find_sector(flash_info_t *info, ulong addr) |
| 949 | { |
| 950 | flash_sect_t sector; |
| 951 | for(sector = info->sector_count - 1; sector >= 0; sector--) { |
| 952 | if(addr >= info->start[sector]) |
| 953 | break; |
| 954 | } |
| 955 | return sector; |
| 956 | } |
| 957 | |
| 958 | static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len) |
| 959 | { |
| 960 | flash_sect_t sector; |
| 961 | int cnt; |
| 962 | int retcode; |
| 963 | volatile cfiptr_t src; |
| 964 | volatile cfiptr_t dst; |
| 965 | |
| 966 | src.cp = cp; |
| 967 | dst.cp = (uchar *)dest; |
| 968 | sector = find_sector(info, dest); |
| 969 | flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS); |
| 970 | flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER); |
| 971 | if((retcode = flash_status_check(info, sector, info->buffer_write_tout, |
| 972 | "write to buffer")) == ERR_OK) { |
| 973 | switch(info->portwidth) { |
| 974 | case FLASH_CFI_8BIT: |
| 975 | cnt = len; |
| 976 | break; |
| 977 | case FLASH_CFI_16BIT: |
| 978 | cnt = len >> 1; |
| 979 | break; |
| 980 | case FLASH_CFI_32BIT: |
| 981 | cnt = len >> 2; |
| 982 | break; |
| 983 | case FLASH_CFI_64BIT: |
| 984 | cnt = len >> 3; |
| 985 | break; |
| 986 | default: |
| 987 | return ERR_INVAL; |
| 988 | break; |
| 989 | } |
| 990 | flash_write_cmd(info, sector, 0, (uchar)cnt-1); |
| 991 | while(cnt-- > 0) { |
| 992 | switch(info->portwidth) { |
| 993 | case FLASH_CFI_8BIT: |
| 994 | *dst.cp++ = *src.cp++; |
| 995 | break; |
| 996 | case FLASH_CFI_16BIT: |
| 997 | *dst.wp++ = *src.wp++; |
| 998 | break; |
| 999 | case FLASH_CFI_32BIT: |
| 1000 | *dst.lp++ = *src.lp++; |
| 1001 | break; |
| 1002 | case FLASH_CFI_64BIT: |
| 1003 | *dst.llp++ = *src.llp++; |
| 1004 | break; |
| 1005 | default: |
| 1006 | return ERR_INVAL; |
| 1007 | break; |
| 1008 | } |
| 1009 | } |
| 1010 | flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM); |
| 1011 | retcode = flash_full_status_check(info, sector, info->buffer_write_tout, |
| 1012 | "buffer write"); |
| 1013 | } |
| 1014 | flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS); |
| 1015 | return retcode; |
| 1016 | } |
| 1017 | #endif /* CFG_USE_FLASH_BUFFER_WRITE */ |
| 1018 | #endif /* CFG_FLASH_CFI */ |