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git01.mediatek.com / filogic / uboot / e904f17f9764426b6d2e821bd6981e8e48df1a4d / . / arch / arm / mach-mvebu / Kconfig
blob: c1a1a333e6c99187c9443243b42d06b18a3e4c57 [file] [log] [blame]
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]1if ARCH_MVEBU
2
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]3config HAVE_MVEBU_EFUSE
4 bool
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]5
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]6config ARMADA_32BIT
7 bool
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]8 select BOARD_EARLY_INIT_F
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530[diff] [blame]9 select CPU_V7A
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]10 select SPL_DM if SPL
11 select SPL_DM_SEQ_ALIAS if SPL
12 select SPL_OF_CONTROL if SPL
Tom Rinib7cc2fe2021-10-15 10:54:41 -0400[diff] [blame]13 select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]14 select SPL_SIMPLE_BUS if SPL
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]15 select SUPPORT_SPL
Philip Oberfichtner5833e1b2022-08-17 15:07:12 +0200[diff] [blame]16 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese85bddff2019-04-12 16:42:28 +0200[diff] [blame]17 select TRANSLATION_OFFSET
Alexander Dahl3f3c8382023-12-21 08:26:10 +0100[diff] [blame]18 select TOOLS_KWBIMAGE if SPL
Pali Rohárc5c28df2022-04-06 16:20:20 +0200[diff] [blame]19 select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Roháraaed3282022-05-06 11:05:14 +0200[diff] [blame]20 select ARCH_VERY_EARLY_INIT
Marek Behún32a932a2024-04-04 09:50:59 +0200[diff] [blame]21 select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU
Marek Behún514628c2024-04-04 09:51:00 +0200[diff] [blame]22 select ARMADA_32BIT_SYSCON_SYSRESET if SYSRESET
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]23
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]24# ARMv7 SoCs...
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]25config ARMADA_375
26 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]27 select ARMADA_32BIT
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]28
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]29config ARMADA_38X
30 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]31 select ARMADA_32BIT
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]32 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]33
Joshua Scott4ba8e992020-11-09 10:14:08 +1300[diff] [blame]34config ARMADA_38X_HS_IMPEDANCE_THRESH
35 hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
36 depends on ARMADA_38X
37 default 0x6
38 range 0x0 0x7
39
Marek Behúne4a2cca2024-06-18 17:34:38 +0200[diff] [blame]40config ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING
41 bool
42 depends on ARMADA_38X
43
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]44config ARMADA_XP
45 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]46 select ARMADA_32BIT
47
48# ARMv8 SoCs...
49config ARMADA_3700
50 bool
51 select ARM64
Pali Rohár70d9bee2022-02-23 14:15:45 +0100[diff] [blame]52 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]53
Stefan Roesecb410332016-05-25 08:13:45 +0200[diff] [blame]54# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
55config ARMADA_8K
56 bool
57 select ARM64
58
Chris Packhameaab4612022-11-05 17:23:59 +1300[diff] [blame]59config ALLEYCAT_5
60 bool
61 select ARM64
62
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]63# Armada PLL frequency (used for NAND clock generation)
64config SYS_MVEBU_PLL_CLOCK
65 int
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]66 default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K || ARMADA_MSYS
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]67 default "1000000000" if ARMADA_38X || ARMADA_375
68
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]69# Armada XP/38x SoC types...
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]70config MV78230
71 bool
72 select ARMADA_XP
73
74config MV78260
75 bool
76 select ARMADA_XP
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]77 imply CMD_SATA
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]78
79config MV78460
80 bool
81 select ARMADA_XP
82
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]83config ARMADA_MSYS
84 bool
85 select ARMADA_32BIT
86
87config 98DX4251
88 bool
89 select ARMADA_MSYS
90
91config 98DX3336
92 bool
93 select ARMADA_MSYS
94
95config 98DX3236
96 bool
97 select ARMADA_MSYS
98
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]99config 88F6820
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]100 bool
101 select ARMADA_38X
102
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]103config CUSTOMER_BOARD_SUPPORT
104 bool
105
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]106config DDR4
107 bool "Support Marvell DDR4 Training driver"
108
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]109choice
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]110 prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]111 optional
112
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]113config TARGET_CLEARFOG
114 bool "Support ClearFog"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]115 select 88F6820
Baruch Siach1c5e95d2020-01-20 14:20:13 +0200[diff] [blame]116 select BOARD_LATE_INIT
Martin Rowe7eceb672023-03-27 21:24:09 +1000[diff] [blame]117 select OF_BOARD_SETUP
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]118
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]119config TARGET_HELIOS4
120 bool "Support Helios4"
121 select 88F6820
122
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]123config TARGET_MVEBU_ARMADA_37XX
124 bool "Support Armada 37xx platforms"
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]125 select ARMADA_3700
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]126 imply SCSI
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]127
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]128config TARGET_DB_88F6720
129 bool "Support DB-88F6720 Armada 375"
130 select ARMADA_375
131
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]132config TARGET_DB_88F6820_GP
133 bool "Support DB-88F6820-GP"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]134 select 88F6820
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]135
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]136config TARGET_DB_88F6820_AMC
137 bool "Support DB-88F6820-AMC"
138 select 88F6820
139
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]140config TARGET_TURRIS_OMNIA
141 bool "Support Turris Omnia"
142 select 88F6820
Marek Behún0f2e66a2019-05-02 16:53:37 +0200[diff] [blame]143 select BOARD_LATE_INIT
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]144 select DM_I2C
145 select I2C_MUX
146 select I2C_MUX_PCA954x
Marek Behún4c3abea2021-10-09 19:33:46 +0200[diff] [blame]147 select SPL_DRIVERS_MISC
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]148 select SPL_I2C_MUX
Marek Behúnca6095b2021-10-09 19:33:45 +0200[diff] [blame]149 select SPL_SYS_MALLOC_SIMPLE
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]150 select SYS_I2C_MVTWSI
Marek Behún5e92efe2019-05-02 16:53:32 +0200[diff] [blame]151 select ATSHA204A
Marek Behún6fa120d2024-08-29 10:08:48 +0200[diff] [blame]152 select I2C_EEPROM
Marek Behúnd1e68442024-06-18 17:34:39 +0200[diff] [blame]153 select ARMADA_38X_SUPPORT_OLD_DDR3_TRAINING
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]154
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]155config TARGET_TURRIS_MOX
Marek Behún1b010112023-10-20 16:29:16 +0200[diff] [blame]156 bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe"
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]157 select ARMADA_3700
Marek Behún1b010112023-10-20 16:29:16 +0200[diff] [blame]158 select BOARD_TYPES
159 select ENV_IS_IN_MMC
160 select ENV_IS_IN_SPI_FLASH
161 select MULTI_DTB_FIT
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]162
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]163config TARGET_MVEBU_ARMADA_8K
164 bool "Support Armada 7k/8k platforms"
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]165 select ARMADA_8K
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]166 select BOARD_LATE_INIT
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]167 imply SCSI
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]168
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]169config TARGET_MVEBU_ALLEYCAT5
170 bool "Support AlleyCat 5 platforms"
171 select ALLEYCAT_5
172
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]173config TARGET_OCTEONTX2_CN913x
174 bool "Support CN913x platforms"
175 select ARMADA_8K
176 imply BOARD_EARLY_INIT_R
177 select BOARD_LATE_INIT
178 imply SCSI
179
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]180config TARGET_DB_MV784MP_GP
181 bool "Support db-mv784mp-gp"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]182 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]183 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]184
Tony Dinh6aebc1a2023-02-09 14:00:03 -0800[diff] [blame]185config TARGET_DS116
186 bool "Support Synology DS116"
187 select 88F6820
188
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]189config TARGET_DS414
190 bool "Support Synology DS414"
191 select MV78230
192
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]193config TARGET_MAXBCM
194 bool "Support maxbcm"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]195 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]196 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]197
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]198config TARGET_N2350
199 bool "Support Thecus N2350"
200 select 88F6820
201 select DDR4
202
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]203config TARGET_THEADORABLE
204 bool "Support theadorable Armada XP"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]205 select BOARD_LATE_INIT if USB
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]206 select MV78260
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]207 imply CMD_SATA
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]208
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]209config TARGET_CONTROLCENTERDC
210 bool "Support CONTROLCENTERDC"
211 select 88F6820
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]212 select CUSTOMER_BOARD_SUPPORT
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]213
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]214config TARGET_X530
215 bool "Support Allied Telesis x530"
216 select 88F6820
217
Chris Packham7325f1f2023-07-10 10:47:36 +1200[diff] [blame]218config TARGET_X240
219 bool "Support Allied Telesis x240"
220 select ALLEYCAT_5
221
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]222config TARGET_DB_XC3_24G4XG
223 bool "Support DB-XC3-24G4XG"
224 select 98DX3336
225
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]226config TARGET_CRS3XX_98DX3236
227 bool "Support CRS3XX-98DX3236"
Luka Kovacicb686e222019-05-07 19:35:55 +0200[diff] [blame]228 select 98DX3236
229
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]230endchoice
231
Tom Rini59180392021-08-21 13:50:13 -0400[diff] [blame]232choice
233 prompt "DDR bus width"
234 default DDR_64BIT
235 depends on ARMADA_XP
236
237config DDR_64BIT
238 bool "64bit bus width"
239
240config DDR_32BIT
241 bool "32bit bus width"
242
243endchoice
244
Tom Rini592bcd02021-08-21 13:50:15 -0400[diff] [blame]245config DDR_LOG_LEVEL
246 int "DDR training code log level"
247 depends on ARMADA_XP
248 default 0
249 range 0 3
250 help
251 Amount of information provided on error while running the DDR
252 training code. At level 0, provides an error code in a case of
253 failure, RL, WL errors and other algorithm failure. At level 1,
254 provides the D-Unit setup (SPD/Static configuration). At level 2,
255 provides the windows margin as a results of DQS centeralization.
256 At level 3, rovides the windows margin of each DQ as a results of
257 DQS centeralization.
258
Marek Behúne8bd7582024-06-18 17:34:28 +0200[diff] [blame]259config DDR_IMMUTABLE_DEBUG_SETTINGS
260 bool "Immutable DDR debug level (always DEBUG_LEVEL_ERROR)"
261 depends on ARMADA_38X
262 help
263 Makes the DDR training code debug level settings immutable.
264 The debug level setting from board topology definition is ignored.
265 The debug level is always set to DEBUG_LEVEL_ERROR and register
266 dumps are disabled.
267 This can save around 10 KiB of space in SPL binary.
268
Marek Behún90555af2022-02-17 13:54:42 +0100[diff] [blame]269config DDR_RESET_ON_TRAINING_FAILURE
270 bool "Reset the board on DDR training failure instead of hanging"
271 depends on ARMADA_38X || ARMADA_XP
272 help
273 If DDR training fails in SPL, reset the board instead of hanging.
274 Some boards are known to fail DDR training occasionally and an
275 immediate reset may be preferable to waiting until the board is
276 reset by watchdog (if there even is one).
277
278 Note that if booting via UART and the DDR training fails, the
279 device will still hang - it doesn't make sense to reset the board
280 in such a case.
281
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]282config BOARD_ECC_SUPPORT
283 bool
284
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]285config SYS_BOARD
286 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]287 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]288 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]289 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]290 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]291 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]292 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]293 default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]294 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]295 default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]296 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh6aebc1a2023-02-09 14:00:03 -0800[diff] [blame]297 default "ds116" if TARGET_DS116
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]298 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]299 default "maxbcm" if TARGET_MAXBCM
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]300 default "n2350" if TARGET_N2350
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]301 default "theadorable" if TARGET_THEADORABLE
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]302 default "a38x" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]303 default "x530" if TARGET_X530
Chris Packham7325f1f2023-07-10 10:47:36 +1200[diff] [blame]304 default "x240" if TARGET_X240
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]305 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]306 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]307 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]308
309config SYS_CONFIG_NAME
310 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]311 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]312 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]313 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]314 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]315 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]316 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]317 default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]318 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh6aebc1a2023-02-09 14:00:03 -0800[diff] [blame]319 default "ds116" if TARGET_DS116
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]320 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]321 default "maxbcm" if TARGET_MAXBCM
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]322 default "n2350" if TARGET_N2350
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]323 default "theadorable" if TARGET_THEADORABLE
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]324 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]325 default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]326 default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]327 default "x530" if TARGET_X530
Chris Packham7325f1f2023-07-10 10:47:36 +1200[diff] [blame]328 default "x240" if TARGET_X240
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]329 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]330 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]331 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]332
333config SYS_VENDOR
334 default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]335 default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]336 default "Marvell" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]337 default "Marvell" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]338 default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]339 default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]340 default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]341 default "Marvell" if TARGET_DB_XC3_24G4XG
342 default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]343 default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]344 default "kobol" if TARGET_HELIOS4
Tony Dinh6aebc1a2023-02-09 14:00:03 -0800[diff] [blame]345 default "Synology" if TARGET_DS116
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]346 default "Synology" if TARGET_DS414
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]347 default "thecus" if TARGET_N2350
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]348 default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]349 default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]350 default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]351 default "alliedtelesis" if TARGET_X530
Chris Packham7325f1f2023-07-10 10:47:36 +1200[diff] [blame]352 default "alliedtelesis" if TARGET_X240
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]353 default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]354 default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]355
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]356config SYS_SOC
357 default "mvebu"
358
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]359choice
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]360 prompt "Boot method"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]361 depends on SPL
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]362
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]363config MVEBU_SPL_BOOT_DEVICE_SPI
Pali Rohár8d110322023-01-10 23:13:01 +0100[diff] [blame]364 bool "NOR flash (SPI or parallel)"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]365 imply ENV_IS_IN_SPI_FLASH
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]366 imply SPL_DM_SPI
367 imply SPL_SPI_FLASH_SUPPORT
368 imply SPL_SPI_LOAD
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]369 imply SPL_SPI
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]370 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]371
Pali Rohár5c5cf602023-01-10 22:55:21 +0100[diff] [blame]372config MVEBU_SPL_BOOT_DEVICE_NAND
373 bool "NAND flash (SPI or parallel)"
374 select MTD_RAW_NAND
375 select SPL_BOOTROM_SUPPORT
376
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]377config MVEBU_SPL_BOOT_DEVICE_MMC
Pali Rohár8d110322023-01-10 23:13:01 +0100[diff] [blame]378 bool "eMMC or SD card"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]379 imply ENV_IS_IN_MMC
380 # GPIO needed for eMMC/SD card presence detection
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]381 imply SPL_DM_GPIO
382 imply SPL_DM_MMC
383 imply SPL_GPIO
384 imply SPL_LIBDISK_SUPPORT
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]385 imply SPL_MMC
Pali Rohárcefdc032023-01-08 13:31:41 +0100[diff] [blame]386 select SUPPORT_EMMC_BOOT if SPL_MMC
Pali Roháraa6244e2023-01-09 00:52:09 +0100[diff] [blame]387 select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]388 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]389
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]390config MVEBU_SPL_BOOT_DEVICE_SATA
391 bool "SATA"
Simon Glass081a45a2021-08-08 12:20:17 -0600[diff] [blame]392 imply SPL_SATA
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]393 imply SPL_LIBDISK_SUPPORT
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]394 select SPL_BOOTROM_SUPPORT
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]395
Pali Rohárea876902023-01-10 23:09:15 +0100[diff] [blame]396config MVEBU_SPL_BOOT_DEVICE_PEX
397 bool "PCI Express"
398 select SPL_BOOTROM_SUPPORT
399
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]400config MVEBU_SPL_BOOT_DEVICE_UART
401 bool "UART"
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]402 select SPL_BOOTROM_SUPPORT
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]403
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]404endchoice
405
Pali Rohár5c5cf602023-01-10 22:55:21 +0100[diff] [blame]406config MVEBU_SPL_NAND_BADBLK_LOCATION
407 hex "NAND Bad block indicator location"
408 depends on MVEBU_SPL_BOOT_DEVICE_NAND
409 range 0x0 0x1
410 help
411 Value 0x0 = SLC flash = BBI at page 0 or page 1
412 Value 0x1 = MLC flash = BBI at last page in the block
413
Pali Rohár7085f822023-03-29 21:25:58 +0200[diff] [blame]414config MVEBU_SPL_SATA_BLKSZ
415 int "SATA block size"
416 depends on MVEBU_SPL_BOOT_DEVICE_SATA
417 range 512 32768
418 default 512
419 help
420 Block size of the SATA disk in bytes.
421 Typically 512 bytes for majority of disks
422 and 4096 bytes for 4K Native disks.
423
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]424config MVEBU_EFUSE
425 bool "Enable eFuse support"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]426 depends on HAVE_MVEBU_EFUSE
427 help
428 Enable support for reading and writing eFuses on mvebu SoCs.
429
430config MVEBU_EFUSE_FAKE
431 bool "Fake eFuse access (dry run)"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]432 depends on MVEBU_EFUSE
433 help
434 This enables a "dry run" mode where eFuses are not really programmed.
435 Instead the eFuse accesses are emulated by writing to and reading
436 from a memory block.
437 This is can be used for testing prog scripts.
438
Pali Rohár2662d2c2022-09-22 13:43:45 +0200[diff] [blame]439config MVEBU_EFUSE_VHV_GPIO
440 string "VHV_Enable GPIO name for eFuse programming"
441 depends on MVEBU_EFUSE && !ARMADA_3700
442 help
443 The eFuse programing (burning) phase requires supplying 1.8V to the
444 device on the VHV power pin, while for normal operation the VHV power
445 rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
446 document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
447 .
448 This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
449
450config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
451 bool "VHV_Enable GPIO is Active Low"
452 depends on MVEBU_EFUSE_VHV_GPIO != ""
453
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]454config SECURED_MODE_IMAGE
455 bool "Build image for trusted boot"
456 default false
457 depends on 88F6820
458 help
459 Build an image that employs the ARMADA SoC's trusted boot framework
460 for securely booting images.
461
462config SECURED_MODE_CSK_INDEX
463 int "Index of active CSK"
464 default 0
465 depends on SECURED_MODE_IMAGE
466
Tony Dinh89dc46d2023-03-02 19:27:29 -0800[diff] [blame]467config SF_DEFAULT_SPEED
468 int "Default speed for SPI flash in Hz"
469 default 10000000
470 depends on MVEBU_SPL_BOOT_DEVICE_SPI
471
472config SF_DEFAULT_MODE
473 hex "Default mode for SPI flash"
474 default 0x0
475 depends on MVEBU_SPL_BOOT_DEVICE_SPI
476
Marek Behún514628c2024-04-04 09:51:00 +0200[diff] [blame]477config ARMADA_32BIT_SYSCON
478 bool
479 depends on ARMADA_32BIT
480 select REGMAP
481 select SYSCON
482
Marek Behún1c657bc2024-04-04 09:50:58 +0200[diff] [blame]483config ARMADA_32BIT_SYSCON_RESET
484 bool "Support Armada XP/375/38x/39x reset controller"
485 depends on ARMADA_32BIT
486 depends on DM_RESET
Marek Behún514628c2024-04-04 09:51:00 +0200[diff] [blame]487 select ARMADA_32BIT_SYSCON
Marek Behún1c657bc2024-04-04 09:50:58 +0200[diff] [blame]488 help
489 Build support for Armada XP/375/38x/39x reset controller. This is
490 needed for PCIe support.
491
Marek Behún514628c2024-04-04 09:51:00 +0200[diff] [blame]492config ARMADA_32BIT_SYSCON_SYSRESET
493 bool "Support Armada XP/375/38x/39x sysreset via driver model"
494 depends on ARMADA_32BIT
495 depends on SYSRESET
496 select ARMADA_32BIT_SYSCON
497 help
498 Build support for Armada XP/375/38x/39x system reset via driver model.
499
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]500source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore838e49b2020-12-08 21:07:36 -0600[diff] [blame]501source "board/kobol/helios4/Kconfig"
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]502
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]503endif