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git01.mediatek.com / filogic / uboot / 2662d2c91374221024701f5d17e877a947ed3806 / . / arch / arm / mach-mvebu / Kconfig
blob: fe6b785d0bdc7ae82193eef2ff6ed774a8dd770d [file] [log] [blame]
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]1if ARCH_MVEBU
2
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]3config HAVE_MVEBU_EFUSE
4 bool
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]5
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]6config ARMADA_32BIT
7 bool
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]8 select ARCH_MISC_INIT
9 select BOARD_EARLY_INIT_F
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530[diff] [blame]10 select CPU_V7A
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]11 select SPL_DM if SPL
12 select SPL_DM_SEQ_ALIAS if SPL
13 select SPL_OF_CONTROL if SPL
Tom Rinib7cc2fe2021-10-15 10:54:41 -0400[diff] [blame]14 select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]15 select SPL_SIMPLE_BUS if SPL
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]16 select SUPPORT_SPL
Philip Oberfichtner5833e1b2022-08-17 15:07:12 +0200[diff] [blame]17 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese85bddff2019-04-12 16:42:28 +0200[diff] [blame]18 select TRANSLATION_OFFSET
Pali Rohárc5c28df2022-04-06 16:20:20 +0200[diff] [blame]19 select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Roháraaed3282022-05-06 11:05:14 +0200[diff] [blame]20 select ARCH_VERY_EARLY_INIT
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]21
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]22# ARMv7 SoCs...
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]23config ARMADA_375
24 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]25 select ARMADA_32BIT
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]26
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]27config ARMADA_38X
28 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]29 select ARMADA_32BIT
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]30 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]31
Joshua Scott4ba8e992020-11-09 10:14:08 +1300[diff] [blame]32config ARMADA_38X_HS_IMPEDANCE_THRESH
33 hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
34 depends on ARMADA_38X
35 default 0x6
36 range 0x0 0x7
37
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]38config ARMADA_XP
39 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]40 select ARMADA_32BIT
41
42# ARMv8 SoCs...
43config ARMADA_3700
44 bool
45 select ARM64
Pali Rohár70d9bee2022-02-23 14:15:45 +0100[diff] [blame]46 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]47
Stefan Roesecb410332016-05-25 08:13:45 +0200[diff] [blame]48# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
49config ARMADA_8K
50 bool
51 select ARM64
52
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]53# Armada PLL frequency (used for NAND clock generation)
54config SYS_MVEBU_PLL_CLOCK
55 int
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]56 default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K || ARMADA_MSYS
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]57 default "1000000000" if ARMADA_38X || ARMADA_375
58
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]59# Armada XP/38x SoC types...
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]60config MV78230
61 bool
62 select ARMADA_XP
63
64config MV78260
65 bool
66 select ARMADA_XP
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]67 imply CMD_SATA
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]68
69config MV78460
70 bool
71 select ARMADA_XP
72
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]73config ARMADA_MSYS
74 bool
75 select ARMADA_32BIT
76
77config 98DX4251
78 bool
79 select ARMADA_MSYS
80
81config 98DX3336
82 bool
83 select ARMADA_MSYS
84
85config 98DX3236
86 bool
87 select ARMADA_MSYS
88
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]89config 88F6820
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]90 bool
91 select ARMADA_38X
92
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]93config CUSTOMER_BOARD_SUPPORT
94 bool
95
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]96choice
Stefan Roesecb410332016-05-25 08:13:45 +0200[diff] [blame]97 prompt "Armada XP/375/38x/3700/7K/8K board select"
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]98 optional
99
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]100config TARGET_CLEARFOG
101 bool "Support ClearFog"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]102 select 88F6820
Baruch Siach1c5e95d2020-01-20 14:20:13 +0200[diff] [blame]103 select BOARD_LATE_INIT
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]104
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]105config TARGET_HELIOS4
106 bool "Support Helios4"
107 select 88F6820
108
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]109config TARGET_MVEBU_ARMADA_37XX
110 bool "Support Armada 37xx platforms"
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]111 select ARMADA_3700
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]112 imply SCSI
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]113
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]114config TARGET_DB_88F6720
115 bool "Support DB-88F6720 Armada 375"
116 select ARMADA_375
117
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]118config TARGET_DB_88F6820_GP
119 bool "Support DB-88F6820-GP"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]120 select 88F6820
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]121
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]122config TARGET_DB_88F6820_AMC
123 bool "Support DB-88F6820-AMC"
124 select 88F6820
125
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]126config TARGET_TURRIS_OMNIA
127 bool "Support Turris Omnia"
128 select 88F6820
Marek Behún0f2e66a2019-05-02 16:53:37 +0200[diff] [blame]129 select BOARD_LATE_INIT
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]130 select DM_I2C
131 select I2C_MUX
132 select I2C_MUX_PCA954x
Marek Behún4c3abea2021-10-09 19:33:46 +0200[diff] [blame]133 select SPL_DRIVERS_MISC
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]134 select SPL_I2C_MUX
Marek Behúnca6095b2021-10-09 19:33:45 +0200[diff] [blame]135 select SPL_SYS_MALLOC_SIMPLE
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]136 select SYS_I2C_MVTWSI
Marek Behún5e92efe2019-05-02 16:53:32 +0200[diff] [blame]137 select ATSHA204A
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]138
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]139config TARGET_TURRIS_MOX
140 bool "Support Turris Mox"
141 select ARMADA_3700
142
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]143config TARGET_MVEBU_ARMADA_8K
144 bool "Support Armada 7k/8k platforms"
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]145 select ARMADA_8K
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]146 select BOARD_LATE_INIT
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]147 imply SCSI
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]148
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]149config TARGET_OCTEONTX2_CN913x
150 bool "Support CN913x platforms"
151 select ARMADA_8K
152 imply BOARD_EARLY_INIT_R
153 select BOARD_LATE_INIT
154 imply SCSI
155
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]156config TARGET_DB_MV784MP_GP
157 bool "Support db-mv784mp-gp"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]158 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]159 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]160
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]161config TARGET_DS414
162 bool "Support Synology DS414"
163 select MV78230
164
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]165config TARGET_MAXBCM
166 bool "Support maxbcm"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]167 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]168 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]169
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]170config TARGET_THEADORABLE
171 bool "Support theadorable Armada XP"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]172 select BOARD_LATE_INIT if USB
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]173 select MV78260
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]174 imply CMD_SATA
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]175
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]176config TARGET_CONTROLCENTERDC
177 bool "Support CONTROLCENTERDC"
178 select 88F6820
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]179 select CUSTOMER_BOARD_SUPPORT
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]180
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]181config TARGET_X530
182 bool "Support Allied Telesis x530"
183 select 88F6820
184
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]185config TARGET_DB_XC3_24G4XG
186 bool "Support DB-XC3-24G4XG"
187 select 98DX3336
188
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]189config TARGET_CRS3XX_98DX3236
190 bool "Support CRS3XX-98DX3236"
Luka Kovacicb686e222019-05-07 19:35:55 +0200[diff] [blame]191 select 98DX3236
192
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]193endchoice
194
Tom Rini59180392021-08-21 13:50:13 -0400[diff] [blame]195choice
196 prompt "DDR bus width"
197 default DDR_64BIT
198 depends on ARMADA_XP
199
200config DDR_64BIT
201 bool "64bit bus width"
202
203config DDR_32BIT
204 bool "32bit bus width"
205
206endchoice
207
Tom Rini592bcd02021-08-21 13:50:15 -0400[diff] [blame]208config DDR_LOG_LEVEL
209 int "DDR training code log level"
210 depends on ARMADA_XP
211 default 0
212 range 0 3
213 help
214 Amount of information provided on error while running the DDR
215 training code. At level 0, provides an error code in a case of
216 failure, RL, WL errors and other algorithm failure. At level 1,
217 provides the D-Unit setup (SPD/Static configuration). At level 2,
218 provides the windows margin as a results of DQS centeralization.
219 At level 3, rovides the windows margin of each DQ as a results of
220 DQS centeralization.
221
Marek Behún90555af2022-02-17 13:54:42 +0100[diff] [blame]222config DDR_RESET_ON_TRAINING_FAILURE
223 bool "Reset the board on DDR training failure instead of hanging"
224 depends on ARMADA_38X || ARMADA_XP
225 help
226 If DDR training fails in SPL, reset the board instead of hanging.
227 Some boards are known to fail DDR training occasionally and an
228 immediate reset may be preferable to waiting until the board is
229 reset by watchdog (if there even is one).
230
231 Note that if booting via UART and the DDR training fails, the
232 device will still hang - it doesn't make sense to reset the board
233 in such a case.
234
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]235config BOARD_ECC_SUPPORT
236 bool
237
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]238config SYS_BOARD
239 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]240 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]241 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]242 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]243 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]244 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]245 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]246 default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]247 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]248 default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]249 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]250 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]251 default "maxbcm" if TARGET_MAXBCM
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]252 default "theadorable" if TARGET_THEADORABLE
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]253 default "a38x" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]254 default "x530" if TARGET_X530
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]255 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]256 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]257
258config SYS_CONFIG_NAME
259 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]260 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]261 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]262 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]263 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]264 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]265 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]266 default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]267 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]268 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]269 default "maxbcm" if TARGET_MAXBCM
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]270 default "theadorable" if TARGET_THEADORABLE
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]271 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]272 default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]273 default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]274 default "x530" if TARGET_X530
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]275 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]276 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]277
278config SYS_VENDOR
279 default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]280 default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]281 default "Marvell" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]282 default "Marvell" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]283 default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]284 default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]285 default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]286 default "Marvell" if TARGET_DB_XC3_24G4XG
287 default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]288 default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]289 default "kobol" if TARGET_HELIOS4
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]290 default "Synology" if TARGET_DS414
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]291 default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]292 default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]293 default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]294 default "alliedtelesis" if TARGET_X530
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]295 default "mikrotik" if TARGET_CRS3XX_98DX3236
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]296
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]297config SYS_SOC
298 default "mvebu"
299
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]300choice
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]301 prompt "Boot method"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]302 depends on SPL
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]303
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]304config MVEBU_SPL_BOOT_DEVICE_SPI
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]305 bool "SPI NOR flash"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]306 imply ENV_IS_IN_SPI_FLASH
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]307 imply SPL_DM_SPI
308 imply SPL_SPI_FLASH_SUPPORT
309 imply SPL_SPI_LOAD
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]310 imply SPL_SPI
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]311 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]312
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]313config MVEBU_SPL_BOOT_DEVICE_MMC
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]314 bool "SDIO/MMC card"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]315 imply ENV_IS_IN_MMC
316 # GPIO needed for eMMC/SD card presence detection
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]317 imply SPL_DM_GPIO
318 imply SPL_DM_MMC
319 imply SPL_GPIO
320 imply SPL_LIBDISK_SUPPORT
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]321 imply SPL_MMC
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]322 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]323
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]324config MVEBU_SPL_BOOT_DEVICE_SATA
325 bool "SATA"
Simon Glass081a45a2021-08-08 12:20:17 -0600[diff] [blame]326 imply SPL_SATA
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]327 imply SPL_LIBDISK_SUPPORT
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]328 select SPL_BOOTROM_SUPPORT
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]329
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]330config MVEBU_SPL_BOOT_DEVICE_UART
331 bool "UART"
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]332 select SPL_BOOTROM_SUPPORT
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]333
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]334endchoice
335
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]336config MVEBU_EFUSE
337 bool "Enable eFuse support"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]338 depends on HAVE_MVEBU_EFUSE
339 help
340 Enable support for reading and writing eFuses on mvebu SoCs.
341
342config MVEBU_EFUSE_FAKE
343 bool "Fake eFuse access (dry run)"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]344 depends on MVEBU_EFUSE
345 help
346 This enables a "dry run" mode where eFuses are not really programmed.
347 Instead the eFuse accesses are emulated by writing to and reading
348 from a memory block.
349 This is can be used for testing prog scripts.
350
Pali Rohár2662d2c2022-09-22 13:43:45 +0200[diff] [blame^]351config MVEBU_EFUSE_VHV_GPIO
352 string "VHV_Enable GPIO name for eFuse programming"
353 depends on MVEBU_EFUSE && !ARMADA_3700
354 help
355 The eFuse programing (burning) phase requires supplying 1.8V to the
356 device on the VHV power pin, while for normal operation the VHV power
357 rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
358 document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
359 .
360 This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
361
362config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
363 bool "VHV_Enable GPIO is Active Low"
364 depends on MVEBU_EFUSE_VHV_GPIO != ""
365
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]366config SECURED_MODE_IMAGE
367 bool "Build image for trusted boot"
368 default false
369 depends on 88F6820
370 help
371 Build an image that employs the ARMADA SoC's trusted boot framework
372 for securely booting images.
373
374config SECURED_MODE_CSK_INDEX
375 int "Index of active CSK"
376 default 0
377 depends on SECURED_MODE_IMAGE
378
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]379source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore838e49b2020-12-08 21:07:36 -0600[diff] [blame]380source "board/kobol/helios4/Kconfig"
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]381
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]382endif