Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 1 | if ARCH_MVEBU |
| 2 | |
Mario Six | 10d1449 | 2017-01-11 16:01:00 +0100 | [diff] [blame] | 3 | config HAVE_MVEBU_EFUSE |
| 4 | bool |
Mario Six | 10d1449 | 2017-01-11 16:01:00 +0100 | [diff] [blame] | 5 | |
Stefan Roese | 05b1765 | 2016-05-17 15:00:30 +0200 | [diff] [blame] | 6 | config ARMADA_32BIT |
| 7 | bool |
Michal Simek | 7e7ba3b | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 8 | select ARCH_MISC_INIT |
| 9 | select BOARD_EARLY_INIT_F |
Lokesh Vutla | 81b1a67 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 10 | select CPU_V7A |
Stefan Roese | 1f1b3e9 | 2019-04-11 08:58:32 +0200 | [diff] [blame] | 11 | select SPL_DM if SPL |
| 12 | select SPL_DM_SEQ_ALIAS if SPL |
| 13 | select SPL_OF_CONTROL if SPL |
Tom Rini | b7cc2fe | 2021-10-15 10:54:41 -0400 | [diff] [blame] | 14 | select SPL_SKIP_LOWLEVEL_INIT if SPL |
Stefan Roese | 1f1b3e9 | 2019-04-11 08:58:32 +0200 | [diff] [blame] | 15 | select SPL_SIMPLE_BUS if SPL |
Michal Simek | 7e7ba3b | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 16 | select SUPPORT_SPL |
Stefan Roese | 85bddff | 2019-04-12 16:42:28 +0200 | [diff] [blame] | 17 | select TRANSLATION_OFFSET |
Pali Rohár | c5c28df | 2022-04-06 16:20:20 +0200 | [diff] [blame^] | 18 | select SPL_SYS_NO_VECTOR_TABLE if SPL |
Stefan Roese | 05b1765 | 2016-05-17 15:00:30 +0200 | [diff] [blame] | 19 | |
| 20 | config ARMADA_64BIT |
| 21 | bool |
| 22 | select ARM64 |
| 23 | |
| 24 | # ARMv7 SoCs... |
Stefan Roese | 9106ed0 | 2016-01-29 09:14:54 +0100 | [diff] [blame] | 25 | config ARMADA_375 |
| 26 | bool |
Stefan Roese | 05b1765 | 2016-05-17 15:00:30 +0200 | [diff] [blame] | 27 | select ARMADA_32BIT |
Stefan Roese | 9106ed0 | 2016-01-29 09:14:54 +0100 | [diff] [blame] | 28 | |
Stefan Roese | eb083e5 | 2015-12-21 13:56:33 +0100 | [diff] [blame] | 29 | config ARMADA_38X |
| 30 | bool |
Stefan Roese | 05b1765 | 2016-05-17 15:00:30 +0200 | [diff] [blame] | 31 | select ARMADA_32BIT |
Mario Six | 10d1449 | 2017-01-11 16:01:00 +0100 | [diff] [blame] | 32 | select HAVE_MVEBU_EFUSE |
Stefan Roese | eb083e5 | 2015-12-21 13:56:33 +0100 | [diff] [blame] | 33 | |
Joshua Scott | 4ba8e99 | 2020-11-09 10:14:08 +1300 | [diff] [blame] | 34 | config ARMADA_38X_HS_IMPEDANCE_THRESH |
| 35 | hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)" |
| 36 | depends on ARMADA_38X |
| 37 | default 0x6 |
| 38 | range 0x0 0x7 |
| 39 | |
Stefan Roese | eb083e5 | 2015-12-21 13:56:33 +0100 | [diff] [blame] | 40 | config ARMADA_XP |
| 41 | bool |
Stefan Roese | 05b1765 | 2016-05-17 15:00:30 +0200 | [diff] [blame] | 42 | select ARMADA_32BIT |
| 43 | |
| 44 | # ARMv8 SoCs... |
| 45 | config ARMADA_3700 |
| 46 | bool |
| 47 | select ARM64 |
Pali Rohár | 70d9bee | 2022-02-23 14:15:45 +0100 | [diff] [blame] | 48 | select HAVE_MVEBU_EFUSE |
Stefan Roese | eb083e5 | 2015-12-21 13:56:33 +0100 | [diff] [blame] | 49 | |
Stefan Roese | cb41033 | 2016-05-25 08:13:45 +0200 | [diff] [blame] | 50 | # Armada 7K and 8K are very similar - use only one Kconfig symbol for both |
| 51 | config ARMADA_8K |
| 52 | bool |
| 53 | select ARM64 |
| 54 | |
Chris Packham | 1d49668 | 2016-10-26 14:08:30 +1300 | [diff] [blame] | 55 | # Armada PLL frequency (used for NAND clock generation) |
| 56 | config SYS_MVEBU_PLL_CLOCK |
| 57 | int |
Chris Packham | a8f845e | 2019-04-11 22:22:50 +1200 | [diff] [blame] | 58 | default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K || ARMADA_MSYS |
Chris Packham | 1d49668 | 2016-10-26 14:08:30 +1300 | [diff] [blame] | 59 | default "1000000000" if ARMADA_38X || ARMADA_375 |
| 60 | |
Stefan Roese | 05b1765 | 2016-05-17 15:00:30 +0200 | [diff] [blame] | 61 | # Armada XP/38x SoC types... |
Phil Sutter | a7f94ad | 2015-12-25 14:41:22 +0100 | [diff] [blame] | 62 | config MV78230 |
| 63 | bool |
| 64 | select ARMADA_XP |
| 65 | |
| 66 | config MV78260 |
| 67 | bool |
| 68 | select ARMADA_XP |
Simon Glass | 203b3ab | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 69 | imply CMD_SATA |
Phil Sutter | a7f94ad | 2015-12-25 14:41:22 +0100 | [diff] [blame] | 70 | |
| 71 | config MV78460 |
| 72 | bool |
| 73 | select ARMADA_XP |
| 74 | |
Chris Packham | a8f845e | 2019-04-11 22:22:50 +1200 | [diff] [blame] | 75 | config ARMADA_MSYS |
| 76 | bool |
| 77 | select ARMADA_32BIT |
| 78 | |
| 79 | config 98DX4251 |
| 80 | bool |
| 81 | select ARMADA_MSYS |
| 82 | |
| 83 | config 98DX3336 |
| 84 | bool |
| 85 | select ARMADA_MSYS |
| 86 | |
| 87 | config 98DX3236 |
| 88 | bool |
| 89 | select ARMADA_MSYS |
| 90 | |
Chris Packham | f5fc25b | 2016-09-22 12:56:13 +1200 | [diff] [blame] | 91 | config 88F6820 |
Phil Sutter | a7f94ad | 2015-12-25 14:41:22 +0100 | [diff] [blame] | 92 | bool |
| 93 | select ARMADA_38X |
| 94 | |
Tom Rini | 40a325f | 2022-03-30 18:07:24 -0400 | [diff] [blame] | 95 | config CUSTOMER_BOARD_SUPPORT |
| 96 | bool |
| 97 | |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 98 | choice |
Stefan Roese | cb41033 | 2016-05-25 08:13:45 +0200 | [diff] [blame] | 99 | prompt "Armada XP/375/38x/3700/7K/8K board select" |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 100 | optional |
| 101 | |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 102 | config TARGET_CLEARFOG |
| 103 | bool "Support ClearFog" |
Chris Packham | f5fc25b | 2016-09-22 12:56:13 +1200 | [diff] [blame] | 104 | select 88F6820 |
Baruch Siach | 1c5e95d | 2020-01-20 14:20:13 +0200 | [diff] [blame] | 105 | select BOARD_LATE_INIT |
Stefan Roese | 7360640 | 2015-10-20 15:14:47 +0200 | [diff] [blame] | 106 | |
Dennis Gilmore | 77c3940 | 2018-06-11 19:39:53 -0500 | [diff] [blame] | 107 | config TARGET_HELIOS4 |
| 108 | bool "Support Helios4" |
| 109 | select 88F6820 |
| 110 | |
Konstantin Porotchkin | 7f8dfea | 2017-02-16 13:52:22 +0200 | [diff] [blame] | 111 | config TARGET_MVEBU_ARMADA_37XX |
| 112 | bool "Support Armada 37xx platforms" |
Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 113 | select ARMADA_3700 |
Simon Glass | 0e5faf0 | 2017-06-14 21:28:21 -0600 | [diff] [blame] | 114 | imply SCSI |
Stefan Roese | 6edf27e | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 115 | |
Stefan Roese | 9106ed0 | 2016-01-29 09:14:54 +0100 | [diff] [blame] | 116 | config TARGET_DB_88F6720 |
| 117 | bool "Support DB-88F6720 Armada 375" |
| 118 | select ARMADA_375 |
| 119 | |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 120 | config TARGET_DB_88F6820_GP |
| 121 | bool "Support DB-88F6820-GP" |
Chris Packham | f5fc25b | 2016-09-22 12:56:13 +1200 | [diff] [blame] | 122 | select 88F6820 |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 123 | |
Chris Packham | a90dd4c | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 124 | config TARGET_DB_88F6820_AMC |
| 125 | bool "Support DB-88F6820-AMC" |
| 126 | select 88F6820 |
| 127 | |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 128 | config TARGET_TURRIS_OMNIA |
| 129 | bool "Support Turris Omnia" |
| 130 | select 88F6820 |
Marek Behún | 0f2e66a | 2019-05-02 16:53:37 +0200 | [diff] [blame] | 131 | select BOARD_LATE_INIT |
Marek Behún | 1e4cbb9 | 2019-05-02 16:53:28 +0200 | [diff] [blame] | 132 | select DM_I2C |
| 133 | select I2C_MUX |
| 134 | select I2C_MUX_PCA954x |
Marek Behún | 4c3abea | 2021-10-09 19:33:46 +0200 | [diff] [blame] | 135 | select SPL_DRIVERS_MISC |
Marek Behún | 1e4cbb9 | 2019-05-02 16:53:28 +0200 | [diff] [blame] | 136 | select SPL_I2C_MUX |
Marek Behún | ca6095b | 2021-10-09 19:33:45 +0200 | [diff] [blame] | 137 | select SPL_SYS_MALLOC_SIMPLE |
Marek Behún | 1e4cbb9 | 2019-05-02 16:53:28 +0200 | [diff] [blame] | 138 | select SYS_I2C_MVTWSI |
Marek Behún | 5e92efe | 2019-05-02 16:53:32 +0200 | [diff] [blame] | 139 | select ATSHA204A |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 140 | |
Marek Behún | f835bed | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 141 | config TARGET_TURRIS_MOX |
| 142 | bool "Support Turris Mox" |
| 143 | select ARMADA_3700 |
| 144 | |
Stefan Roese | 5c806f1 | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 145 | config TARGET_MVEBU_ARMADA_8K |
| 146 | bool "Support Armada 7k/8k platforms" |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 147 | select ARMADA_8K |
Tom Rini | 22d567e | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 148 | select BOARD_LATE_INIT |
Simon Glass | 0e5faf0 | 2017-06-14 21:28:21 -0600 | [diff] [blame] | 149 | imply SCSI |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 150 | |
Konstantin Porotchkin | 1d6ff1f | 2021-03-16 17:20:57 +0100 | [diff] [blame] | 151 | config TARGET_OCTEONTX2_CN913x |
| 152 | bool "Support CN913x platforms" |
| 153 | select ARMADA_8K |
| 154 | imply BOARD_EARLY_INIT_R |
| 155 | select BOARD_LATE_INIT |
| 156 | imply SCSI |
| 157 | |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 158 | config TARGET_DB_MV784MP_GP |
| 159 | bool "Support db-mv784mp-gp" |
Tom Rini | 9a04d7d | 2022-02-25 11:19:46 -0500 | [diff] [blame] | 160 | select BOARD_ECC_SUPPORT |
Phil Sutter | a7f94ad | 2015-12-25 14:41:22 +0100 | [diff] [blame] | 161 | select MV78460 |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 162 | |
Phil Sutter | d76eba6 | 2015-12-25 14:41:25 +0100 | [diff] [blame] | 163 | config TARGET_DS414 |
| 164 | bool "Support Synology DS414" |
| 165 | select MV78230 |
| 166 | |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 167 | config TARGET_MAXBCM |
| 168 | bool "Support maxbcm" |
Tom Rini | 9a04d7d | 2022-02-25 11:19:46 -0500 | [diff] [blame] | 169 | select BOARD_ECC_SUPPORT |
Phil Sutter | a7f94ad | 2015-12-25 14:41:22 +0100 | [diff] [blame] | 170 | select MV78460 |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 171 | |
Stefan Roese | 459e064 | 2016-01-20 08:13:29 +0100 | [diff] [blame] | 172 | config TARGET_THEADORABLE |
| 173 | bool "Support theadorable Armada XP" |
Tom Rini | 22d567e | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 174 | select BOARD_LATE_INIT if USB |
Stefan Roese | 459e064 | 2016-01-20 08:13:29 +0100 | [diff] [blame] | 175 | select MV78260 |
Simon Glass | 203b3ab | 2017-06-14 21:28:24 -0600 | [diff] [blame] | 176 | imply CMD_SATA |
Stefan Roese | 459e064 | 2016-01-20 08:13:29 +0100 | [diff] [blame] | 177 | |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 178 | config TARGET_CONTROLCENTERDC |
| 179 | bool "Support CONTROLCENTERDC" |
| 180 | select 88F6820 |
Tom Rini | 40a325f | 2022-03-30 18:07:24 -0400 | [diff] [blame] | 181 | select CUSTOMER_BOARD_SUPPORT |
Dirk Eibach | fb60594 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 182 | |
Chris Packham | b55b2c9 | 2019-01-10 21:01:00 +1300 | [diff] [blame] | 183 | config TARGET_X530 |
| 184 | bool "Support Allied Telesis x530" |
| 185 | select 88F6820 |
| 186 | |
Chris Packham | 199e318 | 2019-04-11 22:22:53 +1200 | [diff] [blame] | 187 | config TARGET_DB_XC3_24G4XG |
| 188 | bool "Support DB-XC3-24G4XG" |
| 189 | select 98DX3336 |
| 190 | |
Luka Kovacic | 25acb8b | 2020-05-26 20:17:50 +0200 | [diff] [blame] | 191 | config TARGET_CRS3XX_98DX3236 |
| 192 | bool "Support CRS3XX-98DX3236" |
Luka Kovacic | b686e22 | 2019-05-07 19:35:55 +0200 | [diff] [blame] | 193 | select 98DX3236 |
| 194 | |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 195 | endchoice |
| 196 | |
Tom Rini | 5918039 | 2021-08-21 13:50:13 -0400 | [diff] [blame] | 197 | choice |
| 198 | prompt "DDR bus width" |
| 199 | default DDR_64BIT |
| 200 | depends on ARMADA_XP |
| 201 | |
| 202 | config DDR_64BIT |
| 203 | bool "64bit bus width" |
| 204 | |
| 205 | config DDR_32BIT |
| 206 | bool "32bit bus width" |
| 207 | |
| 208 | endchoice |
| 209 | |
Tom Rini | 592bcd0 | 2021-08-21 13:50:15 -0400 | [diff] [blame] | 210 | config DDR_LOG_LEVEL |
| 211 | int "DDR training code log level" |
| 212 | depends on ARMADA_XP |
| 213 | default 0 |
| 214 | range 0 3 |
| 215 | help |
| 216 | Amount of information provided on error while running the DDR |
| 217 | training code. At level 0, provides an error code in a case of |
| 218 | failure, RL, WL errors and other algorithm failure. At level 1, |
| 219 | provides the D-Unit setup (SPD/Static configuration). At level 2, |
| 220 | provides the windows margin as a results of DQS centeralization. |
| 221 | At level 3, rovides the windows margin of each DQ as a results of |
| 222 | DQS centeralization. |
| 223 | |
Marek Behún | 90555af | 2022-02-17 13:54:42 +0100 | [diff] [blame] | 224 | config DDR_RESET_ON_TRAINING_FAILURE |
| 225 | bool "Reset the board on DDR training failure instead of hanging" |
| 226 | depends on ARMADA_38X || ARMADA_XP |
| 227 | help |
| 228 | If DDR training fails in SPL, reset the board instead of hanging. |
| 229 | Some boards are known to fail DDR training occasionally and an |
| 230 | immediate reset may be preferable to waiting until the board is |
| 231 | reset by watchdog (if there even is one). |
| 232 | |
| 233 | Note that if booting via UART and the DDR training fails, the |
| 234 | device will still hang - it doesn't make sense to reset the board |
| 235 | in such a case. |
| 236 | |
Tom Rini | 9a04d7d | 2022-02-25 11:19:46 -0500 | [diff] [blame] | 237 | config BOARD_ECC_SUPPORT |
| 238 | bool |
| 239 | |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 240 | config SYS_BOARD |
| 241 | default "clearfog" if TARGET_CLEARFOG |
Dennis Gilmore | 77c3940 | 2018-06-11 19:39:53 -0500 | [diff] [blame] | 242 | default "helios4" if TARGET_HELIOS4 |
Konstantin Porotchkin | 7f8dfea | 2017-02-16 13:52:22 +0200 | [diff] [blame] | 243 | default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX |
Stefan Roese | 9106ed0 | 2016-01-29 09:14:54 +0100 | [diff] [blame] | 244 | default "db-88f6720" if TARGET_DB_88F6720 |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 245 | default "db-88f6820-gp" if TARGET_DB_88F6820_GP |
Chris Packham | a90dd4c | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 246 | default "db-88f6820-amc" if TARGET_DB_88F6820_AMC |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 247 | default "turris_omnia" if TARGET_TURRIS_OMNIA |
Marek Behún | f835bed | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 248 | default "turris_mox" if TARGET_TURRIS_MOX |
Stefan Roese | 5c806f1 | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 249 | default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K |
Konstantin Porotchkin | 1d6ff1f | 2021-03-16 17:20:57 +0100 | [diff] [blame] | 250 | default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 251 | default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP |
Phil Sutter | d76eba6 | 2015-12-25 14:41:25 +0100 | [diff] [blame] | 252 | default "ds414" if TARGET_DS414 |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 253 | default "maxbcm" if TARGET_MAXBCM |
Stefan Roese | 459e064 | 2016-01-20 08:13:29 +0100 | [diff] [blame] | 254 | default "theadorable" if TARGET_THEADORABLE |
Baruch Siach | daa6f08 | 2018-06-18 21:56:23 +0300 | [diff] [blame] | 255 | default "a38x" if TARGET_CONTROLCENTERDC |
Chris Packham | b55b2c9 | 2019-01-10 21:01:00 +1300 | [diff] [blame] | 256 | default "x530" if TARGET_X530 |
Chris Packham | 199e318 | 2019-04-11 22:22:53 +1200 | [diff] [blame] | 257 | default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG |
Luka Kovacic | 25acb8b | 2020-05-26 20:17:50 +0200 | [diff] [blame] | 258 | default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236 |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 259 | |
| 260 | config SYS_CONFIG_NAME |
| 261 | default "clearfog" if TARGET_CLEARFOG |
Dennis Gilmore | 77c3940 | 2018-06-11 19:39:53 -0500 | [diff] [blame] | 262 | default "helios4" if TARGET_HELIOS4 |
Konstantin Porotchkin | 7f8dfea | 2017-02-16 13:52:22 +0200 | [diff] [blame] | 263 | default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX |
Stefan Roese | 9106ed0 | 2016-01-29 09:14:54 +0100 | [diff] [blame] | 264 | default "db-88f6720" if TARGET_DB_88F6720 |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 265 | default "db-88f6820-gp" if TARGET_DB_88F6820_GP |
Chris Packham | a90dd4c | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 266 | default "db-88f6820-amc" if TARGET_DB_88F6820_AMC |
Stefan Roese | 5c806f1 | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 267 | default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K |
Konstantin Porotchkin | 1d6ff1f | 2021-03-16 17:20:57 +0100 | [diff] [blame] | 268 | default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 269 | default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP |
Phil Sutter | d76eba6 | 2015-12-25 14:41:25 +0100 | [diff] [blame] | 270 | default "ds414" if TARGET_DS414 |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 271 | default "maxbcm" if TARGET_MAXBCM |
Stefan Roese | 459e064 | 2016-01-20 08:13:29 +0100 | [diff] [blame] | 272 | default "theadorable" if TARGET_THEADORABLE |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 273 | default "turris_omnia" if TARGET_TURRIS_OMNIA |
Marek Behún | f835bed | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 274 | default "turris_mox" if TARGET_TURRIS_MOX |
Baruch Siach | daa6f08 | 2018-06-18 21:56:23 +0300 | [diff] [blame] | 275 | default "controlcenterdc" if TARGET_CONTROLCENTERDC |
Chris Packham | b55b2c9 | 2019-01-10 21:01:00 +1300 | [diff] [blame] | 276 | default "x530" if TARGET_X530 |
Chris Packham | 199e318 | 2019-04-11 22:22:53 +1200 | [diff] [blame] | 277 | default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG |
Luka Kovacic | 25acb8b | 2020-05-26 20:17:50 +0200 | [diff] [blame] | 278 | default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236 |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 279 | |
| 280 | config SYS_VENDOR |
| 281 | default "Marvell" if TARGET_DB_MV784MP_GP |
Konstantin Porotchkin | 7f8dfea | 2017-02-16 13:52:22 +0200 | [diff] [blame] | 282 | default "Marvell" if TARGET_MVEBU_ARMADA_37XX |
Stefan Roese | 9106ed0 | 2016-01-29 09:14:54 +0100 | [diff] [blame] | 283 | default "Marvell" if TARGET_DB_88F6720 |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 284 | default "Marvell" if TARGET_DB_88F6820_GP |
Chris Packham | a90dd4c | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 285 | default "Marvell" if TARGET_DB_88F6820_AMC |
Stefan Roese | 5c806f1 | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 286 | default "Marvell" if TARGET_MVEBU_ARMADA_8K |
Konstantin Porotchkin | 1d6ff1f | 2021-03-16 17:20:57 +0100 | [diff] [blame] | 287 | default "Marvell" if TARGET_OCTEONTX2_CN913x |
Chris Packham | 199e318 | 2019-04-11 22:22:53 +1200 | [diff] [blame] | 288 | default "Marvell" if TARGET_DB_XC3_24G4XG |
| 289 | default "Marvell" if TARGET_MVEBU_DB_88F7040 |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 290 | default "solidrun" if TARGET_CLEARFOG |
Dennis Gilmore | 77c3940 | 2018-06-11 19:39:53 -0500 | [diff] [blame] | 291 | default "kobol" if TARGET_HELIOS4 |
Phil Sutter | d76eba6 | 2015-12-25 14:41:25 +0100 | [diff] [blame] | 292 | default "Synology" if TARGET_DS414 |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 293 | default "CZ.NIC" if TARGET_TURRIS_OMNIA |
Marek Behún | f835bed | 2018-04-24 17:21:31 +0200 | [diff] [blame] | 294 | default "CZ.NIC" if TARGET_TURRIS_MOX |
Baruch Siach | daa6f08 | 2018-06-18 21:56:23 +0300 | [diff] [blame] | 295 | default "gdsys" if TARGET_CONTROLCENTERDC |
Chris Packham | b55b2c9 | 2019-01-10 21:01:00 +1300 | [diff] [blame] | 296 | default "alliedtelesis" if TARGET_X530 |
Luka Kovacic | 25acb8b | 2020-05-26 20:17:50 +0200 | [diff] [blame] | 297 | default "mikrotik" if TARGET_CRS3XX_98DX3236 |
Stefan Roese | b9f41bf | 2015-12-21 13:40:37 +0100 | [diff] [blame] | 298 | |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 299 | config SYS_SOC |
| 300 | default "mvebu" |
| 301 | |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 302 | choice |
Baruch Siach | 8d196a4 | 2018-06-18 21:56:24 +0300 | [diff] [blame] | 303 | prompt "Boot method" |
Joel Johnson | a2018ab | 2020-04-17 01:19:05 -0600 | [diff] [blame] | 304 | depends on SPL |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 305 | |
Baruch Siach | 8d196a4 | 2018-06-18 21:56:24 +0300 | [diff] [blame] | 306 | config MVEBU_SPL_BOOT_DEVICE_SPI |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 307 | bool "SPI NOR flash" |
Joel Johnson | a2018ab | 2020-04-17 01:19:05 -0600 | [diff] [blame] | 308 | imply ENV_IS_IN_SPI_FLASH |
Pali Rohár | cf97b82 | 2021-07-23 11:14:29 +0200 | [diff] [blame] | 309 | imply SPL_DM_SPI |
| 310 | imply SPL_SPI_FLASH_SUPPORT |
| 311 | imply SPL_SPI_LOAD |
Simon Glass | a582047 | 2021-08-08 12:20:14 -0600 | [diff] [blame] | 312 | imply SPL_SPI |
Pali Rohár | a3a38e5 | 2021-07-23 11:14:25 +0200 | [diff] [blame] | 313 | select SPL_BOOTROM_SUPPORT |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 314 | |
Baruch Siach | 8d196a4 | 2018-06-18 21:56:24 +0300 | [diff] [blame] | 315 | config MVEBU_SPL_BOOT_DEVICE_MMC |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 316 | bool "SDIO/MMC card" |
Joel Johnson | a2018ab | 2020-04-17 01:19:05 -0600 | [diff] [blame] | 317 | imply ENV_IS_IN_MMC |
| 318 | # GPIO needed for eMMC/SD card presence detection |
Pali Rohár | cf97b82 | 2021-07-23 11:14:29 +0200 | [diff] [blame] | 319 | imply SPL_DM_GPIO |
| 320 | imply SPL_DM_MMC |
| 321 | imply SPL_GPIO |
| 322 | imply SPL_LIBDISK_SUPPORT |
Simon Glass | b58bfe0 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 323 | imply SPL_MMC |
Pali Rohár | a3a38e5 | 2021-07-23 11:14:25 +0200 | [diff] [blame] | 324 | select SPL_BOOTROM_SUPPORT |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 325 | |
Baruch Siach | b936a27 | 2019-05-16 13:03:58 +0300 | [diff] [blame] | 326 | config MVEBU_SPL_BOOT_DEVICE_SATA |
| 327 | bool "SATA" |
Simon Glass | 081a45a | 2021-08-08 12:20:17 -0600 | [diff] [blame] | 328 | imply SPL_SATA |
Pali Rohár | cf97b82 | 2021-07-23 11:14:29 +0200 | [diff] [blame] | 329 | imply SPL_LIBDISK_SUPPORT |
Pali Rohár | a3a38e5 | 2021-07-23 11:14:25 +0200 | [diff] [blame] | 330 | select SPL_BOOTROM_SUPPORT |
Baruch Siach | b936a27 | 2019-05-16 13:03:58 +0300 | [diff] [blame] | 331 | |
Baruch Siach | b35c447 | 2018-06-18 21:56:26 +0300 | [diff] [blame] | 332 | config MVEBU_SPL_BOOT_DEVICE_UART |
| 333 | bool "UART" |
Pali Rohár | a3a38e5 | 2021-07-23 11:14:25 +0200 | [diff] [blame] | 334 | select SPL_BOOTROM_SUPPORT |
Baruch Siach | b35c447 | 2018-06-18 21:56:26 +0300 | [diff] [blame] | 335 | |
Marek Behún | 09e16b8 | 2017-06-09 19:28:45 +0200 | [diff] [blame] | 336 | endchoice |
| 337 | |
Mario Six | 10d1449 | 2017-01-11 16:01:00 +0100 | [diff] [blame] | 338 | config MVEBU_EFUSE |
| 339 | bool "Enable eFuse support" |
Mario Six | 10d1449 | 2017-01-11 16:01:00 +0100 | [diff] [blame] | 340 | depends on HAVE_MVEBU_EFUSE |
| 341 | help |
| 342 | Enable support for reading and writing eFuses on mvebu SoCs. |
| 343 | |
| 344 | config MVEBU_EFUSE_FAKE |
| 345 | bool "Fake eFuse access (dry run)" |
Mario Six | 10d1449 | 2017-01-11 16:01:00 +0100 | [diff] [blame] | 346 | depends on MVEBU_EFUSE |
| 347 | help |
| 348 | This enables a "dry run" mode where eFuses are not really programmed. |
| 349 | Instead the eFuse accesses are emulated by writing to and reading |
| 350 | from a memory block. |
| 351 | This is can be used for testing prog scripts. |
| 352 | |
| 353 | config SECURED_MODE_IMAGE |
| 354 | bool "Build image for trusted boot" |
| 355 | default false |
| 356 | depends on 88F6820 |
| 357 | help |
| 358 | Build an image that employs the ARMADA SoC's trusted boot framework |
| 359 | for securely booting images. |
| 360 | |
| 361 | config SECURED_MODE_CSK_INDEX |
| 362 | int "Index of active CSK" |
| 363 | default 0 |
| 364 | depends on SECURED_MODE_IMAGE |
| 365 | |
Joel Johnson | 28bf4ca | 2020-03-23 14:21:32 -0600 | [diff] [blame] | 366 | source "board/solidrun/clearfog/Kconfig" |
Dennis Gilmore | 838e49b | 2020-12-08 21:07:36 -0600 | [diff] [blame] | 367 | source "board/kobol/helios4/Kconfig" |
Joel Johnson | 28bf4ca | 2020-03-23 14:21:32 -0600 | [diff] [blame] | 368 | |
Stefan Roese | 383e0c1 | 2015-08-25 13:18:38 +0200 | [diff] [blame] | 369 | endif |