Blame - arch/arm/mach-mvebu/Kconfig - filogic/uboot

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Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	1	if ARCH_MVEBU
				2
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	3	config HAVE_MVEBU_EFUSE
				4	bool
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	5
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	6	config ARMADA_32BIT
				7	bool
Michal Simek	7e7ba3b	2018-07-23 15:55:15 +0200	[diff] [blame]	8	select BOARD_EARLY_INIT_F
Lokesh Vutla	81b1a67	2018-04-26 18:21:26 +0530	[diff] [blame]	9	select CPU_V7A
Stefan Roese	1f1b3e9	2019-04-11 08:58:32 +0200	[diff] [blame]	10	select SPL_DM if SPL
				11	select SPL_DM_SEQ_ALIAS if SPL
				12	select SPL_OF_CONTROL if SPL
Tom Rini	b7cc2fe	2021-10-15 10:54:41 -0400	[diff] [blame]	13	select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese	1f1b3e9	2019-04-11 08:58:32 +0200	[diff] [blame]	14	select SPL_SIMPLE_BUS if SPL
Michal Simek	7e7ba3b	2018-07-23 15:55:15 +0200	[diff] [blame]	15	select SUPPORT_SPL
Philip Oberfichtner	5833e1b	2022-08-17 15:07:12 +0200	[diff] [blame]	16	select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese	85bddff	2019-04-12 16:42:28 +0200	[diff] [blame]	17	select TRANSLATION_OFFSET
Alexander Dahl	3f3c838	2023-12-21 08:26:10 +0100	[diff] [blame]	18	select TOOLS_KWBIMAGE if SPL
Pali Rohár	c5c28df	2022-04-06 16:20:20 +0200	[diff] [blame]	19	select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Rohár	aaed328	2022-05-06 11:05:14 +0200	[diff] [blame]	20	select ARCH_VERY_EARLY_INIT
Marek Behún	32a932a	2024-04-04 09:50:59 +0200	[diff] [blame^]	21	select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	22
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	23	# ARMv7 SoCs...
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	24	config ARMADA_375
				25	bool
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	26	select ARMADA_32BIT
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	27
Stefan Roese	eb083e5	2015-12-21 13:56:33 +0100	[diff] [blame]	28	config ARMADA_38X
				29	bool
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	30	select ARMADA_32BIT
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	31	select HAVE_MVEBU_EFUSE
Stefan Roese	eb083e5	2015-12-21 13:56:33 +0100	[diff] [blame]	32
Joshua Scott	4ba8e99	2020-11-09 10:14:08 +1300	[diff] [blame]	33	config ARMADA_38X_HS_IMPEDANCE_THRESH
				34	hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
				35	depends on ARMADA_38X
				36	default 0x6
				37	range 0x0 0x7
				38
Stefan Roese	eb083e5	2015-12-21 13:56:33 +0100	[diff] [blame]	39	config ARMADA_XP
				40	bool
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	41	select ARMADA_32BIT
				42
				43	# ARMv8 SoCs...
				44	config ARMADA_3700
				45	bool
				46	select ARM64
Pali Rohár	70d9bee	2022-02-23 14:15:45 +0100	[diff] [blame]	47	select HAVE_MVEBU_EFUSE
Stefan Roese	eb083e5	2015-12-21 13:56:33 +0100	[diff] [blame]	48
Stefan Roese	cb41033	2016-05-25 08:13:45 +0200	[diff] [blame]	49	# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
				50	config ARMADA_8K
				51	bool
				52	select ARM64
				53
Chris Packham	eaab461	2022-11-05 17:23:59 +1300	[diff] [blame]	54	config ALLEYCAT_5
				55	bool
				56	select ARM64
				57
Chris Packham	1d49668	2016-10-26 14:08:30 +1300	[diff] [blame]	58	# Armada PLL frequency (used for NAND clock generation)
				59	config SYS_MVEBU_PLL_CLOCK
				60	int
Chris Packham	a8f845e	2019-04-11 22:22:50 +1200	[diff] [blame]	61	default "2000000000" if ARMADA_XP \|\| ARMADA_3700 \|\| ARMADA_8K \|\| ARMADA_MSYS
Chris Packham	1d49668	2016-10-26 14:08:30 +1300	[diff] [blame]	62	default "1000000000" if ARMADA_38X \|\| ARMADA_375
				63
Stefan Roese	05b1765	2016-05-17 15:00:30 +0200	[diff] [blame]	64	# Armada XP/38x SoC types...
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	65	config MV78230
				66	bool
				67	select ARMADA_XP
				68
				69	config MV78260
				70	bool
				71	select ARMADA_XP
Simon Glass	203b3ab	2017-06-14 21:28:24 -0600	[diff] [blame]	72	imply CMD_SATA
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	73
				74	config MV78460
				75	bool
				76	select ARMADA_XP
				77
Chris Packham	a8f845e	2019-04-11 22:22:50 +1200	[diff] [blame]	78	config ARMADA_MSYS
				79	bool
				80	select ARMADA_32BIT
				81
				82	config 98DX4251
				83	bool
				84	select ARMADA_MSYS
				85
				86	config 98DX3336
				87	bool
				88	select ARMADA_MSYS
				89
				90	config 98DX3236
				91	bool
				92	select ARMADA_MSYS
				93
Chris Packham	f5fc25b	2016-09-22 12:56:13 +1200	[diff] [blame]	94	config 88F6820
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	95	bool
				96	select ARMADA_38X
				97
Tom Rini	40a325f	2022-03-30 18:07:24 -0400	[diff] [blame]	98	config CUSTOMER_BOARD_SUPPORT
				99	bool
				100
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	101	config DDR4
				102	bool "Support Marvell DDR4 Training driver"
				103
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	104	choice
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	105	prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	106	optional
				107
Stefan Roese	7360640	2015-10-20 15:14:47 +0200	[diff] [blame]	108	config TARGET_CLEARFOG
				109	bool "Support ClearFog"
Chris Packham	f5fc25b	2016-09-22 12:56:13 +1200	[diff] [blame]	110	select 88F6820
Baruch Siach	1c5e95d	2020-01-20 14:20:13 +0200	[diff] [blame]	111	select BOARD_LATE_INIT
Martin Rowe	7eceb67	2023-03-27 21:24:09 +1000	[diff] [blame]	112	select OF_BOARD_SETUP
Stefan Roese	7360640	2015-10-20 15:14:47 +0200	[diff] [blame]	113
Dennis Gilmore	77c3940	2018-06-11 19:39:53 -0500	[diff] [blame]	114	config TARGET_HELIOS4
				115	bool "Support Helios4"
				116	select 88F6820
				117
Konstantin Porotchkin	7f8dfea	2017-02-16 13:52:22 +0200	[diff] [blame]	118	config TARGET_MVEBU_ARMADA_37XX
				119	bool "Support Armada 37xx platforms"
Stefan Roese	6edf27e	2016-05-17 15:04:16 +0200	[diff] [blame]	120	select ARMADA_3700
Simon Glass	0e5faf0	2017-06-14 21:28:21 -0600	[diff] [blame]	121	imply SCSI
Stefan Roese	6edf27e	2016-05-17 15:04:16 +0200	[diff] [blame]	122
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	123	config TARGET_DB_88F6720
				124	bool "Support DB-88F6720 Armada 375"
				125	select ARMADA_375
				126
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	127	config TARGET_DB_88F6820_GP
				128	bool "Support DB-88F6820-GP"
Chris Packham	f5fc25b	2016-09-22 12:56:13 +1200	[diff] [blame]	129	select 88F6820
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	130
Chris Packham	a90dd4c	2016-09-22 12:56:14 +1200	[diff] [blame]	131	config TARGET_DB_88F6820_AMC
				132	bool "Support DB-88F6820-AMC"
				133	select 88F6820
				134
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	135	config TARGET_TURRIS_OMNIA
				136	bool "Support Turris Omnia"
				137	select 88F6820
Marek Behún	0f2e66a	2019-05-02 16:53:37 +0200	[diff] [blame]	138	select BOARD_LATE_INIT
Marek Behún	1e4cbb9	2019-05-02 16:53:28 +0200	[diff] [blame]	139	select DM_I2C
				140	select I2C_MUX
				141	select I2C_MUX_PCA954x
Marek Behún	4c3abea	2021-10-09 19:33:46 +0200	[diff] [blame]	142	select SPL_DRIVERS_MISC
Marek Behún	1e4cbb9	2019-05-02 16:53:28 +0200	[diff] [blame]	143	select SPL_I2C_MUX
Marek Behún	ca6095b	2021-10-09 19:33:45 +0200	[diff] [blame]	144	select SPL_SYS_MALLOC_SIMPLE
Marek Behún	1e4cbb9	2019-05-02 16:53:28 +0200	[diff] [blame]	145	select SYS_I2C_MVTWSI
Marek Behún	5e92efe	2019-05-02 16:53:32 +0200	[diff] [blame]	146	select ATSHA204A
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	147
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	148	config TARGET_TURRIS_MOX
Marek Behún	1b01011	2023-10-20 16:29:16 +0200	[diff] [blame]	149	bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe"
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	150	select ARMADA_3700
Marek Behún	1b01011	2023-10-20 16:29:16 +0200	[diff] [blame]	151	select BOARD_TYPES
				152	select ENV_IS_IN_MMC
				153	select ENV_IS_IN_SPI_FLASH
				154	select MULTI_DTB_FIT
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	155
Stefan Roese	5c806f1	2016-10-25 10:56:19 +0200	[diff] [blame]	156	config TARGET_MVEBU_ARMADA_8K
				157	bool "Support Armada 7k/8k platforms"
Stefan Roese	7be1b9b	2016-05-25 08:21:21 +0200	[diff] [blame]	158	select ARMADA_8K
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	159	select BOARD_LATE_INIT
Simon Glass	0e5faf0	2017-06-14 21:28:21 -0600	[diff] [blame]	160	imply SCSI
Stefan Roese	7be1b9b	2016-05-25 08:21:21 +0200	[diff] [blame]	161
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	162	config TARGET_MVEBU_ALLEYCAT5
				163	bool "Support AlleyCat 5 platforms"
				164	select ALLEYCAT_5
				165
Konstantin Porotchkin	1d6ff1f	2021-03-16 17:20:57 +0100	[diff] [blame]	166	config TARGET_OCTEONTX2_CN913x
				167	bool "Support CN913x platforms"
				168	select ARMADA_8K
				169	imply BOARD_EARLY_INIT_R
				170	select BOARD_LATE_INIT
				171	imply SCSI
				172
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	173	config TARGET_DB_MV784MP_GP
				174	bool "Support db-mv784mp-gp"
Tom Rini	9a04d7d	2022-02-25 11:19:46 -0500	[diff] [blame]	175	select BOARD_ECC_SUPPORT
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	176	select MV78460
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	177
Tony Dinh	6aebc1a	2023-02-09 14:00:03 -0800	[diff] [blame]	178	config TARGET_DS116
				179	bool "Support Synology DS116"
				180	select 88F6820
				181
Phil Sutter	d76eba6	2015-12-25 14:41:25 +0100	[diff] [blame]	182	config TARGET_DS414
				183	bool "Support Synology DS414"
				184	select MV78230
				185
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	186	config TARGET_MAXBCM
				187	bool "Support maxbcm"
Tom Rini	9a04d7d	2022-02-25 11:19:46 -0500	[diff] [blame]	188	select BOARD_ECC_SUPPORT
Phil Sutter	a7f94ad	2015-12-25 14:41:22 +0100	[diff] [blame]	189	select MV78460
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	190
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	191	config TARGET_N2350
				192	bool "Support Thecus N2350"
				193	select 88F6820
				194	select DDR4
				195
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	196	config TARGET_THEADORABLE
				197	bool "Support theadorable Armada XP"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	198	select BOARD_LATE_INIT if USB
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	199	select MV78260
Simon Glass	203b3ab	2017-06-14 21:28:24 -0600	[diff] [blame]	200	imply CMD_SATA
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	201
Dirk Eibach	fb60594	2017-02-22 16:07:23 +0100	[diff] [blame]	202	config TARGET_CONTROLCENTERDC
				203	bool "Support CONTROLCENTERDC"
				204	select 88F6820
Tom Rini	40a325f	2022-03-30 18:07:24 -0400	[diff] [blame]	205	select CUSTOMER_BOARD_SUPPORT
Dirk Eibach	fb60594	2017-02-22 16:07:23 +0100	[diff] [blame]	206
Chris Packham	b55b2c9	2019-01-10 21:01:00 +1300	[diff] [blame]	207	config TARGET_X530
				208	bool "Support Allied Telesis x530"
				209	select 88F6820
				210
Chris Packham	7325f1f	2023-07-10 10:47:36 +1200	[diff] [blame]	211	config TARGET_X240
				212	bool "Support Allied Telesis x240"
				213	select ALLEYCAT_5
				214
Chris Packham	199e318	2019-04-11 22:22:53 +1200	[diff] [blame]	215	config TARGET_DB_XC3_24G4XG
				216	bool "Support DB-XC3-24G4XG"
				217	select 98DX3336
				218
Luka Kovacic	25acb8b	2020-05-26 20:17:50 +0200	[diff] [blame]	219	config TARGET_CRS3XX_98DX3236
				220	bool "Support CRS3XX-98DX3236"
Luka Kovacic	b686e22	2019-05-07 19:35:55 +0200	[diff] [blame]	221	select 98DX3236
				222
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	223	endchoice
				224
Tom Rini	5918039	2021-08-21 13:50:13 -0400	[diff] [blame]	225	choice
				226	prompt "DDR bus width"
				227	default DDR_64BIT
				228	depends on ARMADA_XP
				229
				230	config DDR_64BIT
				231	bool "64bit bus width"
				232
				233	config DDR_32BIT
				234	bool "32bit bus width"
				235
				236	endchoice
				237
Tom Rini	592bcd0	2021-08-21 13:50:15 -0400	[diff] [blame]	238	config DDR_LOG_LEVEL
				239	int "DDR training code log level"
				240	depends on ARMADA_XP
				241	default 0
				242	range 0 3
				243	help
				244	Amount of information provided on error while running the DDR
				245	training code. At level 0, provides an error code in a case of
				246	failure, RL, WL errors and other algorithm failure. At level 1,
				247	provides the D-Unit setup (SPD/Static configuration). At level 2,
				248	provides the windows margin as a results of DQS centeralization.
				249	At level 3, rovides the windows margin of each DQ as a results of
				250	DQS centeralization.
				251
Marek Behún	90555af	2022-02-17 13:54:42 +0100	[diff] [blame]	252	config DDR_RESET_ON_TRAINING_FAILURE
				253	bool "Reset the board on DDR training failure instead of hanging"
				254	depends on ARMADA_38X \|\| ARMADA_XP
				255	help
				256	If DDR training fails in SPL, reset the board instead of hanging.
				257	Some boards are known to fail DDR training occasionally and an
				258	immediate reset may be preferable to waiting until the board is
				259	reset by watchdog (if there even is one).
				260
				261	Note that if booting via UART and the DDR training fails, the
				262	device will still hang - it doesn't make sense to reset the board
				263	in such a case.
				264
Tom Rini	9a04d7d	2022-02-25 11:19:46 -0500	[diff] [blame]	265	config BOARD_ECC_SUPPORT
				266	bool
				267
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	268	config SYS_BOARD
				269	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	77c3940	2018-06-11 19:39:53 -0500	[diff] [blame]	270	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	7f8dfea	2017-02-16 13:52:22 +0200	[diff] [blame]	271	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	272	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	273	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	a90dd4c	2016-09-22 12:56:14 +1200	[diff] [blame]	274	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	275	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	276	default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese	5c806f1	2016-10-25 10:56:19 +0200	[diff] [blame]	277	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	1d6ff1f	2021-03-16 17:20:57 +0100	[diff] [blame]	278	default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	279	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	6aebc1a	2023-02-09 14:00:03 -0800	[diff] [blame]	280	default "ds116" if TARGET_DS116
Phil Sutter	d76eba6	2015-12-25 14:41:25 +0100	[diff] [blame]	281	default "ds414" if TARGET_DS414
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	282	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	283	default "n2350" if TARGET_N2350
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	284	default "theadorable" if TARGET_THEADORABLE
Baruch Siach	daa6f08	2018-06-18 21:56:23 +0300	[diff] [blame]	285	default "a38x" if TARGET_CONTROLCENTERDC
Chris Packham	b55b2c9	2019-01-10 21:01:00 +1300	[diff] [blame]	286	default "x530" if TARGET_X530
Chris Packham	7325f1f	2023-07-10 10:47:36 +1200	[diff] [blame]	287	default "x240" if TARGET_X240
Chris Packham	199e318	2019-04-11 22:22:53 +1200	[diff] [blame]	288	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	25acb8b	2020-05-26 20:17:50 +0200	[diff] [blame]	289	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	290	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	291
				292	config SYS_CONFIG_NAME
				293	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	77c3940	2018-06-11 19:39:53 -0500	[diff] [blame]	294	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	7f8dfea	2017-02-16 13:52:22 +0200	[diff] [blame]	295	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	296	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	297	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	a90dd4c	2016-09-22 12:56:14 +1200	[diff] [blame]	298	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese	5c806f1	2016-10-25 10:56:19 +0200	[diff] [blame]	299	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	1d6ff1f	2021-03-16 17:20:57 +0100	[diff] [blame]	300	default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	301	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	6aebc1a	2023-02-09 14:00:03 -0800	[diff] [blame]	302	default "ds116" if TARGET_DS116
Phil Sutter	d76eba6	2015-12-25 14:41:25 +0100	[diff] [blame]	303	default "ds414" if TARGET_DS414
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	304	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	305	default "n2350" if TARGET_N2350
Stefan Roese	459e064	2016-01-20 08:13:29 +0100	[diff] [blame]	306	default "theadorable" if TARGET_THEADORABLE
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	307	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	308	default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siach	daa6f08	2018-06-18 21:56:23 +0300	[diff] [blame]	309	default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packham	b55b2c9	2019-01-10 21:01:00 +1300	[diff] [blame]	310	default "x530" if TARGET_X530
Chris Packham	7325f1f	2023-07-10 10:47:36 +1200	[diff] [blame]	311	default "x240" if TARGET_X240
Chris Packham	199e318	2019-04-11 22:22:53 +1200	[diff] [blame]	312	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	25acb8b	2020-05-26 20:17:50 +0200	[diff] [blame]	313	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	314	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	315
				316	config SYS_VENDOR
				317	default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin	7f8dfea	2017-02-16 13:52:22 +0200	[diff] [blame]	318	default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	9106ed0	2016-01-29 09:14:54 +0100	[diff] [blame]	319	default "Marvell" if TARGET_DB_88F6720
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	320	default "Marvell" if TARGET_DB_88F6820_GP
Chris Packham	a90dd4c	2016-09-22 12:56:14 +1200	[diff] [blame]	321	default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese	5c806f1	2016-10-25 10:56:19 +0200	[diff] [blame]	322	default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	1d6ff1f	2021-03-16 17:20:57 +0100	[diff] [blame]	323	default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham	199e318	2019-04-11 22:22:53 +1200	[diff] [blame]	324	default "Marvell" if TARGET_DB_XC3_24G4XG
				325	default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	326	default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore	77c3940	2018-06-11 19:39:53 -0500	[diff] [blame]	327	default "kobol" if TARGET_HELIOS4
Tony Dinh	6aebc1a	2023-02-09 14:00:03 -0800	[diff] [blame]	328	default "Synology" if TARGET_DS116
Phil Sutter	d76eba6	2015-12-25 14:41:25 +0100	[diff] [blame]	329	default "Synology" if TARGET_DS414
Tony Dinh	63eba13	2023-02-01 15:13:05 -0800	[diff] [blame]	330	default "thecus" if TARGET_N2350
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	331	default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behún	f835bed	2018-04-24 17:21:31 +0200	[diff] [blame]	332	default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siach	daa6f08	2018-06-18 21:56:23 +0300	[diff] [blame]	333	default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packham	b55b2c9	2019-01-10 21:01:00 +1300	[diff] [blame]	334	default "alliedtelesis" if TARGET_X530
Chris Packham	7325f1f	2023-07-10 10:47:36 +1200	[diff] [blame]	335	default "alliedtelesis" if TARGET_X240
Luka Kovacic	25acb8b	2020-05-26 20:17:50 +0200	[diff] [blame]	336	default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham	67b7d50	2022-11-05 17:24:00 +1300	[diff] [blame]	337	default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b9f41bf	2015-12-21 13:40:37 +0100	[diff] [blame]	338
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	339	config SYS_SOC
				340	default "mvebu"
				341
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	342	choice
Baruch Siach	8d196a4	2018-06-18 21:56:24 +0300	[diff] [blame]	343	prompt "Boot method"
Joel Johnson	a2018ab	2020-04-17 01:19:05 -0600	[diff] [blame]	344	depends on SPL
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	345
Baruch Siach	8d196a4	2018-06-18 21:56:24 +0300	[diff] [blame]	346	config MVEBU_SPL_BOOT_DEVICE_SPI
Pali Rohár	8d11032	2023-01-10 23:13:01 +0100	[diff] [blame]	347	bool "NOR flash (SPI or parallel)"
Joel Johnson	a2018ab	2020-04-17 01:19:05 -0600	[diff] [blame]	348	imply ENV_IS_IN_SPI_FLASH
Pali Rohár	cf97b82	2021-07-23 11:14:29 +0200	[diff] [blame]	349	imply SPL_DM_SPI
				350	imply SPL_SPI_FLASH_SUPPORT
				351	imply SPL_SPI_LOAD
Simon Glass	a582047	2021-08-08 12:20:14 -0600	[diff] [blame]	352	imply SPL_SPI
Pali Rohár	a3a38e5	2021-07-23 11:14:25 +0200	[diff] [blame]	353	select SPL_BOOTROM_SUPPORT
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	354
Pali Rohár	5c5cf60	2023-01-10 22:55:21 +0100	[diff] [blame]	355	config MVEBU_SPL_BOOT_DEVICE_NAND
				356	bool "NAND flash (SPI or parallel)"
				357	select MTD_RAW_NAND
				358	select SPL_BOOTROM_SUPPORT
				359
Baruch Siach	8d196a4	2018-06-18 21:56:24 +0300	[diff] [blame]	360	config MVEBU_SPL_BOOT_DEVICE_MMC
Pali Rohár	8d11032	2023-01-10 23:13:01 +0100	[diff] [blame]	361	bool "eMMC or SD card"
Joel Johnson	a2018ab	2020-04-17 01:19:05 -0600	[diff] [blame]	362	imply ENV_IS_IN_MMC
				363	# GPIO needed for eMMC/SD card presence detection
Pali Rohár	cf97b82	2021-07-23 11:14:29 +0200	[diff] [blame]	364	imply SPL_DM_GPIO
				365	imply SPL_DM_MMC
				366	imply SPL_GPIO
				367	imply SPL_LIBDISK_SUPPORT
Simon Glass	b58bfe0	2021-08-08 12:20:09 -0600	[diff] [blame]	368	imply SPL_MMC
Pali Rohár	cefdc03	2023-01-08 13:31:41 +0100	[diff] [blame]	369	select SUPPORT_EMMC_BOOT if SPL_MMC
Pali Rohár	aa6244e	2023-01-09 00:52:09 +0100	[diff] [blame]	370	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
Pali Rohár	a3a38e5	2021-07-23 11:14:25 +0200	[diff] [blame]	371	select SPL_BOOTROM_SUPPORT
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	372
Baruch Siach	b936a27	2019-05-16 13:03:58 +0300	[diff] [blame]	373	config MVEBU_SPL_BOOT_DEVICE_SATA
				374	bool "SATA"
Simon Glass	081a45a	2021-08-08 12:20:17 -0600	[diff] [blame]	375	imply SPL_SATA
Pali Rohár	cf97b82	2021-07-23 11:14:29 +0200	[diff] [blame]	376	imply SPL_LIBDISK_SUPPORT
Pali Rohár	a3a38e5	2021-07-23 11:14:25 +0200	[diff] [blame]	377	select SPL_BOOTROM_SUPPORT
Baruch Siach	b936a27	2019-05-16 13:03:58 +0300	[diff] [blame]	378
Pali Rohár	ea87690	2023-01-10 23:09:15 +0100	[diff] [blame]	379	config MVEBU_SPL_BOOT_DEVICE_PEX
				380	bool "PCI Express"
				381	select SPL_BOOTROM_SUPPORT
				382
Baruch Siach	b35c447	2018-06-18 21:56:26 +0300	[diff] [blame]	383	config MVEBU_SPL_BOOT_DEVICE_UART
				384	bool "UART"
Pali Rohár	a3a38e5	2021-07-23 11:14:25 +0200	[diff] [blame]	385	select SPL_BOOTROM_SUPPORT
Baruch Siach	b35c447	2018-06-18 21:56:26 +0300	[diff] [blame]	386
Marek Behún	09e16b8	2017-06-09 19:28:45 +0200	[diff] [blame]	387	endchoice
				388
Pali Rohár	5c5cf60	2023-01-10 22:55:21 +0100	[diff] [blame]	389	config MVEBU_SPL_NAND_BADBLK_LOCATION
				390	hex "NAND Bad block indicator location"
				391	depends on MVEBU_SPL_BOOT_DEVICE_NAND
				392	range 0x0 0x1
				393	help
				394	Value 0x0 = SLC flash = BBI at page 0 or page 1
				395	Value 0x1 = MLC flash = BBI at last page in the block
				396
Pali Rohár	7085f82	2023-03-29 21:25:58 +0200	[diff] [blame]	397	config MVEBU_SPL_SATA_BLKSZ
				398	int "SATA block size"
				399	depends on MVEBU_SPL_BOOT_DEVICE_SATA
				400	range 512 32768
				401	default 512
				402	help
				403	Block size of the SATA disk in bytes.
				404	Typically 512 bytes for majority of disks
				405	and 4096 bytes for 4K Native disks.
				406
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	407	config MVEBU_EFUSE
				408	bool "Enable eFuse support"
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	409	depends on HAVE_MVEBU_EFUSE
				410	help
				411	Enable support for reading and writing eFuses on mvebu SoCs.
				412
				413	config MVEBU_EFUSE_FAKE
				414	bool "Fake eFuse access (dry run)"
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	415	depends on MVEBU_EFUSE
				416	help
				417	This enables a "dry run" mode where eFuses are not really programmed.
				418	Instead the eFuse accesses are emulated by writing to and reading
				419	from a memory block.
				420	This is can be used for testing prog scripts.
				421
Pali Rohár	2662d2c	2022-09-22 13:43:45 +0200	[diff] [blame]	422	config MVEBU_EFUSE_VHV_GPIO
				423	string "VHV_Enable GPIO name for eFuse programming"
				424	depends on MVEBU_EFUSE && !ARMADA_3700
				425	help
				426	The eFuse programing (burning) phase requires supplying 1.8V to the
				427	device on the VHV power pin, while for normal operation the VHV power
				428	rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
				429	document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
				430	.
				431	This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
				432
				433	config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
				434	bool "VHV_Enable GPIO is Active Low"
				435	depends on MVEBU_EFUSE_VHV_GPIO != ""
				436
Mario Six	10d1449	2017-01-11 16:01:00 +0100	[diff] [blame]	437	config SECURED_MODE_IMAGE
				438	bool "Build image for trusted boot"
				439	default false
				440	depends on 88F6820
				441	help
				442	Build an image that employs the ARMADA SoC's trusted boot framework
				443	for securely booting images.
				444
				445	config SECURED_MODE_CSK_INDEX
				446	int "Index of active CSK"
				447	default 0
				448	depends on SECURED_MODE_IMAGE
				449
Tony Dinh	89dc46d	2023-03-02 19:27:29 -0800	[diff] [blame]	450	config SF_DEFAULT_SPEED
				451	int "Default speed for SPI flash in Hz"
				452	default 10000000
				453	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				454
				455	config SF_DEFAULT_MODE
				456	hex "Default mode for SPI flash"
				457	default 0x0
				458	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				459
Marek Behún	1c657bc	2024-04-04 09:50:58 +0200	[diff] [blame]	460	config ARMADA_32BIT_SYSCON_RESET
				461	bool "Support Armada XP/375/38x/39x reset controller"
				462	depends on ARMADA_32BIT
				463	depends on DM_RESET
				464	select REGMAP
				465	select SYSCON
				466	help
				467	Build support for Armada XP/375/38x/39x reset controller. This is
				468	needed for PCIe support.
				469
Joel Johnson	28bf4ca	2020-03-23 14:21:32 -0600	[diff] [blame]	470	source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore	838e49b	2020-12-08 21:07:36 -0600	[diff] [blame]	471	source "board/kobol/helios4/Kconfig"
Joel Johnson	28bf4ca	2020-03-23 14:21:32 -0600	[diff] [blame]	472
Stefan Roese	383e0c1	2015-08-25 13:18:38 +0200	[diff] [blame]	473	endif