blob: deb9873cc53777b4df7dc6d8235d0d583df9898f [file] [log] [blame]
Masahiro Yamada420b8162014-08-31 07:11:04 +09001if OMAP54XX
2
Uri Mashiache47ae872017-02-23 15:39:35 +02003config DRA7XX
4 bool
5 help
6 DRA7xx is an OMAP based SOC with Dual Core A-15s.
7
Masahiro Yamada420b8162014-08-31 07:11:04 +09008choice
9 prompt "OMAP5 board select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050010 optional
Masahiro Yamada420b8162014-08-31 07:11:04 +090011
Dmitry Lifshitz10a59d02016-12-28 18:28:33 +020012config TARGET_CL_SOM_AM57X
13 bool "CompuLab CL-SOM-AM57x"
Uri Mashiache47ae872017-02-23 15:39:35 +020014 select DRA7XX
Dmitry Lifshitz10a59d02016-12-28 18:28:33 +020015
Masahiro Yamada420b8162014-08-31 07:11:04 +090016config TARGET_CM_T54
17 bool "CompuLab CM-T54"
18
19config TARGET_OMAP5_UEVM
20 bool "TI OMAP5 uEVM board"
21
22config TARGET_DRA7XX_EVM
23 bool "TI DRA7XX"
Tom Rini22d567e2017-01-22 19:43:11 -050024 select BOARD_LATE_INIT
Uri Mashiache47ae872017-02-23 15:39:35 +020025 select DRA7XX
Lokesh Vutla3c7dc012016-03-08 09:18:05 +053026 select TI_I2C_BOARD_DETECT
Masahiro Yamada653e9fe2016-07-25 19:56:03 +090027 select PHYS_64BIT
Simon Glass0e5faf02017-06-14 21:28:21 -060028 imply SCSI
Lokesh Vutla68ad5062017-08-21 12:50:51 +053029 imply DM_PMIC
30 imply PMIC_LP87565
31 imply DM_REGULATOR
32 imply DM_REGULATOR_LP87565
Faiz Abbas6c198d72017-11-14 16:12:33 +053033 imply SPL_THERMAL
34 imply DM_THERMAL
35 imply TI_DRA7_THERMAL
Masahiro Yamada420b8162014-08-31 07:11:04 +090036
Lokesh Vutla6c2cfdd2016-06-10 09:35:42 +053037config TARGET_AM57XX_EVM
38 bool "AM57XX"
Tom Rini22d567e2017-01-22 19:43:11 -050039 select BOARD_LATE_INIT
Uri Mashiache47ae872017-02-23 15:39:35 +020040 select DRA7XX
Kipisz, Steven161f1382016-02-24 12:30:58 -060041 select TI_I2C_BOARD_DETECT
Lokesh Vutlac2d3aad2017-12-29 11:47:56 +053042 select CMD_DDR3
Simon Glass0e5faf02017-06-14 21:28:21 -060043 imply SCSI
Faiz Abbas6c198d72017-11-14 16:12:33 +053044 imply SPL_THERMAL
45 imply DM_THERMAL
46 imply TI_DRA7_THERMAL
Felipe Balbi4750eb62014-11-10 14:02:44 -060047
Masahiro Yamada420b8162014-08-31 07:11:04 +090048endchoice
49
Masahiro Yamada420b8162014-08-31 07:11:04 +090050config SYS_SOC
Masahiro Yamada420b8162014-08-31 07:11:04 +090051 default "omap5"
52
Tom Rini50e221a2017-05-12 22:33:17 -040053config OMAP_PLATFORM_RESET_TIME_MAX_USEC
54 int "Something"
55 range 0 31219
56 default 31219
57 help
58 Most OMAPs' provide a way to specify the time for which the reset
59 should be held low while the voltages and Oscillator outputs
60 stabilize.
61 This time is mostly board and PMIC dependent. Hence the boards are
62 expected to specify a pre-computed time using the above option.
63 This value can be computed using a summation of the below 3
64 parameters
65 1: Time taken by the Osciallator to stop and restart
66 2: PMIC OTP time
67 3: Voltage ramp time, which can be derived using the PMIC slew rate
68 and value of voltage ramp needed.
69
Suman Annaf28b26c2016-11-23 12:54:40 +053070if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM
71menu "Voltage Domain OPP selections"
72
73choice
74 prompt "MPU Voltage Domain"
75 default DRA7_MPU_OPP_NOM
76 help
77 Select the Operating Performance Point(OPP) for the MPU voltage
78 domain on DRA7xx & AM57xx SoCs.
79
80config DRA7_MPU_OPP_NOM
81 bool "OPP NOM"
82 help
83 This config option enables Normal OPP for MPU. This is the safest
84 option for booting.
85
86endchoice
87
88choice
89 prompt "DSPEVE Voltage Domain"
90 help
91 Select the Operating Performance Point(OPP) for the DSPEVE voltage
92 domain on DRA7xx & AM57xx SoCs.
93
94config DRA7_DSPEVE_OPP_NOM
95 bool "OPP NOM"
96 help
97 This config option enables Normal OPP for DSPEVE. This is the safest
98 option for booting and choose this when unsure about other OPPs .
99
100config DRA7_DSPEVE_OPP_OD
101 bool "OPP OD"
102 help
103 This config option enables Over drive OPP for DSPEVE.
104
105config DRA7_DSPEVE_OPP_HIGH
106 bool "OPP HIGH"
107 help
108 This config option enables High OPP for DSPEVE.
109
110endchoice
111
112choice
113 prompt "IVA Voltage Domain"
114 help
115 Select the Operating Performance Point(OPP) for the IVA voltage
116 domain on DRA7xx & AM57xx SoCs.
117
118config DRA7_IVA_OPP_NOM
119 bool "OPP NOM"
120 help
121 This config option enables Normal OPP for IVA. This is the safest
122 option for booting and choose this when unsure about other OPPs .
123
124config DRA7_IVA_OPP_OD
125 bool "OPP OD"
126 help
127 This config option enables Over drive OPP for IVA.
128
129config DRA7_IVA_OPP_HIGH
130 bool "OPP HIGH"
131 help
132 This config option enables High OPP for IVA.
133
134endchoice
135
136choice
137 prompt "GPU Voltage Domain"
138 help
139 Select the Operating Performance Point(OPP) for the GPU voltage
140 domain on DRA7xx & AM57xx SoCs.
141
142config DRA7_GPU_OPP_NOM
143 bool "OPP NOM"
144 help
145 This config option enables Normal OPP for GPU. This is the safest
146 option for booting and choose this when unsure about other OPPs .
147
148config DRA7_GPU_OPP_OD
149 bool "OPP OD"
150 help
151 This config option enables Over drive OPP for GPU.
152
153config DRA7_GPU_OPP_HIGH
154 bool "OPP HIGH"
155 help
156 This config option enables High OPP for GPU.
157
158endchoice
159
160endmenu
161endif
162
Dmitry Lifshitz10a59d02016-12-28 18:28:33 +0200163source "board/compulab/cl-som-am57x/Kconfig"
Masahiro Yamada420b8162014-08-31 07:11:04 +0900164source "board/compulab/cm_t54/Kconfig"
165source "board/ti/omap5_uevm/Kconfig"
166source "board/ti/dra7xx/Kconfig"
Kipisz, Steven1dacd0d2015-10-29 16:50:43 -0500167source "board/ti/am57xx/Kconfig"
Masahiro Yamada420b8162014-08-31 07:11:04 +0900168
169endif