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Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse076d6f2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Stephen Warrenadf3abd2016-07-18 12:17:11 -060015config TEGRA_IVC
16 bool "Tegra IVC protocol"
17 help
18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
19 (Inter Processor Communication) framework. Within the context of
20 U-Boot, it is typically used for communication between the main CPU
21 and various auxiliary processors.
22
Stephen Warren8c29e652015-11-23 10:32:01 -070023config TEGRA_COMMON
24 bool "Tegra common options"
Stephen Warren905752c2016-09-13 10:46:00 -060025 select CLK
Tom Warren7b5002e2015-07-17 08:12:51 -070026 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -070027 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -070028 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070029 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060030 select DM_KEYBOARD
Tom Warrena66f7722016-09-13 10:45:48 -060031 select DM_MMC
Simon Glassd8af3c92016-01-30 16:38:01 -070032 select DM_PWM
Stephen Warren905752c2016-09-13 10:46:00 -060033 select DM_RESET
Stephen Warren8c29e652015-11-23 10:32:01 -070034 select DM_SERIAL
35 select DM_SPI
36 select DM_SPI_FLASH
Stephen Warren905752c2016-09-13 10:46:00 -060037 select MISC
Stephen Warren8c29e652015-11-23 10:32:01 -070038 select OF_CONTROL
Simon Glassfe4ee972016-02-16 18:09:19 -070039 select VIDCONSOLE_AS_LCD if DM_VIDEO
Simon Glass7a99a872017-01-23 13:31:20 -070040 select BOARD_EARLY_INIT_F
Stephen Warren8c29e652015-11-23 10:32:01 -070041
Stephen Warren905752c2016-09-13 10:46:00 -060042config TEGRA_NO_BPMP
43 bool "Tegra common options for SoCs without BPMP"
44 select TEGRA_CAR
45 select TEGRA_CAR_CLOCK
46 select TEGRA_CAR_RESET
47
Stephen Warren8c29e652015-11-23 10:32:01 -070048config TEGRA_ARMV7_COMMON
49 bool "Tegra 32-bit common options"
50 select CPU_V7
51 select SPL
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080052 select SPL_BOARD_INIT if SPL
Stephen Warren8c29e652015-11-23 10:32:01 -070053 select SUPPORT_SPL
54 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060055 select TEGRA_GPIO
Stephen Warren905752c2016-09-13 10:46:00 -060056 select TEGRA_NO_BPMP
Stephen Warren8c29e652015-11-23 10:32:01 -070057
58config TEGRA_ARMV8_COMMON
59 bool "Tegra 64-bit common options"
60 select ARM64
61 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070062
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090063choice
64 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050065 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090066
67config TEGRA20
68 bool "Tegra20 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050069 select ARM_ERRATA_716044
70 select ARM_ERRATA_742230
71 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070072 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090073
74config TEGRA30
75 bool "Tegra30 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050076 select ARM_ERRATA_743622
77 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070078 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090079
80config TEGRA114
81 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070082 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090083
84config TEGRA124
85 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070086 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090087
Tom Warrenab0cc6b2015-03-04 16:36:00 -070088config TEGRA210
89 bool "Tegra210 family"
Stephen Warrenaf974be2016-05-12 12:07:41 -060090 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070091 select TEGRA_ARMV8_COMMON
Stephen Warren905752c2016-09-13 10:46:00 -060092 select TEGRA_NO_BPMP
Tom Warrenab0cc6b2015-03-04 16:36:00 -070093
Stephen Warren03667eb2016-05-12 13:32:55 -060094config TEGRA186
95 bool "Tegra186 family"
Stephen Warrene0e2b262016-06-17 09:43:57 -060096 select DM_MAILBOX
Stephen Warrena2148922016-08-08 09:41:34 -060097 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -060098 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -060099 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600100 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600101 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600102 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600103 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600104
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900105endchoice
106
Stephen Warren5a44ab42016-01-26 10:59:42 -0700107config TEGRA_DISCONNECT_UDC_ON_BOOT
108 bool "Disconnect USB device mode controller on boot"
109 default y
110 help
111 When loading U-Boot into RAM over USB protocols using tools such as
112 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
113 mode controller is initialized and enumerated by the host PC running
114 the tool. Unfortunately, these tools do not shut down the USB
115 controller before executing the downloaded code, and so the host PC
116 does not "de-enumerate" the USB device. This option shuts down the
117 USB controller when U-Boot boots to avoid leaving a stale USB device
118 present.
119
Simon Glass838723b2015-02-11 16:32:59 -0700120config SYS_MALLOC_F_LEN
121 default 0x1800
122
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900123source "arch/arm/mach-tegra/tegra20/Kconfig"
124source "arch/arm/mach-tegra/tegra30/Kconfig"
125source "arch/arm/mach-tegra/tegra114/Kconfig"
126source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700127source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600128source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900129
Simon Glassbd74b032017-05-17 03:25:11 -0600130config CMD_ENTERRCM
131 bool "Enable 'enterrcm' command"
132 default y
133 help
134 Tegra's boot ROM supports a mode whereby code may be downloaded and
135 flash-programmed over a USB connection. On dev boards, this is
136 typically entered by holding down a "force recovery" button and
137 resetting the CPU. However, not all boards have such a button (one
138 example is the Compulab Trimslice), so a method to enter RCM from
139 software is useful.
140
141 Even on boards other than Trimslice, controlling this over a UART
142 may be useful, e.g. to allow simple remote control without the need
143 for mechanical button actuators, or hooking up relays/... to the
144 button.
145
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900146endif