blob: 438583aa01795187e3e3eca147729b8b8bedf977 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glassf87bbff2014-11-14 20:56:33 -07002/*
3 * Copyright (C) 2014 Google, Inc
4 *
5 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
6 *
7 * Modifications are:
8 * Copyright (C) 2003-2004 Linux Networx
9 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
10 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
11 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
12 * Copyright (C) 2005-2006 Tyan
13 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
14 * Copyright (C) 2005-2009 coresystems GmbH
15 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
16 *
17 * PCI Bus Services, see include/linux/pci.h for further explanation.
18 *
19 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
20 * David Mosberger-Tang
21 *
22 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
Simon Glassf87bbff2014-11-14 20:56:33 -070023 */
24
Simon Glass3ed840c2020-07-02 21:12:30 -060025#define LOG_CATEGORY UCLASS_PCI
26
Simon Glassf87bbff2014-11-14 20:56:33 -070027#include <common.h>
28#include <bios_emul.h>
Simon Glass358077b2023-07-15 21:38:59 -060029#include <bloblist.h>
Simon Glass1ea97892020-05-10 11:40:00 -060030#include <bootstage.h>
Simon Glassf9d94d32015-11-29 13:17:57 -070031#include <dm.h>
Simon Glassf87bbff2014-11-14 20:56:33 -070032#include <errno.h>
Simon Glassda25eff2019-12-28 10:44:56 -070033#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060034#include <log.h>
Simon Glassf87bbff2014-11-14 20:56:33 -070035#include <malloc.h>
36#include <pci.h>
37#include <pci_rom.h>
Simon Glass358077b2023-07-15 21:38:59 -060038#include <spl.h>
Simon Glassec86bc62022-07-30 15:52:04 -060039#include <vesa.h>
Simon Glass4ef5d2d2016-10-05 20:42:17 -060040#include <video.h>
Simon Glass50461092020-04-08 16:57:35 -060041#include <acpi/acpi_s3.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060042#include <asm/global_data.h>
Bin Mengf6d504f2015-07-06 16:31:36 +080043#include <linux/screen_info.h>
Simon Glassf87bbff2014-11-14 20:56:33 -070044
Bin Meng62a8f7d2017-04-21 07:24:46 -070045DECLARE_GLOBAL_DATA_PTR;
Bin Meng62a8f7d2017-04-21 07:24:46 -070046
Simon Glassf9d94d32015-11-29 13:17:57 -070047__weak bool board_should_run_oprom(struct udevice *dev)
Simon Glassf87bbff2014-11-14 20:56:33 -070048{
Bin Meng62a8f7d2017-04-21 07:24:46 -070049#if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
50 if (gd->arch.prev_sleep_state == ACPI_S3) {
51 if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
52 return true;
53 else
54 return false;
55 }
56#endif
57
Simon Glassf87bbff2014-11-14 20:56:33 -070058 return true;
59}
60
Bin Mengf49c4852016-06-14 02:02:40 -070061__weak bool board_should_load_oprom(struct udevice *dev)
Simon Glassf87bbff2014-11-14 20:56:33 -070062{
Bin Meng0ea6bcb2016-06-14 02:02:39 -070063 return true;
Simon Glassf87bbff2014-11-14 20:56:33 -070064}
65
66__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
67{
68 return vendev;
69}
70
Simon Glassf9d94d32015-11-29 13:17:57 -070071static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
Simon Glassf87bbff2014-11-14 20:56:33 -070072{
Simon Glassb75b15b2020-12-03 16:55:23 -070073 struct pci_child_plat *pplat = dev_get_parent_plat(dev);
Simon Glassf87bbff2014-11-14 20:56:33 -070074 struct pci_rom_header *rom_header;
75 struct pci_rom_data *rom_data;
Simon Glassdfca4462014-12-29 19:32:23 -070076 u16 rom_vendor, rom_device;
Bin Meng932f80e2015-04-24 15:48:03 +080077 u32 rom_class;
Simon Glassf87bbff2014-11-14 20:56:33 -070078 u32 vendev;
79 u32 mapped_vendev;
80 u32 rom_address;
81
Simon Glassf9d94d32015-11-29 13:17:57 -070082 vendev = pplat->vendor << 16 | pplat->device;
Simon Glassf87bbff2014-11-14 20:56:33 -070083 mapped_vendev = board_map_oprom_vendev(vendev);
84 if (vendev != mapped_vendev)
85 debug("Device ID mapped to %#08x\n", mapped_vendev);
86
Bin Meng4de38862015-07-06 16:31:33 +080087#ifdef CONFIG_VGA_BIOS_ADDR
88 rom_address = CONFIG_VGA_BIOS_ADDR;
Simon Glassf87bbff2014-11-14 20:56:33 -070089#else
Simon Glass1c1695b2015-01-14 21:37:04 -070090
Simon Glassf9d94d32015-11-29 13:17:57 -070091 dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
Simon Glassf87bbff2014-11-14 20:56:33 -070092 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
93 debug("%s: rom_address=%x\n", __func__, rom_address);
94 return -ENOENT;
95 }
Simon Glassad7ae2d2023-07-15 21:39:03 -060096 rom_address &= PCI_ROM_ADDRESS_MASK;
Simon Glassf87bbff2014-11-14 20:56:33 -070097
98 /* Enable expansion ROM address decoding. */
Simon Glassf9d94d32015-11-29 13:17:57 -070099 dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
100 rom_address | PCI_ROM_ADDRESS_ENABLE);
Simon Glassf87bbff2014-11-14 20:56:33 -0700101#endif
102 debug("Option ROM address %x\n", rom_address);
Minghuan Lianf40ad9f2015-01-22 13:21:55 +0800103 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glassf87bbff2014-11-14 20:56:33 -0700104
105 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700106 le16_to_cpu(rom_header->signature),
107 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glassf87bbff2014-11-14 20:56:33 -0700108
Simon Glassdfca4462014-12-29 19:32:23 -0700109 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glassf87bbff2014-11-14 20:56:33 -0700110 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700111 le16_to_cpu(rom_header->signature));
Bin Menga9664732015-07-08 13:06:41 +0800112#ifndef CONFIG_VGA_BIOS_ADDR
113 /* Disable expansion ROM address decoding */
Simon Glassf9d94d32015-11-29 13:17:57 -0700114 dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
Bin Menga9664732015-07-08 13:06:41 +0800115#endif
Simon Glassf87bbff2014-11-14 20:56:33 -0700116 return -EINVAL;
117 }
118
Simon Glassdfca4462014-12-29 19:32:23 -0700119 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
120 rom_vendor = le16_to_cpu(rom_data->vendor);
121 rom_device = le16_to_cpu(rom_data->device);
Simon Glassf87bbff2014-11-14 20:56:33 -0700122
123 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700124 rom_vendor, rom_device);
Simon Glassf87bbff2014-11-14 20:56:33 -0700125
126 /* If the device id is mapped, a mismatch is expected */
Simon Glassf9d94d32015-11-29 13:17:57 -0700127 if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
Simon Glassf87bbff2014-11-14 20:56:33 -0700128 (vendev == mapped_vendev)) {
129 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700130 rom_vendor, rom_device);
Simon Glass02db2172014-12-29 19:32:27 -0700131 /* Continue anyway */
Simon Glassf87bbff2014-11-14 20:56:33 -0700132 }
133
Bin Meng932f80e2015-04-24 15:48:03 +0800134 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
135 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
136 rom_class, rom_data->type);
Simon Glassf87bbff2014-11-14 20:56:33 -0700137
Simon Glassf9d94d32015-11-29 13:17:57 -0700138 if (pplat->class != rom_class) {
Bin Meng932f80e2015-04-24 15:48:03 +0800139 debug("Class Code mismatch ROM %06x, dev %06x\n",
Simon Glassf9d94d32015-11-29 13:17:57 -0700140 rom_class, pplat->class);
Simon Glassf87bbff2014-11-14 20:56:33 -0700141 }
142 *hdrp = rom_header;
143
144 return 0;
145}
146
Simon Glass7548d642016-01-15 05:23:22 -0700147/**
148 * pci_rom_load() - Load a ROM image and return a pointer to it
149 *
150 * @rom_header: Pointer to ROM image
151 * @ram_headerp: Returns a pointer to the image in RAM
152 * @allocedp: Returns true if @ram_headerp was allocated and needs
153 * to be freed
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100154 * Return: 0 if OK, -ve on error. Note that @allocedp is set up regardless of
Simon Glass7548d642016-01-15 05:23:22 -0700155 * the error state. Even if this function returns an error, it may have
156 * allocated memory.
157 */
158static int pci_rom_load(struct pci_rom_header *rom_header,
159 struct pci_rom_header **ram_headerp, bool *allocedp)
Simon Glassf87bbff2014-11-14 20:56:33 -0700160{
161 struct pci_rom_data *rom_data;
162 unsigned int rom_size;
163 unsigned int image_size = 0;
164 void *target;
165
Simon Glass7548d642016-01-15 05:23:22 -0700166 *allocedp = false;
Simon Glassf87bbff2014-11-14 20:56:33 -0700167 do {
168 /* Get next image, until we see an x86 version */
169 rom_header = (struct pci_rom_header *)((void *)rom_header +
170 image_size);
171
172 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glassdfca4462014-12-29 19:32:23 -0700173 le16_to_cpu(rom_header->data));
Simon Glassf87bbff2014-11-14 20:56:33 -0700174
Simon Glassdfca4462014-12-29 19:32:23 -0700175 image_size = le16_to_cpu(rom_data->ilen) * 512;
176 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glassf87bbff2014-11-14 20:56:33 -0700177
178 if (rom_data->type != 0)
179 return -EACCES;
180
181 rom_size = rom_header->size * 512;
182
Simon Glass1b6b9b92014-12-29 19:32:24 -0700183#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glassf87bbff2014-11-14 20:56:33 -0700184 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glass1b6b9b92014-12-29 19:32:24 -0700185#else
186 target = (void *)malloc(rom_size);
187 if (!target)
188 return -ENOMEM;
Simon Glass7548d642016-01-15 05:23:22 -0700189 *allocedp = true;
Simon Glass1b6b9b92014-12-29 19:32:24 -0700190#endif
Simon Glassf87bbff2014-11-14 20:56:33 -0700191 if (target != rom_header) {
Simon Glassf6898082015-01-01 16:18:01 -0700192 ulong start = get_timer(0);
193
Simon Glassf87bbff2014-11-14 20:56:33 -0700194 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
195 rom_header, target, rom_size);
196 memcpy(target, rom_header, rom_size);
197 if (memcmp(target, rom_header, rom_size)) {
198 printf("VGA ROM copy failed\n");
199 return -EFAULT;
200 }
Simon Glassf6898082015-01-01 16:18:01 -0700201 debug("Copy took %lums\n", get_timer(start));
Simon Glassf87bbff2014-11-14 20:56:33 -0700202 }
203 *ram_headerp = target;
204
205 return 0;
206}
207
Simon Glass5b925202022-07-30 15:52:05 -0600208struct vesa_state mode_info;
Simon Glassf87bbff2014-11-14 20:56:33 -0700209
Bin Mengf6d504f2015-07-06 16:31:36 +0800210void setup_video(struct screen_info *screen_info)
211{
Bin Mengf6d504f2015-07-06 16:31:36 +0800212 struct vesa_mode_info *vesa = &mode_info.vesa;
213
Bin Menge7518442015-07-30 03:49:13 -0700214 /* Sanity test on VESA parameters */
215 if (!vesa->x_resolution || !vesa->y_resolution)
216 return;
217
Bin Mengf6d504f2015-07-06 16:31:36 +0800218 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
219
220 screen_info->lfb_width = vesa->x_resolution;
221 screen_info->lfb_height = vesa->y_resolution;
222 screen_info->lfb_depth = vesa->bits_per_pixel;
223 screen_info->lfb_linelength = vesa->bytes_per_scanline;
224 screen_info->lfb_base = vesa->phys_base_ptr;
225 screen_info->lfb_size =
226 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
227 65536);
228 screen_info->lfb_size >>= 16;
229 screen_info->red_size = vesa->red_mask_size;
230 screen_info->red_pos = vesa->red_mask_pos;
231 screen_info->green_size = vesa->green_mask_size;
232 screen_info->green_pos = vesa->green_mask_pos;
233 screen_info->blue_size = vesa->blue_mask_size;
234 screen_info->blue_pos = vesa->blue_mask_pos;
235 screen_info->rsvd_size = vesa->reserved_mask_size;
236 screen_info->rsvd_pos = vesa->reserved_mask_pos;
Bin Mengf6d504f2015-07-06 16:31:36 +0800237}
238
Simon Glassf9d94d32015-11-29 13:17:57 -0700239int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
240 int exec_method)
Simon Glassf87bbff2014-11-14 20:56:33 -0700241{
Simon Glassb75b15b2020-12-03 16:55:23 -0700242 struct pci_child_plat *pplat = dev_get_parent_plat(dev);
Andreas Bießmanncb8aefa2016-02-16 23:29:31 +0100243 struct pci_rom_header *rom = NULL, *ram = NULL;
Simon Glassf87bbff2014-11-14 20:56:33 -0700244 int vesa_mode = -1;
Simon Glass7548d642016-01-15 05:23:22 -0700245 bool emulate, alloced;
Simon Glassf87bbff2014-11-14 20:56:33 -0700246 int ret;
247
248 /* Only execute VGA ROMs */
Simon Glassf9d94d32015-11-29 13:17:57 -0700249 if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
250 debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
Simon Glassf87bbff2014-11-14 20:56:33 -0700251 PCI_CLASS_DISPLAY_VGA);
252 return -ENODEV;
253 }
254
Bin Mengf49c4852016-06-14 02:02:40 -0700255 if (!board_should_load_oprom(dev))
Simon Glassbaac4eb2018-10-01 12:22:44 -0600256 return log_msg_ret("Should not load OPROM", -ENXIO);
Simon Glassf87bbff2014-11-14 20:56:33 -0700257
Simon Glassf9d94d32015-11-29 13:17:57 -0700258 ret = pci_rom_probe(dev, &rom);
Simon Glassf87bbff2014-11-14 20:56:33 -0700259 if (ret)
Simon Glass528d4832023-07-15 21:38:57 -0600260 return log_msg_ret("pro", ret);
Simon Glassf87bbff2014-11-14 20:56:33 -0700261
Simon Glass7548d642016-01-15 05:23:22 -0700262 ret = pci_rom_load(rom, &ram, &alloced);
Simon Glass528d4832023-07-15 21:38:57 -0600263 if (ret) {
264 ret = log_msg_ret("ld", ret);
Simon Glass7548d642016-01-15 05:23:22 -0700265 goto err;
Simon Glass528d4832023-07-15 21:38:57 -0600266 }
Simon Glassf87bbff2014-11-14 20:56:33 -0700267
Simon Glass7548d642016-01-15 05:23:22 -0700268 if (!board_should_run_oprom(dev)) {
Simon Glass528d4832023-07-15 21:38:57 -0600269 ret = log_msg_ret("run", -ENXIO);
Simon Glass7548d642016-01-15 05:23:22 -0700270 goto err;
271 }
Simon Glassf87bbff2014-11-14 20:56:33 -0700272
273#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
274 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
275 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
276#endif
Simon Glass466bb7a2023-07-15 21:39:02 -0600277 debug("Selected vesa mode 0x%x\n", vesa_mode);
Simon Glass684818d2015-01-27 22:13:34 -0700278
279 if (exec_method & PCI_ROM_USE_NATIVE) {
280#ifdef CONFIG_X86
281 emulate = false;
282#else
283 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
284 printf("BIOS native execution is only available on x86\n");
Simon Glass7548d642016-01-15 05:23:22 -0700285 ret = -ENOSYS;
286 goto err;
Simon Glass684818d2015-01-27 22:13:34 -0700287 }
288 emulate = true;
289#endif
290 } else {
291#ifdef CONFIG_BIOSEMU
292 emulate = true;
293#else
294 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
295 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
Simon Glass7548d642016-01-15 05:23:22 -0700296 ret = -ENOSYS;
297 goto err;
Simon Glass684818d2015-01-27 22:13:34 -0700298 }
299 emulate = false;
300#endif
301 }
302
Simon Glassf87bbff2014-11-14 20:56:33 -0700303 if (emulate) {
Simon Glassee95ec12023-07-15 21:38:58 -0600304 if (CONFIG_IS_ENABLED(BIOSEMU)) {
305 BE_VGAInfo *info;
Simon Glassf87bbff2014-11-14 20:56:33 -0700306
Simon Glassee95ec12023-07-15 21:38:58 -0600307 log_debug("Running video BIOS with emulator...");
308 ret = biosemu_setup(dev, &info);
309 if (ret)
310 goto err;
311 biosemu_set_interrupt_handler(0x15, int15_handler);
312 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
313 true, vesa_mode, &mode_info);
314 log_debug("done\n");
315 if (ret)
316 goto err;
317 }
Simon Glassf87bbff2014-11-14 20:56:33 -0700318 } else {
Simon Glass69c5b2d2019-04-25 21:59:08 -0600319#if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
Simon Glass528d4832023-07-15 21:38:57 -0600320 log_debug("Running video BIOS...");
Simon Glassf87bbff2014-11-14 20:56:33 -0700321 bios_set_interrupt_handler(0x15, int15_handler);
322
Simon Glassa0630862015-11-29 13:17:58 -0700323 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
324 &mode_info);
Simon Glass528d4832023-07-15 21:38:57 -0600325 log_debug("done\n");
Simon Glassf87bbff2014-11-14 20:56:33 -0700326#endif
327 }
Simon Glass466bb7a2023-07-15 21:39:02 -0600328 debug("Final vesa mode %x\n", mode_info.video_mode);
Simon Glass7548d642016-01-15 05:23:22 -0700329 ret = 0;
Simon Glassf87bbff2014-11-14 20:56:33 -0700330
Simon Glass7548d642016-01-15 05:23:22 -0700331err:
332 if (alloced)
333 free(ram);
334 return ret;
Simon Glassf87bbff2014-11-14 20:56:33 -0700335}
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600336
Simon Glassc1e9eab2023-03-10 12:47:13 -0800337int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb,
Simon Glass5b925202022-07-30 15:52:05 -0600338 struct video_priv *uc_priv,
339 struct video_uc_plat *plat)
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600340{
341 if (!vesa->x_resolution)
Simon Glassbaac4eb2018-10-01 12:22:44 -0600342 return log_msg_ret("No x resolution", -ENXIO);
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600343 uc_priv->xsize = vesa->x_resolution;
344 uc_priv->ysize = vesa->y_resolution;
Simon Glass7d186732018-11-29 15:08:52 -0700345 uc_priv->line_length = vesa->bytes_per_scanline;
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600346 switch (vesa->bits_per_pixel) {
347 case 32:
348 case 24:
349 uc_priv->bpix = VIDEO_BPP32;
350 break;
351 case 16:
352 uc_priv->bpix = VIDEO_BPP16;
353 break;
354 default:
355 return -EPROTONOSUPPORT;
356 }
Simon Glass3ed840c2020-07-02 21:12:30 -0600357
358 /* Use double buffering if enabled */
Simon Glass98145af2021-03-15 18:00:26 +1300359 if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->base)
Simon Glassc1e9eab2023-03-10 12:47:13 -0800360 plat->copy_base = fb;
Simon Glass98145af2021-03-15 18:00:26 +1300361 else
Simon Glassc1e9eab2023-03-10 12:47:13 -0800362 plat->base = fb;
Simon Glass3ed840c2020-07-02 21:12:30 -0600363 log_debug("base = %lx, copy_base = %lx\n", plat->base, plat->copy_base);
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600364 plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
365
366 return 0;
367}
368
Simon Glass5b925202022-07-30 15:52:05 -0600369int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void))
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600370{
Simon Glassb75b15b2020-12-03 16:55:23 -0700371 struct video_uc_plat *plat = dev_get_uclass_plat(dev);
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600372 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
373 int ret;
374
375 /* If we are running from EFI or coreboot, this can't work */
Bin Meng57b65e62016-10-09 04:14:12 -0700376 if (!ll_boot_init()) {
377 printf("Not available (previous bootloader prevents it)\n");
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600378 return -EPERM;
Bin Meng57b65e62016-10-09 04:14:12 -0700379 }
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600380
Simon Glass358077b2023-07-15 21:38:59 -0600381 /* In U-Boot proper, collect the information added by SPL (see below) */
382 if (IS_ENABLED(CONFIG_SPL_VIDEO) && spl_phase() > PHASE_SPL &&
383 CONFIG_IS_ENABLED(BLOBLIST)) {
384 struct video_handoff *ho;
385
386 ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
387 if (!ho)
388 return log_msg_ret("blf", -ENOENT);
389 plat->base = ho->fb;
390 plat->size = ho->size;
391 uc_priv->xsize = ho->xsize;
392 uc_priv->ysize = ho->ysize;
393 uc_priv->line_length = ho->line_length;
394 uc_priv->bpix = ho->bpix;
395 } else {
396 bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
397 ret = dm_pci_run_vga_bios(dev, int15_handler,
398 PCI_ROM_USE_NATIVE |
399 PCI_ROM_ALLOW_FALLBACK);
400 bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
401 if (ret) {
402 debug("failed to run video BIOS: %d\n", ret);
403 return ret;
Simon Glass3ed840c2020-07-02 21:12:30 -0600404 }
405
Simon Glass358077b2023-07-15 21:38:59 -0600406 ret = vesa_setup_video_priv(&mode_info.vesa,
407 mode_info.vesa.phys_base_ptr,
408 uc_priv, plat);
409 if (ret) {
410 if (ret == -ENFILE) {
411 /*
412 * See video-uclass.c for how to set up reserved
413 * memory in your video driver
414 */
415 log_err("CONFIG_VIDEO_COPY enabled but driver '%s' set up no reserved memory\n",
416 dev->driver->name);
417 }
418
419 debug("No video mode configured\n");
420 return ret;
421 }
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600422 }
423
Bin Mengbe4551e2018-04-11 22:02:18 -0700424 printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
Bin Meng57b65e62016-10-09 04:14:12 -0700425 mode_info.vesa.bits_per_pixel);
426
Simon Glass358077b2023-07-15 21:38:59 -0600427 /* In SPL, store the information for use by U-Boot proper */
428 if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
429 struct video_handoff *ho;
430
431 ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);
432 if (!ho)
433 return log_msg_ret("blc", -ENOMEM);
434
435 ho->fb = plat->base;
436 ho->size = plat->size;
437 ho->xsize = uc_priv->xsize;
438 ho->ysize = uc_priv->ysize;
439 ho->line_length = uc_priv->line_length;
440 ho->bpix = uc_priv->bpix;
441 }
442
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600443 return 0;
444}