blob: 5729a152e5bb00ed759dfe90bd7750f10b7e20b7 [file] [log] [blame]
Simon Glassf87bbff2014-11-14 20:56:33 -07001/*
2 * Copyright (C) 2014 Google, Inc
3 *
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
5 *
6 * Modifications are:
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
15 *
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
17 *
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
20 *
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
22
23 * SPDX-License-Identifier: GPL-2.0
24 */
25
26#include <common.h>
27#include <bios_emul.h>
28#include <errno.h>
29#include <malloc.h>
30#include <pci.h>
31#include <pci_rom.h>
32#include <vbe.h>
33#include <video_fb.h>
34
35#ifdef CONFIG_HAVE_ACPI_RESUME
36#include <asm/acpi.h>
37#endif
38
39__weak bool board_should_run_oprom(pci_dev_t dev)
40{
41 return true;
42}
43
44static bool should_load_oprom(pci_dev_t dev)
45{
46#ifdef CONFIG_HAVE_ACPI_RESUME
47 if (acpi_get_slp_type() == 3)
48 return false;
49#endif
50 if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
51 return 1;
52 if (board_should_run_oprom(dev))
53 return 1;
54
55 return 0;
56}
57
58__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
59{
60 return vendev;
61}
62
63static int pci_rom_probe(pci_dev_t dev, uint class,
64 struct pci_rom_header **hdrp)
65{
66 struct pci_rom_header *rom_header;
67 struct pci_rom_data *rom_data;
68 u16 vendor, device;
Simon Glassdfca4462014-12-29 19:32:23 -070069 u16 rom_vendor, rom_device;
Simon Glassf87bbff2014-11-14 20:56:33 -070070 u32 vendev;
71 u32 mapped_vendev;
72 u32 rom_address;
73
74 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
75 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
76 vendev = vendor << 16 | device;
77 mapped_vendev = board_map_oprom_vendev(vendev);
78 if (vendev != mapped_vendev)
79 debug("Device ID mapped to %#08x\n", mapped_vendev);
80
81#ifdef CONFIG_X86_OPTION_ROM_ADDR
82 rom_address = CONFIG_X86_OPTION_ROM_ADDR;
83#else
Simon Glass1c1695b2015-01-14 21:37:04 -070084
85 if (pciauto_setup_rom(pci_bus_to_hose(PCI_BUS(dev)), dev)) {
86 debug("Cannot find option ROM\n");
87 return -ENOENT;
88 }
89
Simon Glassf87bbff2014-11-14 20:56:33 -070090 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
91 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
92 debug("%s: rom_address=%x\n", __func__, rom_address);
93 return -ENOENT;
94 }
95
96 /* Enable expansion ROM address decoding. */
97 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
98 rom_address | PCI_ROM_ADDRESS_ENABLE);
99#endif
100 debug("Option ROM address %x\n", rom_address);
Minghuan Lianf40ad9f2015-01-22 13:21:55 +0800101 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glassf87bbff2014-11-14 20:56:33 -0700102
103 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700104 le16_to_cpu(rom_header->signature),
105 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glassf87bbff2014-11-14 20:56:33 -0700106
Simon Glassdfca4462014-12-29 19:32:23 -0700107 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glassf87bbff2014-11-14 20:56:33 -0700108 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700109 le16_to_cpu(rom_header->signature));
Simon Glassf87bbff2014-11-14 20:56:33 -0700110 return -EINVAL;
111 }
112
Simon Glassdfca4462014-12-29 19:32:23 -0700113 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
114 rom_vendor = le16_to_cpu(rom_data->vendor);
115 rom_device = le16_to_cpu(rom_data->device);
Simon Glassf87bbff2014-11-14 20:56:33 -0700116
117 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700118 rom_vendor, rom_device);
Simon Glassf87bbff2014-11-14 20:56:33 -0700119
120 /* If the device id is mapped, a mismatch is expected */
Simon Glassdfca4462014-12-29 19:32:23 -0700121 if ((vendor != rom_vendor || device != rom_device) &&
Simon Glassf87bbff2014-11-14 20:56:33 -0700122 (vendev == mapped_vendev)) {
123 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700124 rom_vendor, rom_device);
Simon Glass02db2172014-12-29 19:32:27 -0700125 /* Continue anyway */
Simon Glassf87bbff2014-11-14 20:56:33 -0700126 }
127
128 debug("PCI ROM image, Class Code %04x%02x, Code Type %02x\n",
129 rom_data->class_hi, rom_data->class_lo, rom_data->type);
130
131 if (class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
132 debug("Class Code mismatch ROM %08x, dev %08x\n",
133 (rom_data->class_hi << 8) | rom_data->class_lo,
134 class);
135 }
136 *hdrp = rom_header;
137
138 return 0;
139}
140
141int pci_rom_load(uint16_t class, struct pci_rom_header *rom_header,
142 struct pci_rom_header **ram_headerp)
143{
144 struct pci_rom_data *rom_data;
145 unsigned int rom_size;
146 unsigned int image_size = 0;
147 void *target;
148
149 do {
150 /* Get next image, until we see an x86 version */
151 rom_header = (struct pci_rom_header *)((void *)rom_header +
152 image_size);
153
154 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glassdfca4462014-12-29 19:32:23 -0700155 le16_to_cpu(rom_header->data));
Simon Glassf87bbff2014-11-14 20:56:33 -0700156
Simon Glassdfca4462014-12-29 19:32:23 -0700157 image_size = le16_to_cpu(rom_data->ilen) * 512;
158 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glassf87bbff2014-11-14 20:56:33 -0700159
160 if (rom_data->type != 0)
161 return -EACCES;
162
163 rom_size = rom_header->size * 512;
164
Simon Glass1b6b9b92014-12-29 19:32:24 -0700165#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glassf87bbff2014-11-14 20:56:33 -0700166 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glass1b6b9b92014-12-29 19:32:24 -0700167#else
168 target = (void *)malloc(rom_size);
169 if (!target)
170 return -ENOMEM;
171#endif
Simon Glassf87bbff2014-11-14 20:56:33 -0700172 if (target != rom_header) {
Simon Glassf6898082015-01-01 16:18:01 -0700173 ulong start = get_timer(0);
174
Simon Glassf87bbff2014-11-14 20:56:33 -0700175 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
176 rom_header, target, rom_size);
177 memcpy(target, rom_header, rom_size);
178 if (memcmp(target, rom_header, rom_size)) {
179 printf("VGA ROM copy failed\n");
180 return -EFAULT;
181 }
Simon Glassf6898082015-01-01 16:18:01 -0700182 debug("Copy took %lums\n", get_timer(start));
Simon Glassf87bbff2014-11-14 20:56:33 -0700183 }
184 *ram_headerp = target;
185
186 return 0;
187}
188
189static struct vbe_mode_info mode_info;
190
191int vbe_get_video_info(struct graphic_device *gdev)
192{
193#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
194 struct vesa_mode_info *vesa = &mode_info.vesa;
195
196 gdev->winSizeX = vesa->x_resolution;
197 gdev->winSizeY = vesa->y_resolution;
198
199 gdev->plnSizeX = vesa->x_resolution;
200 gdev->plnSizeY = vesa->y_resolution;
201
202 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
203
204 switch (vesa->bits_per_pixel) {
205 case 24:
206 gdev->gdfIndex = GDF_32BIT_X888RGB;
207 break;
208 case 16:
209 gdev->gdfIndex = GDF_16BIT_565RGB;
210 break;
211 default:
212 gdev->gdfIndex = GDF__8BIT_INDEX;
213 break;
214 }
215
216 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
217 gdev->pciBase = vesa->phys_base_ptr;
218
219 gdev->frameAdrs = vesa->phys_base_ptr;
220 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
221
222 gdev->vprBase = vesa->phys_base_ptr;
223 gdev->cprBase = vesa->phys_base_ptr;
224
Simon Glassed33cb82015-01-01 16:18:00 -0700225 return gdev->winSizeX ? 0 : -ENOSYS;
Simon Glassf87bbff2014-11-14 20:56:33 -0700226#else
227 return -ENOSYS;
228#endif
229}
230
231int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate)
232{
233 struct pci_rom_header *rom, *ram;
234 int vesa_mode = -1;
235 uint16_t class;
236 int ret;
237
238 /* Only execute VGA ROMs */
239 pci_read_config_word(dev, PCI_CLASS_DEVICE, &class);
240 if ((class ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
241 debug("%s: Class %#x, should be %#x\n", __func__, class,
242 PCI_CLASS_DISPLAY_VGA);
243 return -ENODEV;
244 }
245
246 if (!should_load_oprom(dev))
247 return -ENXIO;
248
249 ret = pci_rom_probe(dev, class, &rom);
250 if (ret)
251 return ret;
252
253 ret = pci_rom_load(class, rom, &ram);
254 if (ret)
255 return ret;
256
257 if (!board_should_run_oprom(dev))
258 return -ENXIO;
259
260#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
261 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
262 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
263#endif
Simon Glassc49a8f82015-01-01 16:18:05 -0700264 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glassf87bbff2014-11-14 20:56:33 -0700265 if (emulate) {
266#ifdef CONFIG_BIOSEMU
267 BE_VGAInfo *info;
268
269 ret = biosemu_setup(dev, &info);
270 if (ret)
271 return ret;
272 biosemu_set_interrupt_handler(0x15, int15_handler);
273 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true,
274 vesa_mode, &mode_info);
275 if (ret)
276 return ret;
277#else
278 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
279 return -ENOSYS;
280#endif
281 } else {
282#ifdef CONFIG_X86
283 bios_set_interrupt_handler(0x15, int15_handler);
284
285 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
286 &mode_info);
287#else
288 printf("BIOS native execution is only available on x86\n");
289 return -ENOSYS;
290#endif
291 }
Simon Glassc49a8f82015-01-01 16:18:05 -0700292 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glassf87bbff2014-11-14 20:56:33 -0700293
294 return 0;
295}