Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 Google, Inc |
| 4 | * |
| 5 | * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c). |
| 6 | * |
| 7 | * Modifications are: |
| 8 | * Copyright (C) 2003-2004 Linux Networx |
| 9 | * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx) |
| 10 | * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com> |
| 11 | * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov> |
| 12 | * Copyright (C) 2005-2006 Tyan |
| 13 | * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) |
| 14 | * Copyright (C) 2005-2009 coresystems GmbH |
| 15 | * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) |
| 16 | * |
| 17 | * PCI Bus Services, see include/linux/pci.h for further explanation. |
| 18 | * |
| 19 | * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter, |
| 20 | * David Mosberger-Tang |
| 21 | * |
| 22 | * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 23 | */ |
| 24 | |
Simon Glass | 3ed840c | 2020-07-02 21:12:30 -0600 | [diff] [blame] | 25 | #define LOG_CATEGORY UCLASS_PCI |
| 26 | |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 27 | #include <common.h> |
| 28 | #include <bios_emul.h> |
Simon Glass | 1ea9789 | 2020-05-10 11:40:00 -0600 | [diff] [blame] | 29 | #include <bootstage.h> |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 30 | #include <dm.h> |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 31 | #include <errno.h> |
Simon Glass | da25eff | 2019-12-28 10:44:56 -0700 | [diff] [blame] | 32 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 33 | #include <log.h> |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 34 | #include <malloc.h> |
| 35 | #include <pci.h> |
| 36 | #include <pci_rom.h> |
Simon Glass | ec86bc6 | 2022-07-30 15:52:04 -0600 | [diff] [blame] | 37 | #include <vesa.h> |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 38 | #include <video.h> |
Simon Glass | 5046109 | 2020-04-08 16:57:35 -0600 | [diff] [blame] | 39 | #include <acpi/acpi_s3.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 40 | #include <asm/global_data.h> |
Bin Meng | f6d504f | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 41 | #include <linux/screen_info.h> |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 42 | |
Bin Meng | 62a8f7d | 2017-04-21 07:24:46 -0700 | [diff] [blame] | 43 | DECLARE_GLOBAL_DATA_PTR; |
Bin Meng | 62a8f7d | 2017-04-21 07:24:46 -0700 | [diff] [blame] | 44 | |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 45 | __weak bool board_should_run_oprom(struct udevice *dev) |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 46 | { |
Bin Meng | 62a8f7d | 2017-04-21 07:24:46 -0700 | [diff] [blame] | 47 | #if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME) |
| 48 | if (gd->arch.prev_sleep_state == ACPI_S3) { |
| 49 | if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN)) |
| 50 | return true; |
| 51 | else |
| 52 | return false; |
| 53 | } |
| 54 | #endif |
| 55 | |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 56 | return true; |
| 57 | } |
| 58 | |
Bin Meng | f49c485 | 2016-06-14 02:02:40 -0700 | [diff] [blame] | 59 | __weak bool board_should_load_oprom(struct udevice *dev) |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 60 | { |
Bin Meng | 0ea6bcb | 2016-06-14 02:02:39 -0700 | [diff] [blame] | 61 | return true; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | __weak uint32_t board_map_oprom_vendev(uint32_t vendev) |
| 65 | { |
| 66 | return vendev; |
| 67 | } |
| 68 | |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 69 | static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 70 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 71 | struct pci_child_plat *pplat = dev_get_parent_plat(dev); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 72 | struct pci_rom_header *rom_header; |
| 73 | struct pci_rom_data *rom_data; |
Simon Glass | dfca446 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 74 | u16 rom_vendor, rom_device; |
Bin Meng | 932f80e | 2015-04-24 15:48:03 +0800 | [diff] [blame] | 75 | u32 rom_class; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 76 | u32 vendev; |
| 77 | u32 mapped_vendev; |
| 78 | u32 rom_address; |
| 79 | |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 80 | vendev = pplat->vendor << 16 | pplat->device; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 81 | mapped_vendev = board_map_oprom_vendev(vendev); |
| 82 | if (vendev != mapped_vendev) |
| 83 | debug("Device ID mapped to %#08x\n", mapped_vendev); |
| 84 | |
Bin Meng | 4de3886 | 2015-07-06 16:31:33 +0800 | [diff] [blame] | 85 | #ifdef CONFIG_VGA_BIOS_ADDR |
| 86 | rom_address = CONFIG_VGA_BIOS_ADDR; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 87 | #else |
Simon Glass | 1c1695b | 2015-01-14 21:37:04 -0700 | [diff] [blame] | 88 | |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 89 | dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 90 | if (rom_address == 0x00000000 || rom_address == 0xffffffff) { |
| 91 | debug("%s: rom_address=%x\n", __func__, rom_address); |
| 92 | return -ENOENT; |
| 93 | } |
| 94 | |
| 95 | /* Enable expansion ROM address decoding. */ |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 96 | dm_pci_write_config32(dev, PCI_ROM_ADDRESS, |
| 97 | rom_address | PCI_ROM_ADDRESS_ENABLE); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 98 | #endif |
| 99 | debug("Option ROM address %x\n", rom_address); |
Minghuan Lian | f40ad9f | 2015-01-22 13:21:55 +0800 | [diff] [blame] | 100 | rom_header = (struct pci_rom_header *)(unsigned long)rom_address; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 101 | |
| 102 | debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n", |
Simon Glass | dfca446 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 103 | le16_to_cpu(rom_header->signature), |
| 104 | rom_header->size * 512, le16_to_cpu(rom_header->data)); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 105 | |
Simon Glass | dfca446 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 106 | if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) { |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 107 | printf("Incorrect expansion ROM header signature %04x\n", |
Simon Glass | dfca446 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 108 | le16_to_cpu(rom_header->signature)); |
Bin Meng | a966473 | 2015-07-08 13:06:41 +0800 | [diff] [blame] | 109 | #ifndef CONFIG_VGA_BIOS_ADDR |
| 110 | /* Disable expansion ROM address decoding */ |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 111 | dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address); |
Bin Meng | a966473 | 2015-07-08 13:06:41 +0800 | [diff] [blame] | 112 | #endif |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 113 | return -EINVAL; |
| 114 | } |
| 115 | |
Simon Glass | dfca446 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 116 | rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data)); |
| 117 | rom_vendor = le16_to_cpu(rom_data->vendor); |
| 118 | rom_device = le16_to_cpu(rom_data->device); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 119 | |
| 120 | debug("PCI ROM image, vendor ID %04x, device ID %04x,\n", |
Simon Glass | dfca446 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 121 | rom_vendor, rom_device); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 122 | |
| 123 | /* If the device id is mapped, a mismatch is expected */ |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 124 | if ((pplat->vendor != rom_vendor || pplat->device != rom_device) && |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 125 | (vendev == mapped_vendev)) { |
| 126 | printf("ID mismatch: vendor ID %04x, device ID %04x\n", |
Simon Glass | dfca446 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 127 | rom_vendor, rom_device); |
Simon Glass | 02db217 | 2014-12-29 19:32:27 -0700 | [diff] [blame] | 128 | /* Continue anyway */ |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 129 | } |
| 130 | |
Bin Meng | 932f80e | 2015-04-24 15:48:03 +0800 | [diff] [blame] | 131 | rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo; |
| 132 | debug("PCI ROM image, Class Code %06x, Code Type %02x\n", |
| 133 | rom_class, rom_data->type); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 134 | |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 135 | if (pplat->class != rom_class) { |
Bin Meng | 932f80e | 2015-04-24 15:48:03 +0800 | [diff] [blame] | 136 | debug("Class Code mismatch ROM %06x, dev %06x\n", |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 137 | rom_class, pplat->class); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 138 | } |
| 139 | *hdrp = rom_header; |
| 140 | |
| 141 | return 0; |
| 142 | } |
| 143 | |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 144 | /** |
| 145 | * pci_rom_load() - Load a ROM image and return a pointer to it |
| 146 | * |
| 147 | * @rom_header: Pointer to ROM image |
| 148 | * @ram_headerp: Returns a pointer to the image in RAM |
| 149 | * @allocedp: Returns true if @ram_headerp was allocated and needs |
| 150 | * to be freed |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 151 | * Return: 0 if OK, -ve on error. Note that @allocedp is set up regardless of |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 152 | * the error state. Even if this function returns an error, it may have |
| 153 | * allocated memory. |
| 154 | */ |
| 155 | static int pci_rom_load(struct pci_rom_header *rom_header, |
| 156 | struct pci_rom_header **ram_headerp, bool *allocedp) |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 157 | { |
| 158 | struct pci_rom_data *rom_data; |
| 159 | unsigned int rom_size; |
| 160 | unsigned int image_size = 0; |
| 161 | void *target; |
| 162 | |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 163 | *allocedp = false; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 164 | do { |
| 165 | /* Get next image, until we see an x86 version */ |
| 166 | rom_header = (struct pci_rom_header *)((void *)rom_header + |
| 167 | image_size); |
| 168 | |
| 169 | rom_data = (struct pci_rom_data *)((void *)rom_header + |
Simon Glass | dfca446 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 170 | le16_to_cpu(rom_header->data)); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 171 | |
Simon Glass | dfca446 | 2014-12-29 19:32:23 -0700 | [diff] [blame] | 172 | image_size = le16_to_cpu(rom_data->ilen) * 512; |
| 173 | } while ((rom_data->type != 0) && (rom_data->indicator == 0)); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 174 | |
| 175 | if (rom_data->type != 0) |
| 176 | return -EACCES; |
| 177 | |
| 178 | rom_size = rom_header->size * 512; |
| 179 | |
Simon Glass | 1b6b9b9 | 2014-12-29 19:32:24 -0700 | [diff] [blame] | 180 | #ifdef PCI_VGA_RAM_IMAGE_START |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 181 | target = (void *)PCI_VGA_RAM_IMAGE_START; |
Simon Glass | 1b6b9b9 | 2014-12-29 19:32:24 -0700 | [diff] [blame] | 182 | #else |
| 183 | target = (void *)malloc(rom_size); |
| 184 | if (!target) |
| 185 | return -ENOMEM; |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 186 | *allocedp = true; |
Simon Glass | 1b6b9b9 | 2014-12-29 19:32:24 -0700 | [diff] [blame] | 187 | #endif |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 188 | if (target != rom_header) { |
Simon Glass | f689808 | 2015-01-01 16:18:01 -0700 | [diff] [blame] | 189 | ulong start = get_timer(0); |
| 190 | |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 191 | debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n", |
| 192 | rom_header, target, rom_size); |
| 193 | memcpy(target, rom_header, rom_size); |
| 194 | if (memcmp(target, rom_header, rom_size)) { |
| 195 | printf("VGA ROM copy failed\n"); |
| 196 | return -EFAULT; |
| 197 | } |
Simon Glass | f689808 | 2015-01-01 16:18:01 -0700 | [diff] [blame] | 198 | debug("Copy took %lums\n", get_timer(start)); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 199 | } |
| 200 | *ram_headerp = target; |
| 201 | |
| 202 | return 0; |
| 203 | } |
| 204 | |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 205 | struct vesa_state mode_info; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 206 | |
Bin Meng | f6d504f | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 207 | void setup_video(struct screen_info *screen_info) |
| 208 | { |
Bin Meng | f6d504f | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 209 | struct vesa_mode_info *vesa = &mode_info.vesa; |
| 210 | |
Bin Meng | e751844 | 2015-07-30 03:49:13 -0700 | [diff] [blame] | 211 | /* Sanity test on VESA parameters */ |
| 212 | if (!vesa->x_resolution || !vesa->y_resolution) |
| 213 | return; |
| 214 | |
Bin Meng | f6d504f | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 215 | screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB; |
| 216 | |
| 217 | screen_info->lfb_width = vesa->x_resolution; |
| 218 | screen_info->lfb_height = vesa->y_resolution; |
| 219 | screen_info->lfb_depth = vesa->bits_per_pixel; |
| 220 | screen_info->lfb_linelength = vesa->bytes_per_scanline; |
| 221 | screen_info->lfb_base = vesa->phys_base_ptr; |
| 222 | screen_info->lfb_size = |
| 223 | ALIGN(screen_info->lfb_linelength * screen_info->lfb_height, |
| 224 | 65536); |
| 225 | screen_info->lfb_size >>= 16; |
| 226 | screen_info->red_size = vesa->red_mask_size; |
| 227 | screen_info->red_pos = vesa->red_mask_pos; |
| 228 | screen_info->green_size = vesa->green_mask_size; |
| 229 | screen_info->green_pos = vesa->green_mask_pos; |
| 230 | screen_info->blue_size = vesa->blue_mask_size; |
| 231 | screen_info->blue_pos = vesa->blue_mask_pos; |
| 232 | screen_info->rsvd_size = vesa->reserved_mask_size; |
| 233 | screen_info->rsvd_pos = vesa->reserved_mask_pos; |
Bin Meng | f6d504f | 2015-07-06 16:31:36 +0800 | [diff] [blame] | 234 | } |
| 235 | |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 236 | int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), |
| 237 | int exec_method) |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 238 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 239 | struct pci_child_plat *pplat = dev_get_parent_plat(dev); |
Andreas Bießmann | cb8aefa | 2016-02-16 23:29:31 +0100 | [diff] [blame] | 240 | struct pci_rom_header *rom = NULL, *ram = NULL; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 241 | int vesa_mode = -1; |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 242 | bool emulate, alloced; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 243 | int ret; |
| 244 | |
| 245 | /* Only execute VGA ROMs */ |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 246 | if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) { |
| 247 | debug("%s: Class %#x, should be %#x\n", __func__, pplat->class, |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 248 | PCI_CLASS_DISPLAY_VGA); |
| 249 | return -ENODEV; |
| 250 | } |
| 251 | |
Bin Meng | f49c485 | 2016-06-14 02:02:40 -0700 | [diff] [blame] | 252 | if (!board_should_load_oprom(dev)) |
Simon Glass | baac4eb | 2018-10-01 12:22:44 -0600 | [diff] [blame] | 253 | return log_msg_ret("Should not load OPROM", -ENXIO); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 254 | |
Simon Glass | f9d94d3 | 2015-11-29 13:17:57 -0700 | [diff] [blame] | 255 | ret = pci_rom_probe(dev, &rom); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 256 | if (ret) |
Simon Glass | 528d483 | 2023-07-15 21:38:57 -0600 | [diff] [blame] | 257 | return log_msg_ret("pro", ret); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 258 | |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 259 | ret = pci_rom_load(rom, &ram, &alloced); |
Simon Glass | 528d483 | 2023-07-15 21:38:57 -0600 | [diff] [blame] | 260 | if (ret) { |
| 261 | ret = log_msg_ret("ld", ret); |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 262 | goto err; |
Simon Glass | 528d483 | 2023-07-15 21:38:57 -0600 | [diff] [blame] | 263 | } |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 264 | |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 265 | if (!board_should_run_oprom(dev)) { |
Simon Glass | 528d483 | 2023-07-15 21:38:57 -0600 | [diff] [blame] | 266 | ret = log_msg_ret("run", -ENXIO); |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 267 | goto err; |
| 268 | } |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 269 | |
| 270 | #if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \ |
| 271 | defined(CONFIG_FRAMEBUFFER_VESA_MODE) |
| 272 | vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE; |
| 273 | #endif |
Simon Glass | c49a8f8 | 2015-01-01 16:18:05 -0700 | [diff] [blame] | 274 | debug("Selected vesa mode %#x\n", vesa_mode); |
Simon Glass | 684818d | 2015-01-27 22:13:34 -0700 | [diff] [blame] | 275 | |
| 276 | if (exec_method & PCI_ROM_USE_NATIVE) { |
| 277 | #ifdef CONFIG_X86 |
| 278 | emulate = false; |
| 279 | #else |
| 280 | if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) { |
| 281 | printf("BIOS native execution is only available on x86\n"); |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 282 | ret = -ENOSYS; |
| 283 | goto err; |
Simon Glass | 684818d | 2015-01-27 22:13:34 -0700 | [diff] [blame] | 284 | } |
| 285 | emulate = true; |
| 286 | #endif |
| 287 | } else { |
| 288 | #ifdef CONFIG_BIOSEMU |
| 289 | emulate = true; |
| 290 | #else |
| 291 | if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) { |
| 292 | printf("BIOS emulation not available - see CONFIG_BIOSEMU\n"); |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 293 | ret = -ENOSYS; |
| 294 | goto err; |
Simon Glass | 684818d | 2015-01-27 22:13:34 -0700 | [diff] [blame] | 295 | } |
| 296 | emulate = false; |
| 297 | #endif |
| 298 | } |
| 299 | |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 300 | if (emulate) { |
Simon Glass | ee95ec1 | 2023-07-15 21:38:58 -0600 | [diff] [blame^] | 301 | if (CONFIG_IS_ENABLED(BIOSEMU)) { |
| 302 | BE_VGAInfo *info; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 303 | |
Simon Glass | ee95ec1 | 2023-07-15 21:38:58 -0600 | [diff] [blame^] | 304 | log_debug("Running video BIOS with emulator..."); |
| 305 | ret = biosemu_setup(dev, &info); |
| 306 | if (ret) |
| 307 | goto err; |
| 308 | biosemu_set_interrupt_handler(0x15, int15_handler); |
| 309 | ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, |
| 310 | true, vesa_mode, &mode_info); |
| 311 | log_debug("done\n"); |
| 312 | if (ret) |
| 313 | goto err; |
| 314 | } |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 315 | } else { |
Simon Glass | 69c5b2d | 2019-04-25 21:59:08 -0600 | [diff] [blame] | 316 | #if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL) |
Simon Glass | 528d483 | 2023-07-15 21:38:57 -0600 | [diff] [blame] | 317 | log_debug("Running video BIOS..."); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 318 | bios_set_interrupt_handler(0x15, int15_handler); |
| 319 | |
Simon Glass | a063086 | 2015-11-29 13:17:58 -0700 | [diff] [blame] | 320 | bios_run_on_x86(dev, (unsigned long)ram, vesa_mode, |
| 321 | &mode_info); |
Simon Glass | 528d483 | 2023-07-15 21:38:57 -0600 | [diff] [blame] | 322 | log_debug("done\n"); |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 323 | #endif |
| 324 | } |
Simon Glass | c49a8f8 | 2015-01-01 16:18:05 -0700 | [diff] [blame] | 325 | debug("Final vesa mode %#x\n", mode_info.video_mode); |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 326 | ret = 0; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 327 | |
Simon Glass | 7548d64 | 2016-01-15 05:23:22 -0700 | [diff] [blame] | 328 | err: |
| 329 | if (alloced) |
| 330 | free(ram); |
| 331 | return ret; |
Simon Glass | f87bbff | 2014-11-14 20:56:33 -0700 | [diff] [blame] | 332 | } |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 333 | |
Simon Glass | c1e9eab | 2023-03-10 12:47:13 -0800 | [diff] [blame] | 334 | int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb, |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 335 | struct video_priv *uc_priv, |
| 336 | struct video_uc_plat *plat) |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 337 | { |
| 338 | if (!vesa->x_resolution) |
Simon Glass | baac4eb | 2018-10-01 12:22:44 -0600 | [diff] [blame] | 339 | return log_msg_ret("No x resolution", -ENXIO); |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 340 | uc_priv->xsize = vesa->x_resolution; |
| 341 | uc_priv->ysize = vesa->y_resolution; |
Simon Glass | 7d18673 | 2018-11-29 15:08:52 -0700 | [diff] [blame] | 342 | uc_priv->line_length = vesa->bytes_per_scanline; |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 343 | switch (vesa->bits_per_pixel) { |
| 344 | case 32: |
| 345 | case 24: |
| 346 | uc_priv->bpix = VIDEO_BPP32; |
| 347 | break; |
| 348 | case 16: |
| 349 | uc_priv->bpix = VIDEO_BPP16; |
| 350 | break; |
| 351 | default: |
| 352 | return -EPROTONOSUPPORT; |
| 353 | } |
Simon Glass | 3ed840c | 2020-07-02 21:12:30 -0600 | [diff] [blame] | 354 | |
| 355 | /* Use double buffering if enabled */ |
Simon Glass | 98145af | 2021-03-15 18:00:26 +1300 | [diff] [blame] | 356 | if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->base) |
Simon Glass | c1e9eab | 2023-03-10 12:47:13 -0800 | [diff] [blame] | 357 | plat->copy_base = fb; |
Simon Glass | 98145af | 2021-03-15 18:00:26 +1300 | [diff] [blame] | 358 | else |
Simon Glass | c1e9eab | 2023-03-10 12:47:13 -0800 | [diff] [blame] | 359 | plat->base = fb; |
Simon Glass | 3ed840c | 2020-07-02 21:12:30 -0600 | [diff] [blame] | 360 | log_debug("base = %lx, copy_base = %lx\n", plat->base, plat->copy_base); |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 361 | plat->size = vesa->bytes_per_scanline * vesa->y_resolution; |
| 362 | |
| 363 | return 0; |
| 364 | } |
| 365 | |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 366 | int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void)) |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 367 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 368 | struct video_uc_plat *plat = dev_get_uclass_plat(dev); |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 369 | struct video_priv *uc_priv = dev_get_uclass_priv(dev); |
| 370 | int ret; |
| 371 | |
| 372 | /* If we are running from EFI or coreboot, this can't work */ |
Bin Meng | 57b65e6 | 2016-10-09 04:14:12 -0700 | [diff] [blame] | 373 | if (!ll_boot_init()) { |
| 374 | printf("Not available (previous bootloader prevents it)\n"); |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 375 | return -EPERM; |
Bin Meng | 57b65e6 | 2016-10-09 04:14:12 -0700 | [diff] [blame] | 376 | } |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 377 | bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display"); |
| 378 | ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE | |
| 379 | PCI_ROM_ALLOW_FALLBACK); |
| 380 | bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD); |
| 381 | if (ret) { |
| 382 | debug("failed to run video BIOS: %d\n", ret); |
| 383 | return ret; |
| 384 | } |
| 385 | |
Simon Glass | c1e9eab | 2023-03-10 12:47:13 -0800 | [diff] [blame] | 386 | ret = vesa_setup_video_priv(&mode_info.vesa, |
| 387 | mode_info.vesa.phys_base_ptr, uc_priv, |
| 388 | plat); |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 389 | if (ret) { |
Simon Glass | 3ed840c | 2020-07-02 21:12:30 -0600 | [diff] [blame] | 390 | if (ret == -ENFILE) { |
| 391 | /* |
| 392 | * See video-uclass.c for how to set up reserved memory |
| 393 | * in your video driver |
| 394 | */ |
| 395 | log_err("CONFIG_VIDEO_COPY enabled but driver '%s' set up no reserved memory\n", |
| 396 | dev->driver->name); |
| 397 | } |
| 398 | |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 399 | debug("No video mode configured\n"); |
| 400 | return ret; |
| 401 | } |
| 402 | |
Bin Meng | be4551e | 2018-04-11 22:02:18 -0700 | [diff] [blame] | 403 | printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize, |
Bin Meng | 57b65e6 | 2016-10-09 04:14:12 -0700 | [diff] [blame] | 404 | mode_info.vesa.bits_per_pixel); |
| 405 | |
Simon Glass | 4ef5d2d | 2016-10-05 20:42:17 -0600 | [diff] [blame] | 406 | return 0; |
| 407 | } |