blob: 228ab7fca72897d71293437b2ff499f839a1468d [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glassf87bbff2014-11-14 20:56:33 -07002/*
3 * Copyright (C) 2014 Google, Inc
4 *
5 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
6 *
7 * Modifications are:
8 * Copyright (C) 2003-2004 Linux Networx
9 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
10 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
11 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
12 * Copyright (C) 2005-2006 Tyan
13 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
14 * Copyright (C) 2005-2009 coresystems GmbH
15 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
16 *
17 * PCI Bus Services, see include/linux/pci.h for further explanation.
18 *
19 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
20 * David Mosberger-Tang
21 *
22 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
Simon Glassf87bbff2014-11-14 20:56:33 -070023 */
24
Simon Glass3ed840c2020-07-02 21:12:30 -060025#define LOG_CATEGORY UCLASS_PCI
26
Simon Glassf87bbff2014-11-14 20:56:33 -070027#include <common.h>
28#include <bios_emul.h>
Simon Glass1ea97892020-05-10 11:40:00 -060029#include <bootstage.h>
Simon Glassf9d94d32015-11-29 13:17:57 -070030#include <dm.h>
Simon Glassf87bbff2014-11-14 20:56:33 -070031#include <errno.h>
Simon Glassda25eff2019-12-28 10:44:56 -070032#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060033#include <log.h>
Simon Glassf87bbff2014-11-14 20:56:33 -070034#include <malloc.h>
35#include <pci.h>
36#include <pci_rom.h>
Simon Glassec86bc62022-07-30 15:52:04 -060037#include <vesa.h>
Simon Glass4ef5d2d2016-10-05 20:42:17 -060038#include <video.h>
Simon Glass50461092020-04-08 16:57:35 -060039#include <acpi/acpi_s3.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060040#include <asm/global_data.h>
Bin Mengf6d504f2015-07-06 16:31:36 +080041#include <linux/screen_info.h>
Simon Glassf87bbff2014-11-14 20:56:33 -070042
Bin Meng62a8f7d2017-04-21 07:24:46 -070043DECLARE_GLOBAL_DATA_PTR;
Bin Meng62a8f7d2017-04-21 07:24:46 -070044
Simon Glassf9d94d32015-11-29 13:17:57 -070045__weak bool board_should_run_oprom(struct udevice *dev)
Simon Glassf87bbff2014-11-14 20:56:33 -070046{
Bin Meng62a8f7d2017-04-21 07:24:46 -070047#if defined(CONFIG_X86) && defined(CONFIG_HAVE_ACPI_RESUME)
48 if (gd->arch.prev_sleep_state == ACPI_S3) {
49 if (IS_ENABLED(CONFIG_S3_VGA_ROM_RUN))
50 return true;
51 else
52 return false;
53 }
54#endif
55
Simon Glassf87bbff2014-11-14 20:56:33 -070056 return true;
57}
58
Bin Mengf49c4852016-06-14 02:02:40 -070059__weak bool board_should_load_oprom(struct udevice *dev)
Simon Glassf87bbff2014-11-14 20:56:33 -070060{
Bin Meng0ea6bcb2016-06-14 02:02:39 -070061 return true;
Simon Glassf87bbff2014-11-14 20:56:33 -070062}
63
64__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
65{
66 return vendev;
67}
68
Simon Glassf9d94d32015-11-29 13:17:57 -070069static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp)
Simon Glassf87bbff2014-11-14 20:56:33 -070070{
Simon Glassb75b15b2020-12-03 16:55:23 -070071 struct pci_child_plat *pplat = dev_get_parent_plat(dev);
Simon Glassf87bbff2014-11-14 20:56:33 -070072 struct pci_rom_header *rom_header;
73 struct pci_rom_data *rom_data;
Simon Glassdfca4462014-12-29 19:32:23 -070074 u16 rom_vendor, rom_device;
Bin Meng932f80e2015-04-24 15:48:03 +080075 u32 rom_class;
Simon Glassf87bbff2014-11-14 20:56:33 -070076 u32 vendev;
77 u32 mapped_vendev;
78 u32 rom_address;
79
Simon Glassf9d94d32015-11-29 13:17:57 -070080 vendev = pplat->vendor << 16 | pplat->device;
Simon Glassf87bbff2014-11-14 20:56:33 -070081 mapped_vendev = board_map_oprom_vendev(vendev);
82 if (vendev != mapped_vendev)
83 debug("Device ID mapped to %#08x\n", mapped_vendev);
84
Bin Meng4de38862015-07-06 16:31:33 +080085#ifdef CONFIG_VGA_BIOS_ADDR
86 rom_address = CONFIG_VGA_BIOS_ADDR;
Simon Glassf87bbff2014-11-14 20:56:33 -070087#else
Simon Glass1c1695b2015-01-14 21:37:04 -070088
Simon Glassf9d94d32015-11-29 13:17:57 -070089 dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address);
Simon Glassf87bbff2014-11-14 20:56:33 -070090 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
91 debug("%s: rom_address=%x\n", __func__, rom_address);
92 return -ENOENT;
93 }
94
95 /* Enable expansion ROM address decoding. */
Simon Glassf9d94d32015-11-29 13:17:57 -070096 dm_pci_write_config32(dev, PCI_ROM_ADDRESS,
97 rom_address | PCI_ROM_ADDRESS_ENABLE);
Simon Glassf87bbff2014-11-14 20:56:33 -070098#endif
99 debug("Option ROM address %x\n", rom_address);
Minghuan Lianf40ad9f2015-01-22 13:21:55 +0800100 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glassf87bbff2014-11-14 20:56:33 -0700101
102 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700103 le16_to_cpu(rom_header->signature),
104 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glassf87bbff2014-11-14 20:56:33 -0700105
Simon Glassdfca4462014-12-29 19:32:23 -0700106 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glassf87bbff2014-11-14 20:56:33 -0700107 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700108 le16_to_cpu(rom_header->signature));
Bin Menga9664732015-07-08 13:06:41 +0800109#ifndef CONFIG_VGA_BIOS_ADDR
110 /* Disable expansion ROM address decoding */
Simon Glassf9d94d32015-11-29 13:17:57 -0700111 dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address);
Bin Menga9664732015-07-08 13:06:41 +0800112#endif
Simon Glassf87bbff2014-11-14 20:56:33 -0700113 return -EINVAL;
114 }
115
Simon Glassdfca4462014-12-29 19:32:23 -0700116 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
117 rom_vendor = le16_to_cpu(rom_data->vendor);
118 rom_device = le16_to_cpu(rom_data->device);
Simon Glassf87bbff2014-11-14 20:56:33 -0700119
120 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700121 rom_vendor, rom_device);
Simon Glassf87bbff2014-11-14 20:56:33 -0700122
123 /* If the device id is mapped, a mismatch is expected */
Simon Glassf9d94d32015-11-29 13:17:57 -0700124 if ((pplat->vendor != rom_vendor || pplat->device != rom_device) &&
Simon Glassf87bbff2014-11-14 20:56:33 -0700125 (vendev == mapped_vendev)) {
126 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700127 rom_vendor, rom_device);
Simon Glass02db2172014-12-29 19:32:27 -0700128 /* Continue anyway */
Simon Glassf87bbff2014-11-14 20:56:33 -0700129 }
130
Bin Meng932f80e2015-04-24 15:48:03 +0800131 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
132 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
133 rom_class, rom_data->type);
Simon Glassf87bbff2014-11-14 20:56:33 -0700134
Simon Glassf9d94d32015-11-29 13:17:57 -0700135 if (pplat->class != rom_class) {
Bin Meng932f80e2015-04-24 15:48:03 +0800136 debug("Class Code mismatch ROM %06x, dev %06x\n",
Simon Glassf9d94d32015-11-29 13:17:57 -0700137 rom_class, pplat->class);
Simon Glassf87bbff2014-11-14 20:56:33 -0700138 }
139 *hdrp = rom_header;
140
141 return 0;
142}
143
Simon Glass7548d642016-01-15 05:23:22 -0700144/**
145 * pci_rom_load() - Load a ROM image and return a pointer to it
146 *
147 * @rom_header: Pointer to ROM image
148 * @ram_headerp: Returns a pointer to the image in RAM
149 * @allocedp: Returns true if @ram_headerp was allocated and needs
150 * to be freed
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100151 * Return: 0 if OK, -ve on error. Note that @allocedp is set up regardless of
Simon Glass7548d642016-01-15 05:23:22 -0700152 * the error state. Even if this function returns an error, it may have
153 * allocated memory.
154 */
155static int pci_rom_load(struct pci_rom_header *rom_header,
156 struct pci_rom_header **ram_headerp, bool *allocedp)
Simon Glassf87bbff2014-11-14 20:56:33 -0700157{
158 struct pci_rom_data *rom_data;
159 unsigned int rom_size;
160 unsigned int image_size = 0;
161 void *target;
162
Simon Glass7548d642016-01-15 05:23:22 -0700163 *allocedp = false;
Simon Glassf87bbff2014-11-14 20:56:33 -0700164 do {
165 /* Get next image, until we see an x86 version */
166 rom_header = (struct pci_rom_header *)((void *)rom_header +
167 image_size);
168
169 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glassdfca4462014-12-29 19:32:23 -0700170 le16_to_cpu(rom_header->data));
Simon Glassf87bbff2014-11-14 20:56:33 -0700171
Simon Glassdfca4462014-12-29 19:32:23 -0700172 image_size = le16_to_cpu(rom_data->ilen) * 512;
173 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glassf87bbff2014-11-14 20:56:33 -0700174
175 if (rom_data->type != 0)
176 return -EACCES;
177
178 rom_size = rom_header->size * 512;
179
Simon Glass1b6b9b92014-12-29 19:32:24 -0700180#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glassf87bbff2014-11-14 20:56:33 -0700181 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glass1b6b9b92014-12-29 19:32:24 -0700182#else
183 target = (void *)malloc(rom_size);
184 if (!target)
185 return -ENOMEM;
Simon Glass7548d642016-01-15 05:23:22 -0700186 *allocedp = true;
Simon Glass1b6b9b92014-12-29 19:32:24 -0700187#endif
Simon Glassf87bbff2014-11-14 20:56:33 -0700188 if (target != rom_header) {
Simon Glassf6898082015-01-01 16:18:01 -0700189 ulong start = get_timer(0);
190
Simon Glassf87bbff2014-11-14 20:56:33 -0700191 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
192 rom_header, target, rom_size);
193 memcpy(target, rom_header, rom_size);
194 if (memcmp(target, rom_header, rom_size)) {
195 printf("VGA ROM copy failed\n");
196 return -EFAULT;
197 }
Simon Glassf6898082015-01-01 16:18:01 -0700198 debug("Copy took %lums\n", get_timer(start));
Simon Glassf87bbff2014-11-14 20:56:33 -0700199 }
200 *ram_headerp = target;
201
202 return 0;
203}
204
Simon Glass5b925202022-07-30 15:52:05 -0600205struct vesa_state mode_info;
Simon Glassf87bbff2014-11-14 20:56:33 -0700206
Bin Mengf6d504f2015-07-06 16:31:36 +0800207void setup_video(struct screen_info *screen_info)
208{
Bin Mengf6d504f2015-07-06 16:31:36 +0800209 struct vesa_mode_info *vesa = &mode_info.vesa;
210
Bin Menge7518442015-07-30 03:49:13 -0700211 /* Sanity test on VESA parameters */
212 if (!vesa->x_resolution || !vesa->y_resolution)
213 return;
214
Bin Mengf6d504f2015-07-06 16:31:36 +0800215 screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB;
216
217 screen_info->lfb_width = vesa->x_resolution;
218 screen_info->lfb_height = vesa->y_resolution;
219 screen_info->lfb_depth = vesa->bits_per_pixel;
220 screen_info->lfb_linelength = vesa->bytes_per_scanline;
221 screen_info->lfb_base = vesa->phys_base_ptr;
222 screen_info->lfb_size =
223 ALIGN(screen_info->lfb_linelength * screen_info->lfb_height,
224 65536);
225 screen_info->lfb_size >>= 16;
226 screen_info->red_size = vesa->red_mask_size;
227 screen_info->red_pos = vesa->red_mask_pos;
228 screen_info->green_size = vesa->green_mask_size;
229 screen_info->green_pos = vesa->green_mask_pos;
230 screen_info->blue_size = vesa->blue_mask_size;
231 screen_info->blue_pos = vesa->blue_mask_pos;
232 screen_info->rsvd_size = vesa->reserved_mask_size;
233 screen_info->rsvd_pos = vesa->reserved_mask_pos;
Bin Mengf6d504f2015-07-06 16:31:36 +0800234}
235
Simon Glassf9d94d32015-11-29 13:17:57 -0700236int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void),
237 int exec_method)
Simon Glassf87bbff2014-11-14 20:56:33 -0700238{
Simon Glassb75b15b2020-12-03 16:55:23 -0700239 struct pci_child_plat *pplat = dev_get_parent_plat(dev);
Andreas Bießmanncb8aefa2016-02-16 23:29:31 +0100240 struct pci_rom_header *rom = NULL, *ram = NULL;
Simon Glassf87bbff2014-11-14 20:56:33 -0700241 int vesa_mode = -1;
Simon Glass7548d642016-01-15 05:23:22 -0700242 bool emulate, alloced;
Simon Glassf87bbff2014-11-14 20:56:33 -0700243 int ret;
244
245 /* Only execute VGA ROMs */
Simon Glassf9d94d32015-11-29 13:17:57 -0700246 if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
247 debug("%s: Class %#x, should be %#x\n", __func__, pplat->class,
Simon Glassf87bbff2014-11-14 20:56:33 -0700248 PCI_CLASS_DISPLAY_VGA);
249 return -ENODEV;
250 }
251
Bin Mengf49c4852016-06-14 02:02:40 -0700252 if (!board_should_load_oprom(dev))
Simon Glassbaac4eb2018-10-01 12:22:44 -0600253 return log_msg_ret("Should not load OPROM", -ENXIO);
Simon Glassf87bbff2014-11-14 20:56:33 -0700254
Simon Glassf9d94d32015-11-29 13:17:57 -0700255 ret = pci_rom_probe(dev, &rom);
Simon Glassf87bbff2014-11-14 20:56:33 -0700256 if (ret)
Simon Glass528d4832023-07-15 21:38:57 -0600257 return log_msg_ret("pro", ret);
Simon Glassf87bbff2014-11-14 20:56:33 -0700258
Simon Glass7548d642016-01-15 05:23:22 -0700259 ret = pci_rom_load(rom, &ram, &alloced);
Simon Glass528d4832023-07-15 21:38:57 -0600260 if (ret) {
261 ret = log_msg_ret("ld", ret);
Simon Glass7548d642016-01-15 05:23:22 -0700262 goto err;
Simon Glass528d4832023-07-15 21:38:57 -0600263 }
Simon Glassf87bbff2014-11-14 20:56:33 -0700264
Simon Glass7548d642016-01-15 05:23:22 -0700265 if (!board_should_run_oprom(dev)) {
Simon Glass528d4832023-07-15 21:38:57 -0600266 ret = log_msg_ret("run", -ENXIO);
Simon Glass7548d642016-01-15 05:23:22 -0700267 goto err;
268 }
Simon Glassf87bbff2014-11-14 20:56:33 -0700269
270#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
271 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
272 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
273#endif
Simon Glassc49a8f82015-01-01 16:18:05 -0700274 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glass684818d2015-01-27 22:13:34 -0700275
276 if (exec_method & PCI_ROM_USE_NATIVE) {
277#ifdef CONFIG_X86
278 emulate = false;
279#else
280 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
281 printf("BIOS native execution is only available on x86\n");
Simon Glass7548d642016-01-15 05:23:22 -0700282 ret = -ENOSYS;
283 goto err;
Simon Glass684818d2015-01-27 22:13:34 -0700284 }
285 emulate = true;
286#endif
287 } else {
288#ifdef CONFIG_BIOSEMU
289 emulate = true;
290#else
291 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
292 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
Simon Glass7548d642016-01-15 05:23:22 -0700293 ret = -ENOSYS;
294 goto err;
Simon Glass684818d2015-01-27 22:13:34 -0700295 }
296 emulate = false;
297#endif
298 }
299
Simon Glassf87bbff2014-11-14 20:56:33 -0700300 if (emulate) {
Simon Glassee95ec12023-07-15 21:38:58 -0600301 if (CONFIG_IS_ENABLED(BIOSEMU)) {
302 BE_VGAInfo *info;
Simon Glassf87bbff2014-11-14 20:56:33 -0700303
Simon Glassee95ec12023-07-15 21:38:58 -0600304 log_debug("Running video BIOS with emulator...");
305 ret = biosemu_setup(dev, &info);
306 if (ret)
307 goto err;
308 biosemu_set_interrupt_handler(0x15, int15_handler);
309 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info,
310 true, vesa_mode, &mode_info);
311 log_debug("done\n");
312 if (ret)
313 goto err;
314 }
Simon Glassf87bbff2014-11-14 20:56:33 -0700315 } else {
Simon Glass69c5b2d2019-04-25 21:59:08 -0600316#if defined(CONFIG_X86) && (CONFIG_IS_ENABLED(X86_32BIT_INIT) || CONFIG_TPL)
Simon Glass528d4832023-07-15 21:38:57 -0600317 log_debug("Running video BIOS...");
Simon Glassf87bbff2014-11-14 20:56:33 -0700318 bios_set_interrupt_handler(0x15, int15_handler);
319
Simon Glassa0630862015-11-29 13:17:58 -0700320 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
321 &mode_info);
Simon Glass528d4832023-07-15 21:38:57 -0600322 log_debug("done\n");
Simon Glassf87bbff2014-11-14 20:56:33 -0700323#endif
324 }
Simon Glassc49a8f82015-01-01 16:18:05 -0700325 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glass7548d642016-01-15 05:23:22 -0700326 ret = 0;
Simon Glassf87bbff2014-11-14 20:56:33 -0700327
Simon Glass7548d642016-01-15 05:23:22 -0700328err:
329 if (alloced)
330 free(ram);
331 return ret;
Simon Glassf87bbff2014-11-14 20:56:33 -0700332}
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600333
Simon Glassc1e9eab2023-03-10 12:47:13 -0800334int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb,
Simon Glass5b925202022-07-30 15:52:05 -0600335 struct video_priv *uc_priv,
336 struct video_uc_plat *plat)
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600337{
338 if (!vesa->x_resolution)
Simon Glassbaac4eb2018-10-01 12:22:44 -0600339 return log_msg_ret("No x resolution", -ENXIO);
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600340 uc_priv->xsize = vesa->x_resolution;
341 uc_priv->ysize = vesa->y_resolution;
Simon Glass7d186732018-11-29 15:08:52 -0700342 uc_priv->line_length = vesa->bytes_per_scanline;
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600343 switch (vesa->bits_per_pixel) {
344 case 32:
345 case 24:
346 uc_priv->bpix = VIDEO_BPP32;
347 break;
348 case 16:
349 uc_priv->bpix = VIDEO_BPP16;
350 break;
351 default:
352 return -EPROTONOSUPPORT;
353 }
Simon Glass3ed840c2020-07-02 21:12:30 -0600354
355 /* Use double buffering if enabled */
Simon Glass98145af2021-03-15 18:00:26 +1300356 if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->base)
Simon Glassc1e9eab2023-03-10 12:47:13 -0800357 plat->copy_base = fb;
Simon Glass98145af2021-03-15 18:00:26 +1300358 else
Simon Glassc1e9eab2023-03-10 12:47:13 -0800359 plat->base = fb;
Simon Glass3ed840c2020-07-02 21:12:30 -0600360 log_debug("base = %lx, copy_base = %lx\n", plat->base, plat->copy_base);
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600361 plat->size = vesa->bytes_per_scanline * vesa->y_resolution;
362
363 return 0;
364}
365
Simon Glass5b925202022-07-30 15:52:05 -0600366int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void))
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600367{
Simon Glassb75b15b2020-12-03 16:55:23 -0700368 struct video_uc_plat *plat = dev_get_uclass_plat(dev);
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600369 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
370 int ret;
371
372 /* If we are running from EFI or coreboot, this can't work */
Bin Meng57b65e62016-10-09 04:14:12 -0700373 if (!ll_boot_init()) {
374 printf("Not available (previous bootloader prevents it)\n");
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600375 return -EPERM;
Bin Meng57b65e62016-10-09 04:14:12 -0700376 }
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600377 bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display");
378 ret = dm_pci_run_vga_bios(dev, int15_handler, PCI_ROM_USE_NATIVE |
379 PCI_ROM_ALLOW_FALLBACK);
380 bootstage_accum(BOOTSTAGE_ID_ACCUM_LCD);
381 if (ret) {
382 debug("failed to run video BIOS: %d\n", ret);
383 return ret;
384 }
385
Simon Glassc1e9eab2023-03-10 12:47:13 -0800386 ret = vesa_setup_video_priv(&mode_info.vesa,
387 mode_info.vesa.phys_base_ptr, uc_priv,
388 plat);
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600389 if (ret) {
Simon Glass3ed840c2020-07-02 21:12:30 -0600390 if (ret == -ENFILE) {
391 /*
392 * See video-uclass.c for how to set up reserved memory
393 * in your video driver
394 */
395 log_err("CONFIG_VIDEO_COPY enabled but driver '%s' set up no reserved memory\n",
396 dev->driver->name);
397 }
398
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600399 debug("No video mode configured\n");
400 return ret;
401 }
402
Bin Mengbe4551e2018-04-11 22:02:18 -0700403 printf("Video: %dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
Bin Meng57b65e62016-10-09 04:14:12 -0700404 mode_info.vesa.bits_per_pixel);
405
Simon Glass4ef5d2d2016-10-05 20:42:17 -0600406 return 0;
407}