Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 1 | if ARCH_STM32MP |
| 2 | |
| 3 | config SPL |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 4 | select SPL_CLK |
| 5 | select SPL_DM |
| 6 | select SPL_DM_SEQ_ALIAS |
Patrick Delaunay | 636279a | 2018-07-09 15:17:21 +0200 | [diff] [blame] | 7 | select SPL_DRIVERS_MISC_SUPPORT |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 8 | select SPL_FRAMEWORK |
| 9 | select SPL_GPIO_SUPPORT |
| 10 | select SPL_LIBCOMMON_SUPPORT |
| 11 | select SPL_LIBGENERIC_SUPPORT |
| 12 | select SPL_OF_CONTROL |
| 13 | select SPL_OF_TRANSLATE |
| 14 | select SPL_PINCTRL |
| 15 | select SPL_REGMAP |
Ley Foon Tan | 9caf712 | 2018-06-14 18:45:19 +0800 | [diff] [blame] | 16 | select SPL_DM_RESET |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 17 | select SPL_SERIAL_SUPPORT |
Patrick Delaunay | fbe5457 | 2019-07-30 19:16:36 +0200 | [diff] [blame] | 18 | select SPL_SPI_LOAD |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 19 | select SPL_SYSCON |
Patrick Delaunay | 8bbadde | 2019-07-30 19:16:33 +0200 | [diff] [blame] | 20 | select SPL_WATCHDOG_SUPPORT if WATCHDOG |
Patrick Delaunay | f860020 | 2019-04-18 17:32:47 +0200 | [diff] [blame] | 21 | imply BOOTSTAGE_STASH if SPL_BOOTSTAGE |
| 22 | imply SPL_BOOTSTAGE if BOOTSTAGE |
Patrick Delaunay | aa4e685 | 2019-02-27 17:01:14 +0100 | [diff] [blame] | 23 | imply SPL_DISPLAY_PRINT |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 24 | imply SPL_LIBDISK_SUPPORT |
| 25 | |
| 26 | config SYS_SOC |
| 27 | default "stm32mp" |
| 28 | |
Patrick Delaunay | 7e517c6 | 2019-04-18 17:32:36 +0200 | [diff] [blame] | 29 | config SYS_MALLOC_LEN |
| 30 | default 0x2000000 |
| 31 | |
Patrick Delaunay | 088b676 | 2019-04-18 17:32:37 +0200 | [diff] [blame] | 32 | config ENV_SIZE |
Patrice Chotard | d83bba4 | 2019-05-07 18:40:47 +0200 | [diff] [blame] | 33 | default 0x2000 |
Patrick Delaunay | 088b676 | 2019-04-18 17:32:37 +0200 | [diff] [blame] | 34 | |
Patrick Delaunay | 310aa8a | 2020-01-13 15:17:42 +0100 | [diff] [blame] | 35 | config STM32MP15x |
| 36 | bool "Support STMicroelectronics STM32MP15x Soc" |
Patrick Delaunay | f8fe21d | 2020-04-01 09:07:33 +0200 | [diff] [blame] | 37 | select ARCH_SUPPORT_PSCI if !TFABOOT |
| 38 | select ARM_SMCCC if TFABOOT |
Lokesh Vutla | 81b1a67 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 39 | select CPU_V7A |
Patrick Delaunay | f8fe21d | 2020-04-01 09:07:33 +0200 | [diff] [blame] | 40 | select CPU_V7_HAS_NONSEC if !TFABOOT |
Patrick Delaunay | e020737 | 2018-04-16 10:13:24 +0200 | [diff] [blame] | 41 | select CPU_V7_HAS_VIRT |
Patrick Delaunay | de98cbf | 2019-07-02 13:26:07 +0200 | [diff] [blame] | 42 | select OF_BOARD_SETUP |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 43 | select PINCTRL_STM32 |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 44 | select STM32_RCC |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 45 | select STM32_RESET |
Patrick Delaunay | 4368e56 | 2019-07-30 19:16:25 +0200 | [diff] [blame] | 46 | select STM32_SERIAL |
Andre Przywara | 7b16925 | 2018-04-12 04:24:46 +0300 | [diff] [blame] | 47 | select SYS_ARCH_TIMER |
Patrick Delaunay | f8fe21d | 2020-04-01 09:07:33 +0200 | [diff] [blame] | 48 | imply SYSRESET_PSCI if TFABOOT |
| 49 | imply SYSRESET_SYSCON if !TFABOOT |
Patrick Delaunay | 310aa8a | 2020-01-13 15:17:42 +0100 | [diff] [blame] | 50 | help |
| 51 | support of STMicroelectronics SOC STM32MP15x family |
| 52 | STM32MP157, STM32MP153 or STM32MP151 |
| 53 | STMicroelectronics MPU with core ARMv7 |
| 54 | dual core A7 for STM32MP157/3, monocore for STM32MP151 |
| 55 | target all the STMicroelectronics board with SOC STM32MP1 family |
| 56 | |
| 57 | choice |
| 58 | prompt "STM32MP15x board select" |
| 59 | optional |
| 60 | |
| 61 | config TARGET_ST_STM32MP15x |
| 62 | bool "STMicroelectronics STM32MP15x boards" |
| 63 | select STM32MP15x |
Patrick Delaunay | 9c07f4a | 2019-04-18 17:32:45 +0200 | [diff] [blame] | 64 | imply BOOTCOUNT_LIMIT |
Patrick Delaunay | 66111eb | 2020-03-10 10:15:03 +0100 | [diff] [blame] | 65 | imply BOOTSTAGE |
Patrick Delaunay | 9c07f4a | 2019-04-18 17:32:45 +0200 | [diff] [blame] | 66 | imply CMD_BOOTCOUNT |
Patrick Delaunay | 66111eb | 2020-03-10 10:15:03 +0100 | [diff] [blame] | 67 | imply CMD_BOOTSTAGE |
Patrick Delaunay | f97beae | 2019-12-03 09:38:58 +0100 | [diff] [blame] | 68 | imply CMD_CLS if CMD_BMP |
Patrick Delaunay | 28a4609 | 2019-07-30 19:16:26 +0200 | [diff] [blame] | 69 | imply DISABLE_CONSOLE |
Patrick Delaunay | fcb4991 | 2019-07-30 19:16:23 +0200 | [diff] [blame] | 70 | imply PRE_CONSOLE_BUFFER |
Patrick Delaunay | 887d9e4 | 2019-07-30 19:16:22 +0200 | [diff] [blame] | 71 | imply SILENT_CONSOLE |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 72 | help |
Patrick Delaunay | 310aa8a | 2020-01-13 15:17:42 +0100 | [diff] [blame] | 73 | target the STMicroelectronics board with SOC STM32MP15x |
| 74 | managed by board/st/stm32mp1: |
| 75 | Evalulation board (EV1) or Discovery board (DK1 and DK2). |
| 76 | The difference between board are managed with devicetree |
| 77 | |
Marek Vasut | 5ff0529 | 2020-01-24 18:39:16 +0100 | [diff] [blame] | 78 | config TARGET_DH_STM32MP1_PDK2 |
| 79 | bool "DH STM32MP1 PDK2" |
| 80 | select STM32MP15x |
| 81 | imply BOOTCOUNT_LIMIT |
| 82 | imply CMD_BOOTCOUNT |
| 83 | help |
| 84 | Target the DH PDK2 development kit with STM32MP15x SoM. |
| 85 | |
Patrick Delaunay | 310aa8a | 2020-01-13 15:17:42 +0100 | [diff] [blame] | 86 | endchoice |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 87 | |
| 88 | config SYS_TEXT_BASE |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 89 | default 0xC0100000 |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 90 | |
Patrick Delaunay | 6d3cbf3 | 2019-02-27 17:01:15 +0100 | [diff] [blame] | 91 | config NR_DRAM_BANKS |
| 92 | default 1 |
| 93 | |
Patrick Delaunay | fc69c68 | 2018-03-20 10:54:54 +0100 | [diff] [blame] | 94 | config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 |
| 95 | hex "Partition on MMC2 to use to load U-Boot from" |
| 96 | depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION |
| 97 | default 1 |
| 98 | help |
| 99 | Partition on the second MMC to load U-Boot from when the MMC is being |
| 100 | used in raw mode |
| 101 | |
Patrick Delaunay | 43f214c | 2019-07-05 17:20:15 +0200 | [diff] [blame] | 102 | config STM32_ETZPC |
| 103 | bool "STM32 Extended TrustZone Protection" |
Patrick Delaunay | 3a6e387 | 2020-03-10 16:05:43 +0100 | [diff] [blame] | 104 | depends on STM32MP15x |
Patrick Delaunay | 43f214c | 2019-07-05 17:20:15 +0200 | [diff] [blame] | 105 | default y |
| 106 | help |
| 107 | Say y to enable STM32 Extended TrustZone Protection |
| 108 | |
Patrick Delaunay | 7daa91d | 2020-03-18 09:24:49 +0100 | [diff] [blame] | 109 | config CMD_STM32PROG |
| 110 | bool "command stm32prog for STM32CudeProgrammer" |
| 111 | select DFU |
| 112 | select DFU_RAM |
| 113 | select DFU_VIRT |
Patrick Delaunay | 7aae1e3 | 2020-03-18 09:24:51 +0100 | [diff] [blame] | 114 | select PARTITION_TYPE_GUID |
| 115 | imply CMD_GPT if MMC |
Patrick Delaunay | 6ab7496 | 2020-03-18 09:24:54 +0100 | [diff] [blame] | 116 | imply CMD_MTD if MTD |
Patrick Delaunay | 7aae1e3 | 2020-03-18 09:24:51 +0100 | [diff] [blame] | 117 | imply DFU_MMC if MMC |
Patrick Delaunay | 6ab7496 | 2020-03-18 09:24:54 +0100 | [diff] [blame] | 118 | imply DFU_MTD if MTD |
Patrick Delaunay | 7daa91d | 2020-03-18 09:24:49 +0100 | [diff] [blame] | 119 | help |
| 120 | activate a specific command stm32prog for STM32MP soc family |
| 121 | witch update the device with the tools STM32CubeProgrammer, |
| 122 | using UART with STM32 protocol or USB with DFU protocol |
| 123 | NB: access to not volatile memory (NOR/NAND/SD/eMMC) is based |
| 124 | on U-Boot DFU framework |
| 125 | |
Patrick Delaunay | 109d13f | 2019-07-05 17:20:17 +0200 | [diff] [blame] | 126 | config CMD_STM32KEY |
| 127 | bool "command stm32key to fuse public key hash" |
| 128 | default y |
Patrick Delaunay | 109d13f | 2019-07-05 17:20:17 +0200 | [diff] [blame] | 129 | help |
| 130 | fuse public key hash in corresponding fuse used to authenticate |
| 131 | binary. |
| 132 | |
Patrick Delaunay | fcb4991 | 2019-07-30 19:16:23 +0200 | [diff] [blame] | 133 | config PRE_CON_BUF_ADDR |
| 134 | default 0xC02FF000 |
| 135 | |
| 136 | config PRE_CON_BUF_SZ |
| 137 | default 4096 |
| 138 | |
Patrick Delaunay | f860020 | 2019-04-18 17:32:47 +0200 | [diff] [blame] | 139 | config BOOTSTAGE_STASH_ADDR |
| 140 | default 0xC3000000 |
| 141 | |
Patrick Delaunay | 9c07f4a | 2019-04-18 17:32:45 +0200 | [diff] [blame] | 142 | if BOOTCOUNT_LIMIT |
| 143 | config SYS_BOOTCOUNT_SINGLEWORD |
| 144 | default y |
| 145 | |
| 146 | # TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21) |
| 147 | config SYS_BOOTCOUNT_ADDR |
| 148 | default 0x5C00A154 |
| 149 | endif |
| 150 | |
Patrick Delaunay | 82168e8 | 2018-05-17 14:50:46 +0200 | [diff] [blame] | 151 | if DEBUG_UART |
| 152 | |
| 153 | config DEBUG_UART_BOARD_INIT |
| 154 | default y |
| 155 | |
| 156 | # debug on UART4 by default |
| 157 | config DEBUG_UART_BASE |
| 158 | default 0x40010000 |
| 159 | |
| 160 | # clock source is HSI on reset |
| 161 | config DEBUG_UART_CLOCK |
| 162 | default 64000000 |
| 163 | endif |
| 164 | |
Patrick Delaunay | 6d3cbf3 | 2019-02-27 17:01:15 +0100 | [diff] [blame] | 165 | source "board/st/stm32mp1/Kconfig" |
Marek Vasut | 5ff0529 | 2020-01-24 18:39:16 +0100 | [diff] [blame] | 166 | source "board/dhelectronics/dh_stm32mp1/Kconfig" |
Patrick Delaunay | 6d3cbf3 | 2019-02-27 17:01:15 +0100 | [diff] [blame] | 167 | |
Patrick Delaunay | 85b5397 | 2018-03-12 10:46:10 +0100 | [diff] [blame] | 168 | endif |