Blame - include/configs/ls1012a_common.h - filogic/uboot

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Tom Rini	10e4779	2018-05-06 17:58:06 -0400	[diff] [blame]	1	/* SPDX-License-Identifier: GPL-2.0+ */
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	2	/*
				3	* Copyright 2016 Freescale Semiconductor
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	4	*/
				5
				6	#ifndef __LS1012A_COMMON_H
				7	#define __LS1012A_COMMON_H
				8
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	9	#include <asm/arch/config.h>
Bharat Bhushan	c865131	2017-03-22 12:06:29 +0530	[diff] [blame]	10	#include <asm/arch/stream_id_lsch2.h>
Kuldeep Singh	0226109	2020-06-25 12:56:22 +0530	[diff] [blame]	11	#include <linux/sizes.h>
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	12
Rajesh Bhagat	fcafef6	2018-11-05 18:02:53 +0000	[diff] [blame]	13	#ifdef CONFIG_TFABOOT
				14	#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
				15	#else
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	16	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
Rajesh Bhagat	fcafef6	2018-11-05 18:02:53 +0000	[diff] [blame]	17	#endif
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	18
				19	#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
				20	#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
				21	#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
Prabhakar Kushwaha	1fb2f11	2017-01-30 17:05:22 +0530	[diff] [blame]	22	#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	23
				24	/* Generic Timer Definitions */
Yuantian Tang	8d7d820	2017-10-12 14:29:26 +0800	[diff] [blame]	25	#define COUNTER_FREQUENCY 25000000 /* 25MHz */
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	26
				27	/* CSU */
				28	#define CONFIG_LAYERSCAPE_NS_ACCESS
				29
Kuldeep Singh	14e956f	2020-05-28 11:42:53 +0530	[diff] [blame]	30	/SPI device /
Kuldeep Singh	1f73ca6	2020-05-12 12:54:07 +0530	[diff] [blame]	31	#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	32
Yuantian Tang	932c5b1	2018-01-03 15:53:10 +0800	[diff] [blame]	33	/* SATA */
				34	#define CONFIG_SCSI_AHCI_PLAT
				35
				36	#define CONFIG_SYS_SATA AHCI_BASE_ADDR
				37
				38	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
				39	#define CONFIG_SYS_SCSI_MAX_LUN 1
				40	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
				41	CONFIG_SYS_SCSI_MAX_LUN)
				42
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	43	/* I2C */
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	44
Biwen Li	672b999	2021-02-05 19:01:55 +0800	[diff] [blame]	45	/* GPIO */
Biwen Li	672b999	2021-02-05 19:01:55 +0800	[diff] [blame]	46
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	47	#define CONFIG_SYS_NS16550_SERIAL
				48	#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang	3f91cda	2017-01-10 16:44:15 +0800	[diff] [blame]	49	#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	50
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	51	#define CONFIG_HWCONFIG
				52	#define HWCONFIG_BUFFER_SIZE 128
				53
Rajesh Bhagat	d59447a	2017-11-30 16:44:38 +0530	[diff] [blame]	54	#ifndef CONFIG_SPL_BUILD
				55	#define BOOT_TARGET_DEVICES(func) \
				56	func(MMC, mmc, 0) \
Yunfeng Ding	0c1d95e	2019-02-19 14:44:04 +0800	[diff] [blame]	57	func(USB, usb, 0) \
				58	func(SCSI, scsi, 0) \
				59	func(DHCP, dhcp, na)
Rajesh Bhagat	d59447a	2017-11-30 16:44:38 +0530	[diff] [blame]	60	#include <config_distro_bootcmd.h>
				61	#endif
				62
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	63	/* Initial environment variables */
				64	#define CONFIG_EXTRA_ENV_SETTINGS \
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	65	"verify=no\0" \
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	66	"loadaddr=0x80100000\0" \
				67	"kernel_addr=0x100000\0" \
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	68	"initrd_high=0xffffffffffffffff\0" \
Bhaskar Upadhaya	11385d8	2017-11-14 05:05:10 +0530	[diff] [blame]	69	"kernel_start=0x1000000\0" \
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	70	"kernel_load=0xa0000000\0" \
				71	"kernel_size=0x2800000\0" \
Udit Agarwal	4fe5c55	2020-06-08 18:55:44 +0530	[diff] [blame]	72	"bootm_size=0x10000000\0" \
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	73
Rajesh Bhagat	fcafef6	2018-11-05 18:02:53 +0000	[diff] [blame]	74	#ifdef CONFIG_TFABOOT
Mian Yousaf Kaukab	2529deae	2021-04-14 12:33:58 +0200	[diff] [blame]	75	#define QSPI_NOR_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
Rajesh Bhagat	fcafef6	2018-11-05 18:02:53 +0000	[diff] [blame]	76	"$kernel_start $kernel_size && "\
				77	"bootm $kernel_load"
Rajesh Bhagat	fcafef6	2018-11-05 18:02:53 +0000	[diff] [blame]	78	#endif
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	79
				80	/* Monitor Command Prompt */
				81	#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	82	#define CONFIG_SYS_MAXARGS 64 /* max command args */
				83
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	84	#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
				85
Simon Glass	89e0a3a	2017-05-17 08:23:10 -0600	[diff] [blame]	86	#include <asm/arch/soc.h>
				87
Prabhakar Kushwaha	5543250	2016-06-03 18:41:34 +0530	[diff] [blame]	88	#endif /* __LS1012A_COMMON_H */