blob: d9ad6b423b0dba6eb098558ef321d429149d4c6b [file] [log] [blame]
Patrick Delaunay85b53972018-03-12 10:46:10 +01001if ARCH_STM32MP
2
3config SPL
4 select SPL_BOARD_INIT
5 select SPL_CLK
6 select SPL_DM
7 select SPL_DM_SEQ_ALIAS
Patrick Delaunay636279a2018-07-09 15:17:21 +02008 select SPL_DRIVERS_MISC_SUPPORT
Patrick Delaunay85b53972018-03-12 10:46:10 +01009 select SPL_FRAMEWORK
10 select SPL_GPIO_SUPPORT
11 select SPL_LIBCOMMON_SUPPORT
12 select SPL_LIBGENERIC_SUPPORT
13 select SPL_OF_CONTROL
14 select SPL_OF_TRANSLATE
15 select SPL_PINCTRL
16 select SPL_REGMAP
Ley Foon Tan9caf7122018-06-14 18:45:19 +080017 select SPL_DM_RESET
Patrick Delaunay85b53972018-03-12 10:46:10 +010018 select SPL_SERIAL_SUPPORT
19 select SPL_SYSCON
Patrice Chotard473b2442019-04-30 17:26:22 +020020 select SPL_WATCHDOG_SUPPORT
Patrick Delaunayf8600202019-04-18 17:32:47 +020021 imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
22 imply SPL_BOOTSTAGE if BOOTSTAGE
Patrick Delaunayaa4e6852019-02-27 17:01:14 +010023 imply SPL_DISPLAY_PRINT
Patrick Delaunay85b53972018-03-12 10:46:10 +010024 imply SPL_LIBDISK_SUPPORT
25
26config SYS_SOC
27 default "stm32mp"
28
Patrick Delaunay7e517c62019-04-18 17:32:36 +020029config SYS_MALLOC_LEN
30 default 0x2000000
31
Patrick Delaunay088b6762019-04-18 17:32:37 +020032config ENV_SIZE
Patrice Chotardd83bba42019-05-07 18:40:47 +020033 default 0x2000
Patrick Delaunay088b6762019-04-18 17:32:37 +020034
Patrick Delaunay85b53972018-03-12 10:46:10 +010035config TARGET_STM32MP1
36 bool "Support stm32mp1xx"
Patrick Delaunay5d061412019-02-12 11:44:39 +010037 select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED
Lokesh Vutla81b1a672018-04-26 18:21:26 +053038 select CPU_V7A
Patrick Delaunay5d061412019-02-12 11:44:39 +010039 select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED
Patrick Delaunaye0207372018-04-16 10:13:24 +020040 select CPU_V7_HAS_VIRT
Patrick Delaunay85b53972018-03-12 10:46:10 +010041 select PINCTRL_STM32
Patrick Delaunayb139a5b2018-07-09 15:17:20 +020042 select STM32_RCC
Patrick Delaunay85b53972018-03-12 10:46:10 +010043 select STM32_RESET
Andre Przywara7b169252018-04-12 04:24:46 +030044 select SYS_ARCH_TIMER
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +020045 imply BOOTCOUNT_LIMIT
Patrick Delaunayf8600202019-04-18 17:32:47 +020046 imply BOOTSTAGE
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +020047 imply CMD_BOOTCOUNT
Patrick Delaunayf8600202019-04-18 17:32:47 +020048 imply CMD_BOOTSTAGE
Patrick Delaunay5d061412019-02-12 11:44:39 +010049 imply SYSRESET_PSCI if STM32MP1_TRUSTED
50 imply SYSRESET_SYSCON if !STM32MP1_TRUSTED
Patrick Delaunay85b53972018-03-12 10:46:10 +010051 help
52 target STMicroelectronics SOC STM32MP1 family
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010053 STM32MP157, STM32MP153 or STM32MP151
Patrick Delaunay85b53972018-03-12 10:46:10 +010054 STMicroelectronics MPU with core ARMv7
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010055 dual core A7 for STM32MP157/3, monocore for STM32MP151
Patrick Delaunay85b53972018-03-12 10:46:10 +010056
Patrick Delaunay5d061412019-02-12 11:44:39 +010057config STM32MP1_TRUSTED
58 bool "Support trusted boot with TF-A"
59 default y if !SPL
60 select ARM_SMCCC
61 help
62 Say Y here to enable boot with TF-A
63 Trusted boot chain is :
64 BootRom => TF-A.stm32 (clock & DDR) => U-Boot.stm32
65 TF-A monitor provides proprietary smc to manage secure devices
66
Patrick Delaunay85b53972018-03-12 10:46:10 +010067config SYS_TEXT_BASE
68 prompt "U-Boot base address"
69 default 0xC0100000
70 help
71 configure the U-Boot base address
72 when DDR driver is used:
73 DDR + 1MB (0xC0100000)
74
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +010075config NR_DRAM_BANKS
76 default 1
77
Patrick Delaunayfc69c682018-03-20 10:54:54 +010078config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
79 hex "Partition on MMC2 to use to load U-Boot from"
80 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
81 default 1
82 help
83 Partition on the second MMC to load U-Boot from when the MMC is being
84 used in raw mode
85
Patrick Delaunayf8600202019-04-18 17:32:47 +020086config BOOTSTAGE_STASH_ADDR
87 default 0xC3000000
88
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +020089if BOOTCOUNT_LIMIT
90config SYS_BOOTCOUNT_SINGLEWORD
91 default y
92
93# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
94config SYS_BOOTCOUNT_ADDR
95 default 0x5C00A154
96endif
97
Patrick Delaunay82168e82018-05-17 14:50:46 +020098if DEBUG_UART
99
100config DEBUG_UART_BOARD_INIT
101 default y
102
103# debug on UART4 by default
104config DEBUG_UART_BASE
105 default 0x40010000
106
107# clock source is HSI on reset
108config DEBUG_UART_CLOCK
109 default 64000000
110endif
111
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +0100112source "board/st/stm32mp1/Kconfig"
113
Patrick Delaunay85b53972018-03-12 10:46:10 +0100114endif